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d947e792 MS |
1 | /* linux/arch/arm/mach-s5pv210/mach-aquila.c |
2 | * | |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com/ | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/types.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/serial_core.h> | |
b315032f | 15 | #include <linux/fb.h> |
a1660c12 MS |
16 | #include <linux/i2c.h> |
17 | #include <linux/i2c-gpio.h> | |
18 | #include <linux/mfd/max8998.h> | |
80849798 CC |
19 | #include <linux/mfd/wm8994/pdata.h> |
20 | #include <linux/regulator/fixed.h> | |
a1660c12 MS |
21 | #include <linux/gpio_keys.h> |
22 | #include <linux/input.h> | |
23 | #include <linux/gpio.h> | |
d947e792 MS |
24 | |
25 | #include <asm/mach/arch.h> | |
26 | #include <asm/mach/map.h> | |
27 | #include <asm/setup.h> | |
28 | #include <asm/mach-types.h> | |
29 | ||
30 | #include <mach/map.h> | |
31 | #include <mach/regs-clock.h> | |
b315032f | 32 | #include <mach/regs-fb.h> |
d947e792 | 33 | |
a1660c12 | 34 | #include <plat/gpio-cfg.h> |
d947e792 MS |
35 | #include <plat/regs-serial.h> |
36 | #include <plat/s5pv210.h> | |
37 | #include <plat/devs.h> | |
38 | #include <plat/cpu.h> | |
b315032f | 39 | #include <plat/fb.h> |
187749bb | 40 | #include <plat/fimc-core.h> |
ba3fbef9 | 41 | #include <plat/sdhci.h> |
d947e792 MS |
42 | |
43 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | |
c8def085 | 44 | #define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
d947e792 MS |
45 | S3C2410_UCON_RXILEVEL | \ |
46 | S3C2410_UCON_TXIRQMODE | \ | |
47 | S3C2410_UCON_RXIRQMODE | \ | |
48 | S3C2410_UCON_RXFIFO_TOI | \ | |
49 | S3C2443_UCON_RXERR_IRQEN) | |
50 | ||
c8def085 | 51 | #define AQUILA_ULCON_DEFAULT S3C2410_LCON_CS8 |
d947e792 | 52 | |
f2b7e3c5 | 53 | #define AQUILA_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE |
d947e792 | 54 | |
df01714a | 55 | static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = { |
d947e792 MS |
56 | [0] = { |
57 | .hwport = 0, | |
58 | .flags = 0, | |
c8def085 KK |
59 | .ucon = AQUILA_UCON_DEFAULT, |
60 | .ulcon = AQUILA_ULCON_DEFAULT, | |
df01714a JS |
61 | /* |
62 | * Actually UART0 can support 256 bytes fifo, but aquila board | |
63 | * supports 128 bytes fifo because of initial chip bug | |
64 | */ | |
f2b7e3c5 | 65 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 66 | S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128, |
d947e792 MS |
67 | }, |
68 | [1] = { | |
69 | .hwport = 1, | |
70 | .flags = 0, | |
c8def085 KK |
71 | .ucon = AQUILA_UCON_DEFAULT, |
72 | .ulcon = AQUILA_ULCON_DEFAULT, | |
f2b7e3c5 | 73 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 74 | S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64, |
d947e792 MS |
75 | }, |
76 | [2] = { | |
77 | .hwport = 2, | |
78 | .flags = 0, | |
c8def085 KK |
79 | .ucon = AQUILA_UCON_DEFAULT, |
80 | .ulcon = AQUILA_ULCON_DEFAULT, | |
f2b7e3c5 | 81 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 82 | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, |
d947e792 MS |
83 | }, |
84 | [3] = { | |
85 | .hwport = 3, | |
86 | .flags = 0, | |
c8def085 KK |
87 | .ucon = AQUILA_UCON_DEFAULT, |
88 | .ulcon = AQUILA_ULCON_DEFAULT, | |
f2b7e3c5 | 89 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 90 | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, |
d947e792 MS |
91 | }, |
92 | }; | |
93 | ||
b315032f MS |
94 | /* Frame Buffer */ |
95 | static struct s3c_fb_pd_win aquila_fb_win0 = { | |
96 | .win_mode = { | |
b315032f MS |
97 | .left_margin = 16, |
98 | .right_margin = 16, | |
99 | .upper_margin = 3, | |
100 | .lower_margin = 28, | |
101 | .hsync_len = 2, | |
102 | .vsync_len = 2, | |
103 | .xres = 480, | |
104 | .yres = 800, | |
105 | }, | |
106 | .max_bpp = 32, | |
107 | .default_bpp = 16, | |
108 | }; | |
109 | ||
110 | static struct s3c_fb_pd_win aquila_fb_win1 = { | |
111 | .win_mode = { | |
b315032f MS |
112 | .left_margin = 16, |
113 | .right_margin = 16, | |
114 | .upper_margin = 3, | |
115 | .lower_margin = 28, | |
116 | .hsync_len = 2, | |
117 | .vsync_len = 2, | |
118 | .xres = 480, | |
119 | .yres = 800, | |
120 | }, | |
121 | .max_bpp = 32, | |
122 | .default_bpp = 16, | |
123 | }; | |
124 | ||
125 | static struct s3c_fb_platdata aquila_lcd_pdata __initdata = { | |
126 | .win[0] = &aquila_fb_win0, | |
127 | .win[1] = &aquila_fb_win1, | |
128 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | |
129 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | | |
130 | VIDCON1_INV_VCLK | VIDCON1_INV_VDEN, | |
131 | .setup_gpio = s5pv210_fb_gpio_setup_24bpp, | |
132 | }; | |
133 | ||
a1660c12 MS |
134 | /* MAX8998 regulators */ |
135 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | |
136 | ||
137 | static struct regulator_init_data aquila_ldo2_data = { | |
138 | .constraints = { | |
139 | .name = "VALIVE_1.1V", | |
140 | .min_uV = 1100000, | |
141 | .max_uV = 1100000, | |
142 | .apply_uV = 1, | |
143 | .always_on = 1, | |
144 | .state_mem = { | |
145 | .enabled = 1, | |
146 | }, | |
147 | }, | |
148 | }; | |
149 | ||
150 | static struct regulator_init_data aquila_ldo3_data = { | |
151 | .constraints = { | |
d1061331 | 152 | .name = "VUSB+MIPI_1.1V", |
a1660c12 MS |
153 | .min_uV = 1100000, |
154 | .max_uV = 1100000, | |
155 | .apply_uV = 1, | |
156 | .always_on = 1, | |
157 | }, | |
158 | }; | |
159 | ||
160 | static struct regulator_init_data aquila_ldo4_data = { | |
161 | .constraints = { | |
162 | .name = "VDAC_3.3V", | |
163 | .min_uV = 3300000, | |
164 | .max_uV = 3300000, | |
165 | .apply_uV = 1, | |
166 | }, | |
167 | }; | |
168 | ||
169 | static struct regulator_init_data aquila_ldo5_data = { | |
170 | .constraints = { | |
171 | .name = "VTF_2.8V", | |
172 | .min_uV = 2800000, | |
173 | .max_uV = 2800000, | |
174 | .apply_uV = 1, | |
175 | }, | |
176 | }; | |
177 | ||
178 | static struct regulator_init_data aquila_ldo6_data = { | |
179 | .constraints = { | |
180 | .name = "VCC_3.3V", | |
181 | .min_uV = 3300000, | |
182 | .max_uV = 3300000, | |
183 | .apply_uV = 1, | |
184 | }, | |
185 | }; | |
186 | ||
187 | static struct regulator_init_data aquila_ldo7_data = { | |
188 | .constraints = { | |
189 | .name = "VCC_3.0V", | |
190 | .min_uV = 3000000, | |
191 | .max_uV = 3000000, | |
192 | .apply_uV = 1, | |
193 | .boot_on = 1, | |
194 | .always_on = 1, | |
195 | }, | |
196 | }; | |
197 | ||
198 | static struct regulator_init_data aquila_ldo8_data = { | |
199 | .constraints = { | |
d1061331 | 200 | .name = "VUSB+VADC_3.3V", |
a1660c12 MS |
201 | .min_uV = 3300000, |
202 | .max_uV = 3300000, | |
203 | .apply_uV = 1, | |
204 | .always_on = 1, | |
205 | }, | |
206 | }; | |
207 | ||
208 | static struct regulator_init_data aquila_ldo9_data = { | |
209 | .constraints = { | |
d1061331 | 210 | .name = "VCC+VCAM_2.8V", |
a1660c12 MS |
211 | .min_uV = 2800000, |
212 | .max_uV = 2800000, | |
213 | .apply_uV = 1, | |
214 | .always_on = 1, | |
215 | }, | |
216 | }; | |
217 | ||
218 | static struct regulator_init_data aquila_ldo10_data = { | |
219 | .constraints = { | |
220 | .name = "VPLL_1.1V", | |
221 | .min_uV = 1100000, | |
222 | .max_uV = 1100000, | |
223 | .apply_uV = 1, | |
224 | .boot_on = 1, | |
225 | }, | |
226 | }; | |
227 | ||
228 | static struct regulator_init_data aquila_ldo11_data = { | |
229 | .constraints = { | |
230 | .name = "CAM_IO_2.8V", | |
231 | .min_uV = 2800000, | |
232 | .max_uV = 2800000, | |
233 | .apply_uV = 1, | |
234 | .always_on = 1, | |
235 | }, | |
236 | }; | |
237 | ||
238 | static struct regulator_init_data aquila_ldo12_data = { | |
239 | .constraints = { | |
240 | .name = "CAM_ISP_1.2V", | |
241 | .min_uV = 1200000, | |
242 | .max_uV = 1200000, | |
243 | .apply_uV = 1, | |
244 | .always_on = 1, | |
245 | }, | |
246 | }; | |
247 | ||
248 | static struct regulator_init_data aquila_ldo13_data = { | |
249 | .constraints = { | |
250 | .name = "CAM_A_2.8V", | |
251 | .min_uV = 2800000, | |
252 | .max_uV = 2800000, | |
253 | .apply_uV = 1, | |
254 | .always_on = 1, | |
255 | }, | |
256 | }; | |
257 | ||
258 | static struct regulator_init_data aquila_ldo14_data = { | |
259 | .constraints = { | |
260 | .name = "CAM_CIF_1.8V", | |
261 | .min_uV = 1800000, | |
262 | .max_uV = 1800000, | |
263 | .apply_uV = 1, | |
264 | .always_on = 1, | |
265 | }, | |
266 | }; | |
267 | ||
268 | static struct regulator_init_data aquila_ldo15_data = { | |
269 | .constraints = { | |
270 | .name = "CAM_AF_3.3V", | |
271 | .min_uV = 3300000, | |
272 | .max_uV = 3300000, | |
273 | .apply_uV = 1, | |
274 | .always_on = 1, | |
275 | }, | |
276 | }; | |
277 | ||
278 | static struct regulator_init_data aquila_ldo16_data = { | |
279 | .constraints = { | |
280 | .name = "VMIPI_1.8V", | |
281 | .min_uV = 1800000, | |
282 | .max_uV = 1800000, | |
283 | .apply_uV = 1, | |
284 | .always_on = 1, | |
285 | }, | |
286 | }; | |
287 | ||
288 | static struct regulator_init_data aquila_ldo17_data = { | |
289 | .constraints = { | |
290 | .name = "CAM_8M_1.8V", | |
291 | .min_uV = 1800000, | |
292 | .max_uV = 1800000, | |
293 | .apply_uV = 1, | |
294 | .always_on = 1, | |
295 | }, | |
296 | }; | |
297 | ||
298 | /* BUCK */ | |
d3f9c570 KK |
299 | static struct regulator_consumer_supply buck1_consumer = |
300 | REGULATOR_SUPPLY("vddarm", NULL); | |
a1660c12 | 301 | |
d3f9c570 KK |
302 | static struct regulator_consumer_supply buck2_consumer = |
303 | REGULATOR_SUPPLY("vddint", NULL); | |
a1660c12 MS |
304 | |
305 | static struct regulator_init_data aquila_buck1_data = { | |
306 | .constraints = { | |
307 | .name = "VARM_1.2V", | |
308 | .min_uV = 1200000, | |
309 | .max_uV = 1200000, | |
310 | .apply_uV = 1, | |
311 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
312 | REGULATOR_CHANGE_STATUS, | |
313 | }, | |
d3f9c570 KK |
314 | .num_consumer_supplies = 1, |
315 | .consumer_supplies = &buck1_consumer, | |
a1660c12 MS |
316 | }; |
317 | ||
318 | static struct regulator_init_data aquila_buck2_data = { | |
319 | .constraints = { | |
320 | .name = "VINT_1.2V", | |
321 | .min_uV = 1200000, | |
322 | .max_uV = 1200000, | |
323 | .apply_uV = 1, | |
324 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
325 | REGULATOR_CHANGE_STATUS, | |
326 | }, | |
d3f9c570 KK |
327 | .num_consumer_supplies = 1, |
328 | .consumer_supplies = &buck2_consumer, | |
a1660c12 MS |
329 | }; |
330 | ||
331 | static struct regulator_init_data aquila_buck3_data = { | |
332 | .constraints = { | |
333 | .name = "VCC_1.8V", | |
334 | .min_uV = 1800000, | |
335 | .max_uV = 1800000, | |
336 | .apply_uV = 1, | |
337 | .state_mem = { | |
338 | .enabled = 1, | |
339 | }, | |
340 | }, | |
341 | }; | |
342 | ||
343 | static struct regulator_init_data aquila_buck4_data = { | |
344 | .constraints = { | |
345 | .name = "CAM_CORE_1.2V", | |
346 | .min_uV = 1200000, | |
347 | .max_uV = 1200000, | |
348 | .apply_uV = 1, | |
349 | .always_on = 1, | |
350 | }, | |
351 | }; | |
352 | ||
353 | static struct max8998_regulator_data aquila_regulators[] = { | |
354 | { MAX8998_LDO2, &aquila_ldo2_data }, | |
355 | { MAX8998_LDO3, &aquila_ldo3_data }, | |
356 | { MAX8998_LDO4, &aquila_ldo4_data }, | |
357 | { MAX8998_LDO5, &aquila_ldo5_data }, | |
358 | { MAX8998_LDO6, &aquila_ldo6_data }, | |
359 | { MAX8998_LDO7, &aquila_ldo7_data }, | |
360 | { MAX8998_LDO8, &aquila_ldo8_data }, | |
361 | { MAX8998_LDO9, &aquila_ldo9_data }, | |
362 | { MAX8998_LDO10, &aquila_ldo10_data }, | |
363 | { MAX8998_LDO11, &aquila_ldo11_data }, | |
364 | { MAX8998_LDO12, &aquila_ldo12_data }, | |
365 | { MAX8998_LDO13, &aquila_ldo13_data }, | |
366 | { MAX8998_LDO14, &aquila_ldo14_data }, | |
367 | { MAX8998_LDO15, &aquila_ldo15_data }, | |
368 | { MAX8998_LDO16, &aquila_ldo16_data }, | |
369 | { MAX8998_LDO17, &aquila_ldo17_data }, | |
370 | { MAX8998_BUCK1, &aquila_buck1_data }, | |
371 | { MAX8998_BUCK2, &aquila_buck2_data }, | |
372 | { MAX8998_BUCK3, &aquila_buck3_data }, | |
373 | { MAX8998_BUCK4, &aquila_buck4_data }, | |
374 | }; | |
375 | ||
376 | static struct max8998_platform_data aquila_max8998_pdata = { | |
377 | .num_regulators = ARRAY_SIZE(aquila_regulators), | |
378 | .regulators = aquila_regulators, | |
cb186886 MS |
379 | .buck1_set1 = S5PV210_GPH0(3), |
380 | .buck1_set2 = S5PV210_GPH0(4), | |
381 | .buck2_set3 = S5PV210_GPH0(5), | |
979f395d MS |
382 | .buck1_voltage1 = 1200000, |
383 | .buck1_voltage2 = 1200000, | |
384 | .buck1_voltage3 = 1200000, | |
385 | .buck1_voltage4 = 1200000, | |
386 | .buck2_voltage1 = 1200000, | |
387 | .buck2_voltage2 = 1200000, | |
a1660c12 MS |
388 | }; |
389 | #endif | |
390 | ||
80849798 | 391 | static struct regulator_consumer_supply wm8994_fixed_voltage0_supplies[] = { |
d3f9c570 KK |
392 | REGULATOR_SUPPLY("DBVDD", "5-001a"), |
393 | REGULATOR_SUPPLY("AVDD2", "5-001a"), | |
394 | REGULATOR_SUPPLY("CPVDD", "5-001a"), | |
80849798 CC |
395 | }; |
396 | ||
397 | static struct regulator_consumer_supply wm8994_fixed_voltage1_supplies[] = { | |
d3f9c570 KK |
398 | REGULATOR_SUPPLY("SPKVDD1", "5-001a"), |
399 | REGULATOR_SUPPLY("SPKVDD2", "5-001a"), | |
80849798 CC |
400 | }; |
401 | ||
402 | static struct regulator_init_data wm8994_fixed_voltage0_init_data = { | |
403 | .constraints = { | |
404 | .always_on = 1, | |
405 | }, | |
406 | .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage0_supplies), | |
407 | .consumer_supplies = wm8994_fixed_voltage0_supplies, | |
408 | }; | |
409 | ||
410 | static struct regulator_init_data wm8994_fixed_voltage1_init_data = { | |
411 | .constraints = { | |
412 | .always_on = 1, | |
413 | }, | |
414 | .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage1_supplies), | |
415 | .consumer_supplies = wm8994_fixed_voltage1_supplies, | |
416 | }; | |
417 | ||
418 | static struct fixed_voltage_config wm8994_fixed_voltage0_config = { | |
419 | .supply_name = "VCC_1.8V_PDA", | |
420 | .microvolts = 1800000, | |
421 | .gpio = -EINVAL, | |
422 | .init_data = &wm8994_fixed_voltage0_init_data, | |
423 | }; | |
424 | ||
425 | static struct fixed_voltage_config wm8994_fixed_voltage1_config = { | |
426 | .supply_name = "V_BAT", | |
427 | .microvolts = 3700000, | |
428 | .gpio = -EINVAL, | |
429 | .init_data = &wm8994_fixed_voltage1_init_data, | |
430 | }; | |
431 | ||
432 | static struct platform_device wm8994_fixed_voltage0 = { | |
433 | .name = "reg-fixed-voltage", | |
434 | .id = 0, | |
435 | .dev = { | |
436 | .platform_data = &wm8994_fixed_voltage0_config, | |
437 | }, | |
438 | }; | |
439 | ||
440 | static struct platform_device wm8994_fixed_voltage1 = { | |
441 | .name = "reg-fixed-voltage", | |
442 | .id = 1, | |
443 | .dev = { | |
444 | .platform_data = &wm8994_fixed_voltage1_config, | |
445 | }, | |
446 | }; | |
447 | ||
d3f9c570 KK |
448 | static struct regulator_consumer_supply wm8994_avdd1_supply = |
449 | REGULATOR_SUPPLY("AVDD1", "5-001a"); | |
80849798 | 450 | |
d3f9c570 KK |
451 | static struct regulator_consumer_supply wm8994_dcvdd_supply = |
452 | REGULATOR_SUPPLY("DCVDD", "5-001a"); | |
80849798 CC |
453 | |
454 | static struct regulator_init_data wm8994_ldo1_data = { | |
455 | .constraints = { | |
456 | .name = "AVDD1_3.0V", | |
457 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
458 | }, | |
459 | .num_consumer_supplies = 1, | |
460 | .consumer_supplies = &wm8994_avdd1_supply, | |
461 | }; | |
462 | ||
463 | static struct regulator_init_data wm8994_ldo2_data = { | |
464 | .constraints = { | |
465 | .name = "DCVDD_1.0V", | |
466 | }, | |
467 | .num_consumer_supplies = 1, | |
468 | .consumer_supplies = &wm8994_dcvdd_supply, | |
469 | }; | |
470 | ||
471 | static struct wm8994_pdata wm8994_platform_data = { | |
472 | /* configure gpio1 function: 0x0001(Logic level input/output) */ | |
473 | .gpio_defaults[0] = 0x0001, | |
474 | /* configure gpio3/4/5/7 function for AIF2 voice */ | |
475 | .gpio_defaults[2] = 0x8100, | |
476 | .gpio_defaults[3] = 0x8100, | |
477 | .gpio_defaults[4] = 0x8100, | |
478 | .gpio_defaults[6] = 0x0100, | |
479 | /* configure gpio8/9/10/11 function for AIF3 BT */ | |
480 | .gpio_defaults[7] = 0x8100, | |
481 | .gpio_defaults[8] = 0x0100, | |
482 | .gpio_defaults[9] = 0x0100, | |
483 | .gpio_defaults[10] = 0x0100, | |
484 | .ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */ | |
485 | .ldo[1] = { 0, NULL, &wm8994_ldo2_data }, | |
486 | }; | |
487 | ||
a1660c12 MS |
488 | /* GPIO I2C PMIC */ |
489 | #define AP_I2C_GPIO_PMIC_BUS_4 4 | |
490 | static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = { | |
491 | .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */ | |
492 | .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */ | |
493 | }; | |
494 | ||
495 | static struct platform_device aquila_i2c_gpio_pmic = { | |
496 | .name = "i2c-gpio", | |
497 | .id = AP_I2C_GPIO_PMIC_BUS_4, | |
498 | .dev = { | |
499 | .platform_data = &aquila_i2c_gpio_pmic_data, | |
500 | }, | |
501 | }; | |
502 | ||
503 | static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = { | |
504 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | |
505 | { | |
506 | /* 0xCC when SRAD = 0 */ | |
507 | I2C_BOARD_INFO("max8998", 0xCC >> 1), | |
508 | .platform_data = &aquila_max8998_pdata, | |
509 | }, | |
510 | #endif | |
511 | }; | |
512 | ||
5112267e CC |
513 | /* GPIO I2C AP 1.8V */ |
514 | #define AP_I2C_GPIO_BUS_5 5 | |
515 | static struct i2c_gpio_platform_data aquila_i2c_gpio5_data = { | |
516 | .sda_pin = S5PV210_MP05(3), /* XM0ADDR_11 */ | |
517 | .scl_pin = S5PV210_MP05(2), /* XM0ADDR_10 */ | |
518 | }; | |
519 | ||
520 | static struct platform_device aquila_i2c_gpio5 = { | |
521 | .name = "i2c-gpio", | |
522 | .id = AP_I2C_GPIO_BUS_5, | |
523 | .dev = { | |
524 | .platform_data = &aquila_i2c_gpio5_data, | |
525 | }, | |
526 | }; | |
527 | ||
528 | static struct i2c_board_info i2c_gpio5_devs[] __initdata = { | |
529 | { | |
530 | /* CS/ADDR = low 0x34 (FYI: high = 0x36) */ | |
531 | I2C_BOARD_INFO("wm8994", 0x1a), | |
80849798 | 532 | .platform_data = &wm8994_platform_data, |
5112267e CC |
533 | }, |
534 | }; | |
535 | ||
a1660c12 MS |
536 | /* PMIC Power button */ |
537 | static struct gpio_keys_button aquila_gpio_keys_table[] = { | |
538 | { | |
539 | .code = KEY_POWER, | |
540 | .gpio = S5PV210_GPH2(6), | |
541 | .desc = "gpio-keys: KEY_POWER", | |
542 | .type = EV_KEY, | |
543 | .active_low = 1, | |
544 | .wakeup = 1, | |
545 | .debounce_interval = 1, | |
546 | }, | |
547 | }; | |
548 | ||
549 | static struct gpio_keys_platform_data aquila_gpio_keys_data = { | |
550 | .buttons = aquila_gpio_keys_table, | |
551 | .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table), | |
552 | }; | |
553 | ||
554 | static struct platform_device aquila_device_gpiokeys = { | |
555 | .name = "gpio-keys", | |
556 | .dev = { | |
557 | .platform_data = &aquila_gpio_keys_data, | |
558 | }, | |
559 | }; | |
560 | ||
561 | static void __init aquila_pmic_init(void) | |
562 | { | |
563 | /* AP_PMIC_IRQ: EINT7 */ | |
564 | s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf)); | |
565 | s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP); | |
566 | ||
567 | /* nPower: EINT22 */ | |
568 | s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf)); | |
569 | s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP); | |
570 | } | |
571 | ||
ba3fbef9 MS |
572 | /* MoviNAND */ |
573 | static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = { | |
574 | .max_width = 4, | |
575 | .cd_type = S3C_SDHCI_CD_PERMANENT, | |
576 | }; | |
577 | ||
578 | /* Wireless LAN */ | |
579 | static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = { | |
580 | .max_width = 4, | |
581 | .cd_type = S3C_SDHCI_CD_EXTERNAL, | |
582 | /* ext_cd_{init,cleanup} callbacks will be added later */ | |
583 | }; | |
584 | ||
585 | /* External Flash */ | |
586 | #define AQUILA_EXT_FLASH_EN S5PV210_MP05(4) | |
587 | #define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4) | |
588 | static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = { | |
589 | .max_width = 4, | |
590 | .cd_type = S3C_SDHCI_CD_GPIO, | |
591 | .ext_cd_gpio = AQUILA_EXT_FLASH_CD, | |
592 | .ext_cd_gpio_invert = 1, | |
593 | }; | |
594 | ||
595 | static void aquila_setup_sdhci(void) | |
596 | { | |
597 | gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN"); | |
598 | gpio_direction_output(AQUILA_EXT_FLASH_EN, 1); | |
599 | ||
600 | s3c_sdhci0_set_platdata(&aquila_hsmmc0_data); | |
601 | s3c_sdhci1_set_platdata(&aquila_hsmmc1_data); | |
602 | s3c_sdhci2_set_platdata(&aquila_hsmmc2_data); | |
603 | }; | |
604 | ||
d947e792 | 605 | static struct platform_device *aquila_devices[] __initdata = { |
a1660c12 | 606 | &aquila_i2c_gpio_pmic, |
5112267e | 607 | &aquila_i2c_gpio5, |
a1660c12 | 608 | &aquila_device_gpiokeys, |
b315032f | 609 | &s3c_device_fb, |
13904fba | 610 | &s5p_device_onenand, |
ba3fbef9 MS |
611 | &s3c_device_hsmmc0, |
612 | &s3c_device_hsmmc1, | |
613 | &s3c_device_hsmmc2, | |
7200c11d SN |
614 | &s5p_device_fimc0, |
615 | &s5p_device_fimc1, | |
616 | &s5p_device_fimc2, | |
6c29e71c | 617 | &s5pv210_device_iis0, |
80849798 CC |
618 | &wm8994_fixed_voltage0, |
619 | &wm8994_fixed_voltage1, | |
d947e792 MS |
620 | }; |
621 | ||
6c29e71c CC |
622 | static void __init aquila_sound_init(void) |
623 | { | |
624 | unsigned int gpio; | |
625 | ||
626 | /* CODEC_XTAL_EN | |
627 | * | |
628 | * The Aquila board have a oscillator which provide main clock | |
629 | * to WM8994 codec. The oscillator provide 24MHz clock to WM8994 | |
630 | * clock. Set gpio setting of "CODEC_XTAL_EN" to enable a oscillator. | |
631 | * */ | |
632 | gpio = S5PV210_GPH3(2); /* XEINT_26 */ | |
633 | gpio_request(gpio, "CODEC_XTAL_EN"); | |
634 | s3c_gpio_cfgpin(gpio, S3C_GPIO_OUTPUT); | |
635 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | |
636 | ||
637 | /* Ths main clock of WM8994 codec uses the output of CLKOUT pin. | |
638 | * The CLKOUT[9:8] set to 0x3(XUSBXTI) of 0xE010E000(OTHERS) | |
639 | * because it needs 24MHz clock to operate WM8994 codec. | |
640 | */ | |
641 | __raw_writel(__raw_readl(S5P_OTHERS) | (0x3 << 8), S5P_OTHERS); | |
642 | } | |
643 | ||
d947e792 MS |
644 | static void __init aquila_map_io(void) |
645 | { | |
646 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | |
647 | s3c24xx_init_clocks(24000000); | |
df01714a | 648 | s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); |
d947e792 MS |
649 | } |
650 | ||
651 | static void __init aquila_machine_init(void) | |
652 | { | |
a1660c12 MS |
653 | /* PMIC */ |
654 | aquila_pmic_init(); | |
655 | i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs, | |
656 | ARRAY_SIZE(i2c_gpio_pmic_devs)); | |
ba3fbef9 MS |
657 | /* SDHCI */ |
658 | aquila_setup_sdhci(); | |
a1660c12 | 659 | |
187749bb SN |
660 | s3c_fimc_setname(0, "s5p-fimc"); |
661 | s3c_fimc_setname(1, "s5p-fimc"); | |
662 | s3c_fimc_setname(2, "s5p-fimc"); | |
663 | ||
5112267e | 664 | /* SOUND */ |
6c29e71c | 665 | aquila_sound_init(); |
5112267e CC |
666 | i2c_register_board_info(AP_I2C_GPIO_BUS_5, i2c_gpio5_devs, |
667 | ARRAY_SIZE(i2c_gpio5_devs)); | |
668 | ||
b315032f MS |
669 | /* FB */ |
670 | s3c_fb_set_platdata(&aquila_lcd_pdata); | |
671 | ||
d947e792 MS |
672 | platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices)); |
673 | } | |
674 | ||
675 | MACHINE_START(AQUILA, "Aquila") | |
676 | /* Maintainers: | |
677 | Marek Szyprowski <m.szyprowski@samsung.com> | |
678 | Kyungmin Park <kyungmin.park@samsung.com> */ | |
d947e792 MS |
679 | .boot_params = S5P_PA_SDRAM + 0x100, |
680 | .init_irq = s5pv210_init_irq, | |
681 | .map_io = aquila_map_io, | |
682 | .init_machine = aquila_machine_init, | |
683 | .timer = &s3c24xx_timer, | |
684 | MACHINE_END |