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d947e792 MS |
1 | /* linux/arch/arm/mach-s5pv210/mach-aquila.c |
2 | * | |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com/ | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/types.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/serial_core.h> | |
b315032f | 15 | #include <linux/fb.h> |
a1660c12 MS |
16 | #include <linux/i2c.h> |
17 | #include <linux/i2c-gpio.h> | |
18 | #include <linux/mfd/max8998.h> | |
80849798 CC |
19 | #include <linux/mfd/wm8994/pdata.h> |
20 | #include <linux/regulator/fixed.h> | |
a1660c12 MS |
21 | #include <linux/gpio_keys.h> |
22 | #include <linux/input.h> | |
23 | #include <linux/gpio.h> | |
d947e792 | 24 | |
bb3a4ebe | 25 | #include <asm/hardware/vic.h> |
d947e792 MS |
26 | #include <asm/mach/arch.h> |
27 | #include <asm/mach/map.h> | |
28 | #include <asm/setup.h> | |
29 | #include <asm/mach-types.h> | |
30 | ||
31 | #include <mach/map.h> | |
32 | #include <mach/regs-clock.h> | |
33 | ||
a1660c12 | 34 | #include <plat/gpio-cfg.h> |
d947e792 | 35 | #include <plat/regs-serial.h> |
d947e792 MS |
36 | #include <plat/devs.h> |
37 | #include <plat/cpu.h> | |
b315032f | 38 | #include <plat/fb.h> |
187749bb | 39 | #include <plat/fimc-core.h> |
ba3fbef9 | 40 | #include <plat/sdhci.h> |
20780fcc | 41 | #include <plat/s5p-time.h> |
7bf3ba6b | 42 | #include <plat/regs-fb-v4.h> |
d947e792 | 43 | |
3fa754c2 KK |
44 | #include "common.h" |
45 | ||
d947e792 | 46 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
c8def085 | 47 | #define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
d947e792 MS |
48 | S3C2410_UCON_RXILEVEL | \ |
49 | S3C2410_UCON_TXIRQMODE | \ | |
50 | S3C2410_UCON_RXIRQMODE | \ | |
51 | S3C2410_UCON_RXFIFO_TOI | \ | |
52 | S3C2443_UCON_RXERR_IRQEN) | |
53 | ||
c8def085 | 54 | #define AQUILA_ULCON_DEFAULT S3C2410_LCON_CS8 |
d947e792 | 55 | |
f2b7e3c5 | 56 | #define AQUILA_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE |
d947e792 | 57 | |
df01714a | 58 | static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = { |
d947e792 MS |
59 | [0] = { |
60 | .hwport = 0, | |
61 | .flags = 0, | |
c8def085 KK |
62 | .ucon = AQUILA_UCON_DEFAULT, |
63 | .ulcon = AQUILA_ULCON_DEFAULT, | |
df01714a JS |
64 | /* |
65 | * Actually UART0 can support 256 bytes fifo, but aquila board | |
66 | * supports 128 bytes fifo because of initial chip bug | |
67 | */ | |
f2b7e3c5 | 68 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 69 | S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128, |
d947e792 MS |
70 | }, |
71 | [1] = { | |
72 | .hwport = 1, | |
73 | .flags = 0, | |
c8def085 KK |
74 | .ucon = AQUILA_UCON_DEFAULT, |
75 | .ulcon = AQUILA_ULCON_DEFAULT, | |
f2b7e3c5 | 76 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 77 | S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64, |
d947e792 MS |
78 | }, |
79 | [2] = { | |
80 | .hwport = 2, | |
81 | .flags = 0, | |
c8def085 KK |
82 | .ucon = AQUILA_UCON_DEFAULT, |
83 | .ulcon = AQUILA_ULCON_DEFAULT, | |
f2b7e3c5 | 84 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 85 | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, |
d947e792 MS |
86 | }, |
87 | [3] = { | |
88 | .hwport = 3, | |
89 | .flags = 0, | |
c8def085 KK |
90 | .ucon = AQUILA_UCON_DEFAULT, |
91 | .ulcon = AQUILA_ULCON_DEFAULT, | |
f2b7e3c5 | 92 | .ufcon = AQUILA_UFCON_DEFAULT | |
df01714a | 93 | S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, |
d947e792 MS |
94 | }, |
95 | }; | |
96 | ||
b315032f MS |
97 | /* Frame Buffer */ |
98 | static struct s3c_fb_pd_win aquila_fb_win0 = { | |
99 | .win_mode = { | |
b315032f MS |
100 | .left_margin = 16, |
101 | .right_margin = 16, | |
102 | .upper_margin = 3, | |
103 | .lower_margin = 28, | |
104 | .hsync_len = 2, | |
105 | .vsync_len = 2, | |
106 | .xres = 480, | |
107 | .yres = 800, | |
108 | }, | |
109 | .max_bpp = 32, | |
110 | .default_bpp = 16, | |
111 | }; | |
112 | ||
113 | static struct s3c_fb_pd_win aquila_fb_win1 = { | |
114 | .win_mode = { | |
b315032f MS |
115 | .left_margin = 16, |
116 | .right_margin = 16, | |
117 | .upper_margin = 3, | |
118 | .lower_margin = 28, | |
119 | .hsync_len = 2, | |
120 | .vsync_len = 2, | |
121 | .xres = 480, | |
122 | .yres = 800, | |
123 | }, | |
124 | .max_bpp = 32, | |
125 | .default_bpp = 16, | |
126 | }; | |
127 | ||
128 | static struct s3c_fb_platdata aquila_lcd_pdata __initdata = { | |
129 | .win[0] = &aquila_fb_win0, | |
130 | .win[1] = &aquila_fb_win1, | |
131 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | |
132 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | | |
133 | VIDCON1_INV_VCLK | VIDCON1_INV_VDEN, | |
134 | .setup_gpio = s5pv210_fb_gpio_setup_24bpp, | |
135 | }; | |
136 | ||
a1660c12 MS |
137 | /* MAX8998 regulators */ |
138 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | |
139 | ||
140 | static struct regulator_init_data aquila_ldo2_data = { | |
141 | .constraints = { | |
142 | .name = "VALIVE_1.1V", | |
143 | .min_uV = 1100000, | |
144 | .max_uV = 1100000, | |
145 | .apply_uV = 1, | |
146 | .always_on = 1, | |
147 | .state_mem = { | |
148 | .enabled = 1, | |
149 | }, | |
150 | }, | |
151 | }; | |
152 | ||
153 | static struct regulator_init_data aquila_ldo3_data = { | |
154 | .constraints = { | |
d1061331 | 155 | .name = "VUSB+MIPI_1.1V", |
a1660c12 MS |
156 | .min_uV = 1100000, |
157 | .max_uV = 1100000, | |
158 | .apply_uV = 1, | |
159 | .always_on = 1, | |
160 | }, | |
161 | }; | |
162 | ||
163 | static struct regulator_init_data aquila_ldo4_data = { | |
164 | .constraints = { | |
165 | .name = "VDAC_3.3V", | |
166 | .min_uV = 3300000, | |
167 | .max_uV = 3300000, | |
168 | .apply_uV = 1, | |
169 | }, | |
170 | }; | |
171 | ||
172 | static struct regulator_init_data aquila_ldo5_data = { | |
173 | .constraints = { | |
174 | .name = "VTF_2.8V", | |
175 | .min_uV = 2800000, | |
176 | .max_uV = 2800000, | |
177 | .apply_uV = 1, | |
178 | }, | |
179 | }; | |
180 | ||
181 | static struct regulator_init_data aquila_ldo6_data = { | |
182 | .constraints = { | |
183 | .name = "VCC_3.3V", | |
184 | .min_uV = 3300000, | |
185 | .max_uV = 3300000, | |
186 | .apply_uV = 1, | |
187 | }, | |
188 | }; | |
189 | ||
190 | static struct regulator_init_data aquila_ldo7_data = { | |
191 | .constraints = { | |
192 | .name = "VCC_3.0V", | |
193 | .min_uV = 3000000, | |
194 | .max_uV = 3000000, | |
195 | .apply_uV = 1, | |
196 | .boot_on = 1, | |
197 | .always_on = 1, | |
198 | }, | |
199 | }; | |
200 | ||
201 | static struct regulator_init_data aquila_ldo8_data = { | |
202 | .constraints = { | |
d1061331 | 203 | .name = "VUSB+VADC_3.3V", |
a1660c12 MS |
204 | .min_uV = 3300000, |
205 | .max_uV = 3300000, | |
206 | .apply_uV = 1, | |
207 | .always_on = 1, | |
208 | }, | |
209 | }; | |
210 | ||
211 | static struct regulator_init_data aquila_ldo9_data = { | |
212 | .constraints = { | |
d1061331 | 213 | .name = "VCC+VCAM_2.8V", |
a1660c12 MS |
214 | .min_uV = 2800000, |
215 | .max_uV = 2800000, | |
216 | .apply_uV = 1, | |
217 | .always_on = 1, | |
218 | }, | |
219 | }; | |
220 | ||
221 | static struct regulator_init_data aquila_ldo10_data = { | |
222 | .constraints = { | |
223 | .name = "VPLL_1.1V", | |
224 | .min_uV = 1100000, | |
225 | .max_uV = 1100000, | |
226 | .apply_uV = 1, | |
227 | .boot_on = 1, | |
228 | }, | |
229 | }; | |
230 | ||
231 | static struct regulator_init_data aquila_ldo11_data = { | |
232 | .constraints = { | |
233 | .name = "CAM_IO_2.8V", | |
234 | .min_uV = 2800000, | |
235 | .max_uV = 2800000, | |
236 | .apply_uV = 1, | |
237 | .always_on = 1, | |
238 | }, | |
239 | }; | |
240 | ||
241 | static struct regulator_init_data aquila_ldo12_data = { | |
242 | .constraints = { | |
243 | .name = "CAM_ISP_1.2V", | |
244 | .min_uV = 1200000, | |
245 | .max_uV = 1200000, | |
246 | .apply_uV = 1, | |
247 | .always_on = 1, | |
248 | }, | |
249 | }; | |
250 | ||
251 | static struct regulator_init_data aquila_ldo13_data = { | |
252 | .constraints = { | |
253 | .name = "CAM_A_2.8V", | |
254 | .min_uV = 2800000, | |
255 | .max_uV = 2800000, | |
256 | .apply_uV = 1, | |
257 | .always_on = 1, | |
258 | }, | |
259 | }; | |
260 | ||
261 | static struct regulator_init_data aquila_ldo14_data = { | |
262 | .constraints = { | |
263 | .name = "CAM_CIF_1.8V", | |
264 | .min_uV = 1800000, | |
265 | .max_uV = 1800000, | |
266 | .apply_uV = 1, | |
267 | .always_on = 1, | |
268 | }, | |
269 | }; | |
270 | ||
271 | static struct regulator_init_data aquila_ldo15_data = { | |
272 | .constraints = { | |
273 | .name = "CAM_AF_3.3V", | |
274 | .min_uV = 3300000, | |
275 | .max_uV = 3300000, | |
276 | .apply_uV = 1, | |
277 | .always_on = 1, | |
278 | }, | |
279 | }; | |
280 | ||
281 | static struct regulator_init_data aquila_ldo16_data = { | |
282 | .constraints = { | |
283 | .name = "VMIPI_1.8V", | |
284 | .min_uV = 1800000, | |
285 | .max_uV = 1800000, | |
286 | .apply_uV = 1, | |
287 | .always_on = 1, | |
288 | }, | |
289 | }; | |
290 | ||
291 | static struct regulator_init_data aquila_ldo17_data = { | |
292 | .constraints = { | |
293 | .name = "CAM_8M_1.8V", | |
294 | .min_uV = 1800000, | |
295 | .max_uV = 1800000, | |
296 | .apply_uV = 1, | |
297 | .always_on = 1, | |
298 | }, | |
299 | }; | |
300 | ||
301 | /* BUCK */ | |
d3f9c570 KK |
302 | static struct regulator_consumer_supply buck1_consumer = |
303 | REGULATOR_SUPPLY("vddarm", NULL); | |
a1660c12 | 304 | |
d3f9c570 KK |
305 | static struct regulator_consumer_supply buck2_consumer = |
306 | REGULATOR_SUPPLY("vddint", NULL); | |
a1660c12 MS |
307 | |
308 | static struct regulator_init_data aquila_buck1_data = { | |
309 | .constraints = { | |
310 | .name = "VARM_1.2V", | |
311 | .min_uV = 1200000, | |
312 | .max_uV = 1200000, | |
313 | .apply_uV = 1, | |
314 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
315 | REGULATOR_CHANGE_STATUS, | |
316 | }, | |
d3f9c570 KK |
317 | .num_consumer_supplies = 1, |
318 | .consumer_supplies = &buck1_consumer, | |
a1660c12 MS |
319 | }; |
320 | ||
321 | static struct regulator_init_data aquila_buck2_data = { | |
322 | .constraints = { | |
323 | .name = "VINT_1.2V", | |
324 | .min_uV = 1200000, | |
325 | .max_uV = 1200000, | |
326 | .apply_uV = 1, | |
327 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
328 | REGULATOR_CHANGE_STATUS, | |
329 | }, | |
d3f9c570 KK |
330 | .num_consumer_supplies = 1, |
331 | .consumer_supplies = &buck2_consumer, | |
a1660c12 MS |
332 | }; |
333 | ||
334 | static struct regulator_init_data aquila_buck3_data = { | |
335 | .constraints = { | |
336 | .name = "VCC_1.8V", | |
337 | .min_uV = 1800000, | |
338 | .max_uV = 1800000, | |
339 | .apply_uV = 1, | |
340 | .state_mem = { | |
341 | .enabled = 1, | |
342 | }, | |
343 | }, | |
344 | }; | |
345 | ||
346 | static struct regulator_init_data aquila_buck4_data = { | |
347 | .constraints = { | |
348 | .name = "CAM_CORE_1.2V", | |
349 | .min_uV = 1200000, | |
350 | .max_uV = 1200000, | |
351 | .apply_uV = 1, | |
352 | .always_on = 1, | |
353 | }, | |
354 | }; | |
355 | ||
356 | static struct max8998_regulator_data aquila_regulators[] = { | |
357 | { MAX8998_LDO2, &aquila_ldo2_data }, | |
358 | { MAX8998_LDO3, &aquila_ldo3_data }, | |
359 | { MAX8998_LDO4, &aquila_ldo4_data }, | |
360 | { MAX8998_LDO5, &aquila_ldo5_data }, | |
361 | { MAX8998_LDO6, &aquila_ldo6_data }, | |
362 | { MAX8998_LDO7, &aquila_ldo7_data }, | |
363 | { MAX8998_LDO8, &aquila_ldo8_data }, | |
364 | { MAX8998_LDO9, &aquila_ldo9_data }, | |
365 | { MAX8998_LDO10, &aquila_ldo10_data }, | |
366 | { MAX8998_LDO11, &aquila_ldo11_data }, | |
367 | { MAX8998_LDO12, &aquila_ldo12_data }, | |
368 | { MAX8998_LDO13, &aquila_ldo13_data }, | |
369 | { MAX8998_LDO14, &aquila_ldo14_data }, | |
370 | { MAX8998_LDO15, &aquila_ldo15_data }, | |
371 | { MAX8998_LDO16, &aquila_ldo16_data }, | |
372 | { MAX8998_LDO17, &aquila_ldo17_data }, | |
373 | { MAX8998_BUCK1, &aquila_buck1_data }, | |
374 | { MAX8998_BUCK2, &aquila_buck2_data }, | |
375 | { MAX8998_BUCK3, &aquila_buck3_data }, | |
376 | { MAX8998_BUCK4, &aquila_buck4_data }, | |
377 | }; | |
378 | ||
379 | static struct max8998_platform_data aquila_max8998_pdata = { | |
380 | .num_regulators = ARRAY_SIZE(aquila_regulators), | |
381 | .regulators = aquila_regulators, | |
cb186886 MS |
382 | .buck1_set1 = S5PV210_GPH0(3), |
383 | .buck1_set2 = S5PV210_GPH0(4), | |
384 | .buck2_set3 = S5PV210_GPH0(5), | |
979f395d MS |
385 | .buck1_voltage1 = 1200000, |
386 | .buck1_voltage2 = 1200000, | |
387 | .buck1_voltage3 = 1200000, | |
388 | .buck1_voltage4 = 1200000, | |
389 | .buck2_voltage1 = 1200000, | |
390 | .buck2_voltage2 = 1200000, | |
a1660c12 MS |
391 | }; |
392 | #endif | |
393 | ||
80849798 | 394 | static struct regulator_consumer_supply wm8994_fixed_voltage0_supplies[] = { |
d3f9c570 KK |
395 | REGULATOR_SUPPLY("DBVDD", "5-001a"), |
396 | REGULATOR_SUPPLY("AVDD2", "5-001a"), | |
397 | REGULATOR_SUPPLY("CPVDD", "5-001a"), | |
80849798 CC |
398 | }; |
399 | ||
400 | static struct regulator_consumer_supply wm8994_fixed_voltage1_supplies[] = { | |
d3f9c570 KK |
401 | REGULATOR_SUPPLY("SPKVDD1", "5-001a"), |
402 | REGULATOR_SUPPLY("SPKVDD2", "5-001a"), | |
80849798 CC |
403 | }; |
404 | ||
405 | static struct regulator_init_data wm8994_fixed_voltage0_init_data = { | |
406 | .constraints = { | |
407 | .always_on = 1, | |
408 | }, | |
409 | .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage0_supplies), | |
410 | .consumer_supplies = wm8994_fixed_voltage0_supplies, | |
411 | }; | |
412 | ||
413 | static struct regulator_init_data wm8994_fixed_voltage1_init_data = { | |
414 | .constraints = { | |
415 | .always_on = 1, | |
416 | }, | |
417 | .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage1_supplies), | |
418 | .consumer_supplies = wm8994_fixed_voltage1_supplies, | |
419 | }; | |
420 | ||
421 | static struct fixed_voltage_config wm8994_fixed_voltage0_config = { | |
422 | .supply_name = "VCC_1.8V_PDA", | |
423 | .microvolts = 1800000, | |
424 | .gpio = -EINVAL, | |
425 | .init_data = &wm8994_fixed_voltage0_init_data, | |
426 | }; | |
427 | ||
428 | static struct fixed_voltage_config wm8994_fixed_voltage1_config = { | |
429 | .supply_name = "V_BAT", | |
430 | .microvolts = 3700000, | |
431 | .gpio = -EINVAL, | |
432 | .init_data = &wm8994_fixed_voltage1_init_data, | |
433 | }; | |
434 | ||
435 | static struct platform_device wm8994_fixed_voltage0 = { | |
436 | .name = "reg-fixed-voltage", | |
437 | .id = 0, | |
438 | .dev = { | |
439 | .platform_data = &wm8994_fixed_voltage0_config, | |
440 | }, | |
441 | }; | |
442 | ||
443 | static struct platform_device wm8994_fixed_voltage1 = { | |
444 | .name = "reg-fixed-voltage", | |
445 | .id = 1, | |
446 | .dev = { | |
447 | .platform_data = &wm8994_fixed_voltage1_config, | |
448 | }, | |
449 | }; | |
450 | ||
d3f9c570 KK |
451 | static struct regulator_consumer_supply wm8994_avdd1_supply = |
452 | REGULATOR_SUPPLY("AVDD1", "5-001a"); | |
80849798 | 453 | |
d3f9c570 KK |
454 | static struct regulator_consumer_supply wm8994_dcvdd_supply = |
455 | REGULATOR_SUPPLY("DCVDD", "5-001a"); | |
80849798 CC |
456 | |
457 | static struct regulator_init_data wm8994_ldo1_data = { | |
458 | .constraints = { | |
459 | .name = "AVDD1_3.0V", | |
460 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
461 | }, | |
462 | .num_consumer_supplies = 1, | |
463 | .consumer_supplies = &wm8994_avdd1_supply, | |
464 | }; | |
465 | ||
466 | static struct regulator_init_data wm8994_ldo2_data = { | |
467 | .constraints = { | |
468 | .name = "DCVDD_1.0V", | |
469 | }, | |
470 | .num_consumer_supplies = 1, | |
471 | .consumer_supplies = &wm8994_dcvdd_supply, | |
472 | }; | |
473 | ||
474 | static struct wm8994_pdata wm8994_platform_data = { | |
475 | /* configure gpio1 function: 0x0001(Logic level input/output) */ | |
476 | .gpio_defaults[0] = 0x0001, | |
477 | /* configure gpio3/4/5/7 function for AIF2 voice */ | |
478 | .gpio_defaults[2] = 0x8100, | |
479 | .gpio_defaults[3] = 0x8100, | |
480 | .gpio_defaults[4] = 0x8100, | |
481 | .gpio_defaults[6] = 0x0100, | |
482 | /* configure gpio8/9/10/11 function for AIF3 BT */ | |
483 | .gpio_defaults[7] = 0x8100, | |
484 | .gpio_defaults[8] = 0x0100, | |
485 | .gpio_defaults[9] = 0x0100, | |
486 | .gpio_defaults[10] = 0x0100, | |
487 | .ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */ | |
488 | .ldo[1] = { 0, NULL, &wm8994_ldo2_data }, | |
489 | }; | |
490 | ||
a1660c12 MS |
491 | /* GPIO I2C PMIC */ |
492 | #define AP_I2C_GPIO_PMIC_BUS_4 4 | |
493 | static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = { | |
494 | .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */ | |
495 | .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */ | |
496 | }; | |
497 | ||
498 | static struct platform_device aquila_i2c_gpio_pmic = { | |
499 | .name = "i2c-gpio", | |
500 | .id = AP_I2C_GPIO_PMIC_BUS_4, | |
501 | .dev = { | |
502 | .platform_data = &aquila_i2c_gpio_pmic_data, | |
503 | }, | |
504 | }; | |
505 | ||
506 | static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = { | |
507 | #if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) | |
508 | { | |
509 | /* 0xCC when SRAD = 0 */ | |
510 | I2C_BOARD_INFO("max8998", 0xCC >> 1), | |
511 | .platform_data = &aquila_max8998_pdata, | |
512 | }, | |
513 | #endif | |
514 | }; | |
515 | ||
5112267e CC |
516 | /* GPIO I2C AP 1.8V */ |
517 | #define AP_I2C_GPIO_BUS_5 5 | |
518 | static struct i2c_gpio_platform_data aquila_i2c_gpio5_data = { | |
519 | .sda_pin = S5PV210_MP05(3), /* XM0ADDR_11 */ | |
520 | .scl_pin = S5PV210_MP05(2), /* XM0ADDR_10 */ | |
521 | }; | |
522 | ||
523 | static struct platform_device aquila_i2c_gpio5 = { | |
524 | .name = "i2c-gpio", | |
525 | .id = AP_I2C_GPIO_BUS_5, | |
526 | .dev = { | |
527 | .platform_data = &aquila_i2c_gpio5_data, | |
528 | }, | |
529 | }; | |
530 | ||
531 | static struct i2c_board_info i2c_gpio5_devs[] __initdata = { | |
532 | { | |
533 | /* CS/ADDR = low 0x34 (FYI: high = 0x36) */ | |
534 | I2C_BOARD_INFO("wm8994", 0x1a), | |
80849798 | 535 | .platform_data = &wm8994_platform_data, |
5112267e CC |
536 | }, |
537 | }; | |
538 | ||
a1660c12 MS |
539 | /* PMIC Power button */ |
540 | static struct gpio_keys_button aquila_gpio_keys_table[] = { | |
541 | { | |
542 | .code = KEY_POWER, | |
543 | .gpio = S5PV210_GPH2(6), | |
544 | .desc = "gpio-keys: KEY_POWER", | |
545 | .type = EV_KEY, | |
546 | .active_low = 1, | |
547 | .wakeup = 1, | |
548 | .debounce_interval = 1, | |
549 | }, | |
550 | }; | |
551 | ||
552 | static struct gpio_keys_platform_data aquila_gpio_keys_data = { | |
553 | .buttons = aquila_gpio_keys_table, | |
554 | .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table), | |
555 | }; | |
556 | ||
557 | static struct platform_device aquila_device_gpiokeys = { | |
558 | .name = "gpio-keys", | |
559 | .dev = { | |
560 | .platform_data = &aquila_gpio_keys_data, | |
561 | }, | |
562 | }; | |
563 | ||
564 | static void __init aquila_pmic_init(void) | |
565 | { | |
566 | /* AP_PMIC_IRQ: EINT7 */ | |
567 | s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf)); | |
568 | s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP); | |
569 | ||
570 | /* nPower: EINT22 */ | |
571 | s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf)); | |
572 | s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP); | |
573 | } | |
574 | ||
ba3fbef9 MS |
575 | /* MoviNAND */ |
576 | static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = { | |
577 | .max_width = 4, | |
578 | .cd_type = S3C_SDHCI_CD_PERMANENT, | |
579 | }; | |
580 | ||
581 | /* Wireless LAN */ | |
582 | static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = { | |
583 | .max_width = 4, | |
584 | .cd_type = S3C_SDHCI_CD_EXTERNAL, | |
585 | /* ext_cd_{init,cleanup} callbacks will be added later */ | |
586 | }; | |
587 | ||
588 | /* External Flash */ | |
589 | #define AQUILA_EXT_FLASH_EN S5PV210_MP05(4) | |
590 | #define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4) | |
591 | static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = { | |
592 | .max_width = 4, | |
593 | .cd_type = S3C_SDHCI_CD_GPIO, | |
594 | .ext_cd_gpio = AQUILA_EXT_FLASH_CD, | |
595 | .ext_cd_gpio_invert = 1, | |
596 | }; | |
597 | ||
598 | static void aquila_setup_sdhci(void) | |
599 | { | |
2f4f0b42 | 600 | gpio_request_one(AQUILA_EXT_FLASH_EN, GPIOF_OUT_INIT_HIGH, "FLASH_EN"); |
ba3fbef9 MS |
601 | |
602 | s3c_sdhci0_set_platdata(&aquila_hsmmc0_data); | |
603 | s3c_sdhci1_set_platdata(&aquila_hsmmc1_data); | |
604 | s3c_sdhci2_set_platdata(&aquila_hsmmc2_data); | |
605 | }; | |
606 | ||
d947e792 | 607 | static struct platform_device *aquila_devices[] __initdata = { |
a1660c12 | 608 | &aquila_i2c_gpio_pmic, |
5112267e | 609 | &aquila_i2c_gpio5, |
a1660c12 | 610 | &aquila_device_gpiokeys, |
b315032f | 611 | &s3c_device_fb, |
13904fba | 612 | &s5p_device_onenand, |
ba3fbef9 MS |
613 | &s3c_device_hsmmc0, |
614 | &s3c_device_hsmmc1, | |
615 | &s3c_device_hsmmc2, | |
7200c11d SN |
616 | &s5p_device_fimc0, |
617 | &s5p_device_fimc1, | |
618 | &s5p_device_fimc2, | |
48c18756 | 619 | &s5p_device_fimc_md, |
6c29e71c | 620 | &s5pv210_device_iis0, |
80849798 CC |
621 | &wm8994_fixed_voltage0, |
622 | &wm8994_fixed_voltage1, | |
d947e792 MS |
623 | }; |
624 | ||
6c29e71c CC |
625 | static void __init aquila_sound_init(void) |
626 | { | |
627 | unsigned int gpio; | |
628 | ||
629 | /* CODEC_XTAL_EN | |
630 | * | |
631 | * The Aquila board have a oscillator which provide main clock | |
632 | * to WM8994 codec. The oscillator provide 24MHz clock to WM8994 | |
633 | * clock. Set gpio setting of "CODEC_XTAL_EN" to enable a oscillator. | |
634 | * */ | |
635 | gpio = S5PV210_GPH3(2); /* XEINT_26 */ | |
636 | gpio_request(gpio, "CODEC_XTAL_EN"); | |
637 | s3c_gpio_cfgpin(gpio, S3C_GPIO_OUTPUT); | |
638 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | |
639 | ||
640 | /* Ths main clock of WM8994 codec uses the output of CLKOUT pin. | |
641 | * The CLKOUT[9:8] set to 0x3(XUSBXTI) of 0xE010E000(OTHERS) | |
642 | * because it needs 24MHz clock to operate WM8994 codec. | |
643 | */ | |
644 | __raw_writel(__raw_readl(S5P_OTHERS) | (0x3 << 8), S5P_OTHERS); | |
645 | } | |
646 | ||
d947e792 MS |
647 | static void __init aquila_map_io(void) |
648 | { | |
3fa754c2 | 649 | s5pv210_init_io(NULL, 0); |
d947e792 | 650 | s3c24xx_init_clocks(24000000); |
df01714a | 651 | s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); |
20780fcc | 652 | s5p_set_timer_source(S5P_PWM3, S5P_PWM4); |
d947e792 MS |
653 | } |
654 | ||
655 | static void __init aquila_machine_init(void) | |
656 | { | |
a1660c12 MS |
657 | /* PMIC */ |
658 | aquila_pmic_init(); | |
659 | i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs, | |
660 | ARRAY_SIZE(i2c_gpio_pmic_devs)); | |
ba3fbef9 MS |
661 | /* SDHCI */ |
662 | aquila_setup_sdhci(); | |
a1660c12 | 663 | |
187749bb SN |
664 | s3c_fimc_setname(0, "s5p-fimc"); |
665 | s3c_fimc_setname(1, "s5p-fimc"); | |
666 | s3c_fimc_setname(2, "s5p-fimc"); | |
667 | ||
5112267e | 668 | /* SOUND */ |
6c29e71c | 669 | aquila_sound_init(); |
5112267e CC |
670 | i2c_register_board_info(AP_I2C_GPIO_BUS_5, i2c_gpio5_devs, |
671 | ARRAY_SIZE(i2c_gpio5_devs)); | |
672 | ||
b315032f MS |
673 | /* FB */ |
674 | s3c_fb_set_platdata(&aquila_lcd_pdata); | |
675 | ||
d947e792 MS |
676 | platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices)); |
677 | } | |
678 | ||
679 | MACHINE_START(AQUILA, "Aquila") | |
680 | /* Maintainers: | |
681 | Marek Szyprowski <m.szyprowski@samsung.com> | |
682 | Kyungmin Park <kyungmin.park@samsung.com> */ | |
02350a1f | 683 | .atag_offset = 0x100, |
d947e792 | 684 | .init_irq = s5pv210_init_irq, |
bb3a4ebe | 685 | .handle_irq = vic_handle_irq, |
d947e792 MS |
686 | .map_io = aquila_map_io, |
687 | .init_machine = aquila_machine_init, | |
20780fcc | 688 | .timer = &s5p_timer, |
1f34f0e2 | 689 | .restart = s5pv210_restart, |
d947e792 | 690 | MACHINE_END |