Merge tag 'power-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux...
[deliverable/linux.git] / arch / arm / mach-s5pv210 / mach-aquila.c
CommitLineData
d947e792
MS
1/* linux/arch/arm/mach-s5pv210/mach-aquila.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
334a1c70 15#include <linux/serial_s3c.h>
b315032f 16#include <linux/fb.h>
a1660c12
MS
17#include <linux/i2c.h>
18#include <linux/i2c-gpio.h>
19#include <linux/mfd/max8998.h>
80849798
CC
20#include <linux/mfd/wm8994/pdata.h>
21#include <linux/regulator/fixed.h>
a1660c12
MS
22#include <linux/gpio_keys.h>
23#include <linux/input.h>
24#include <linux/gpio.h>
d947e792
MS
25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/setup.h>
29#include <asm/mach-types.h>
30
5a213a55 31#include <video/samsung_fimd.h>
d947e792
MS
32#include <mach/map.h>
33#include <mach/regs-clock.h>
34
a1660c12 35#include <plat/gpio-cfg.h>
d947e792
MS
36#include <plat/devs.h>
37#include <plat/cpu.h>
b315032f 38#include <plat/fb.h>
187749bb 39#include <plat/fimc-core.h>
ba3fbef9 40#include <plat/sdhci.h>
c1fcd403 41#include <plat/samsung-time.h>
d947e792 42
3fa754c2
KK
43#include "common.h"
44
d947e792 45/* Following are default values for UCON, ULCON and UFCON UART registers */
c8def085 46#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
d947e792
MS
47 S3C2410_UCON_RXILEVEL | \
48 S3C2410_UCON_TXIRQMODE | \
49 S3C2410_UCON_RXIRQMODE | \
50 S3C2410_UCON_RXFIFO_TOI | \
51 S3C2443_UCON_RXERR_IRQEN)
52
c8def085 53#define AQUILA_ULCON_DEFAULT S3C2410_LCON_CS8
d947e792 54
f2b7e3c5 55#define AQUILA_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
d947e792 56
df01714a 57static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
d947e792
MS
58 [0] = {
59 .hwport = 0,
60 .flags = 0,
c8def085
KK
61 .ucon = AQUILA_UCON_DEFAULT,
62 .ulcon = AQUILA_ULCON_DEFAULT,
df01714a
JS
63 /*
64 * Actually UART0 can support 256 bytes fifo, but aquila board
65 * supports 128 bytes fifo because of initial chip bug
66 */
f2b7e3c5 67 .ufcon = AQUILA_UFCON_DEFAULT |
df01714a 68 S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128,
d947e792
MS
69 },
70 [1] = {
71 .hwport = 1,
72 .flags = 0,
c8def085
KK
73 .ucon = AQUILA_UCON_DEFAULT,
74 .ulcon = AQUILA_ULCON_DEFAULT,
f2b7e3c5 75 .ufcon = AQUILA_UFCON_DEFAULT |
df01714a 76 S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
d947e792
MS
77 },
78 [2] = {
79 .hwport = 2,
80 .flags = 0,
c8def085
KK
81 .ucon = AQUILA_UCON_DEFAULT,
82 .ulcon = AQUILA_ULCON_DEFAULT,
f2b7e3c5 83 .ufcon = AQUILA_UFCON_DEFAULT |
df01714a 84 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
d947e792
MS
85 },
86 [3] = {
87 .hwport = 3,
88 .flags = 0,
c8def085
KK
89 .ucon = AQUILA_UCON_DEFAULT,
90 .ulcon = AQUILA_ULCON_DEFAULT,
f2b7e3c5 91 .ufcon = AQUILA_UFCON_DEFAULT |
df01714a 92 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
d947e792
MS
93 },
94};
95
b315032f
MS
96/* Frame Buffer */
97static struct s3c_fb_pd_win aquila_fb_win0 = {
b315032f
MS
98 .max_bpp = 32,
99 .default_bpp = 16,
79d3c41a
TA
100 .xres = 480,
101 .yres = 800,
b315032f
MS
102};
103
104static struct s3c_fb_pd_win aquila_fb_win1 = {
b315032f
MS
105 .max_bpp = 32,
106 .default_bpp = 16,
79d3c41a
TA
107 .xres = 480,
108 .yres = 800,
109};
110
111static struct fb_videomode aquila_lcd_timing = {
112 .left_margin = 16,
113 .right_margin = 16,
114 .upper_margin = 3,
115 .lower_margin = 28,
116 .hsync_len = 2,
117 .vsync_len = 2,
118 .xres = 480,
119 .yres = 800,
b315032f
MS
120};
121
122static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
123 .win[0] = &aquila_fb_win0,
124 .win[1] = &aquila_fb_win1,
79d3c41a 125 .vtiming = &aquila_lcd_timing,
b315032f
MS
126 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
127 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
128 VIDCON1_INV_VCLK | VIDCON1_INV_VDEN,
129 .setup_gpio = s5pv210_fb_gpio_setup_24bpp,
130};
131
a1660c12
MS
132/* MAX8998 regulators */
133#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
134
135static struct regulator_init_data aquila_ldo2_data = {
136 .constraints = {
137 .name = "VALIVE_1.1V",
138 .min_uV = 1100000,
139 .max_uV = 1100000,
140 .apply_uV = 1,
141 .always_on = 1,
142 .state_mem = {
143 .enabled = 1,
144 },
145 },
146};
147
148static struct regulator_init_data aquila_ldo3_data = {
149 .constraints = {
d1061331 150 .name = "VUSB+MIPI_1.1V",
a1660c12
MS
151 .min_uV = 1100000,
152 .max_uV = 1100000,
153 .apply_uV = 1,
154 .always_on = 1,
155 },
156};
157
158static struct regulator_init_data aquila_ldo4_data = {
159 .constraints = {
160 .name = "VDAC_3.3V",
161 .min_uV = 3300000,
162 .max_uV = 3300000,
163 .apply_uV = 1,
164 },
165};
166
167static struct regulator_init_data aquila_ldo5_data = {
168 .constraints = {
169 .name = "VTF_2.8V",
170 .min_uV = 2800000,
171 .max_uV = 2800000,
172 .apply_uV = 1,
173 },
174};
175
176static struct regulator_init_data aquila_ldo6_data = {
177 .constraints = {
178 .name = "VCC_3.3V",
179 .min_uV = 3300000,
180 .max_uV = 3300000,
181 .apply_uV = 1,
182 },
183};
184
185static struct regulator_init_data aquila_ldo7_data = {
186 .constraints = {
187 .name = "VCC_3.0V",
188 .min_uV = 3000000,
189 .max_uV = 3000000,
190 .apply_uV = 1,
191 .boot_on = 1,
192 .always_on = 1,
193 },
194};
195
196static struct regulator_init_data aquila_ldo8_data = {
197 .constraints = {
d1061331 198 .name = "VUSB+VADC_3.3V",
a1660c12
MS
199 .min_uV = 3300000,
200 .max_uV = 3300000,
201 .apply_uV = 1,
202 .always_on = 1,
203 },
204};
205
206static struct regulator_init_data aquila_ldo9_data = {
207 .constraints = {
d1061331 208 .name = "VCC+VCAM_2.8V",
a1660c12
MS
209 .min_uV = 2800000,
210 .max_uV = 2800000,
211 .apply_uV = 1,
212 .always_on = 1,
213 },
214};
215
216static struct regulator_init_data aquila_ldo10_data = {
217 .constraints = {
218 .name = "VPLL_1.1V",
219 .min_uV = 1100000,
220 .max_uV = 1100000,
221 .apply_uV = 1,
222 .boot_on = 1,
223 },
224};
225
226static struct regulator_init_data aquila_ldo11_data = {
227 .constraints = {
228 .name = "CAM_IO_2.8V",
229 .min_uV = 2800000,
230 .max_uV = 2800000,
231 .apply_uV = 1,
232 .always_on = 1,
233 },
234};
235
236static struct regulator_init_data aquila_ldo12_data = {
237 .constraints = {
238 .name = "CAM_ISP_1.2V",
239 .min_uV = 1200000,
240 .max_uV = 1200000,
241 .apply_uV = 1,
242 .always_on = 1,
243 },
244};
245
246static struct regulator_init_data aquila_ldo13_data = {
247 .constraints = {
248 .name = "CAM_A_2.8V",
249 .min_uV = 2800000,
250 .max_uV = 2800000,
251 .apply_uV = 1,
252 .always_on = 1,
253 },
254};
255
256static struct regulator_init_data aquila_ldo14_data = {
257 .constraints = {
258 .name = "CAM_CIF_1.8V",
259 .min_uV = 1800000,
260 .max_uV = 1800000,
261 .apply_uV = 1,
262 .always_on = 1,
263 },
264};
265
266static struct regulator_init_data aquila_ldo15_data = {
267 .constraints = {
268 .name = "CAM_AF_3.3V",
269 .min_uV = 3300000,
270 .max_uV = 3300000,
271 .apply_uV = 1,
272 .always_on = 1,
273 },
274};
275
276static struct regulator_init_data aquila_ldo16_data = {
277 .constraints = {
278 .name = "VMIPI_1.8V",
279 .min_uV = 1800000,
280 .max_uV = 1800000,
281 .apply_uV = 1,
282 .always_on = 1,
283 },
284};
285
286static struct regulator_init_data aquila_ldo17_data = {
287 .constraints = {
288 .name = "CAM_8M_1.8V",
289 .min_uV = 1800000,
290 .max_uV = 1800000,
291 .apply_uV = 1,
292 .always_on = 1,
293 },
294};
295
296/* BUCK */
d3f9c570
KK
297static struct regulator_consumer_supply buck1_consumer =
298 REGULATOR_SUPPLY("vddarm", NULL);
a1660c12 299
d3f9c570
KK
300static struct regulator_consumer_supply buck2_consumer =
301 REGULATOR_SUPPLY("vddint", NULL);
a1660c12
MS
302
303static struct regulator_init_data aquila_buck1_data = {
304 .constraints = {
305 .name = "VARM_1.2V",
306 .min_uV = 1200000,
307 .max_uV = 1200000,
308 .apply_uV = 1,
309 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
310 REGULATOR_CHANGE_STATUS,
311 },
d3f9c570
KK
312 .num_consumer_supplies = 1,
313 .consumer_supplies = &buck1_consumer,
a1660c12
MS
314};
315
316static struct regulator_init_data aquila_buck2_data = {
317 .constraints = {
318 .name = "VINT_1.2V",
319 .min_uV = 1200000,
320 .max_uV = 1200000,
321 .apply_uV = 1,
322 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
323 REGULATOR_CHANGE_STATUS,
324 },
d3f9c570
KK
325 .num_consumer_supplies = 1,
326 .consumer_supplies = &buck2_consumer,
a1660c12
MS
327};
328
329static struct regulator_init_data aquila_buck3_data = {
330 .constraints = {
331 .name = "VCC_1.8V",
332 .min_uV = 1800000,
333 .max_uV = 1800000,
334 .apply_uV = 1,
335 .state_mem = {
336 .enabled = 1,
337 },
338 },
339};
340
341static struct regulator_init_data aquila_buck4_data = {
342 .constraints = {
343 .name = "CAM_CORE_1.2V",
344 .min_uV = 1200000,
345 .max_uV = 1200000,
346 .apply_uV = 1,
347 .always_on = 1,
348 },
349};
350
351static struct max8998_regulator_data aquila_regulators[] = {
352 { MAX8998_LDO2, &aquila_ldo2_data },
353 { MAX8998_LDO3, &aquila_ldo3_data },
354 { MAX8998_LDO4, &aquila_ldo4_data },
355 { MAX8998_LDO5, &aquila_ldo5_data },
356 { MAX8998_LDO6, &aquila_ldo6_data },
357 { MAX8998_LDO7, &aquila_ldo7_data },
358 { MAX8998_LDO8, &aquila_ldo8_data },
359 { MAX8998_LDO9, &aquila_ldo9_data },
360 { MAX8998_LDO10, &aquila_ldo10_data },
361 { MAX8998_LDO11, &aquila_ldo11_data },
362 { MAX8998_LDO12, &aquila_ldo12_data },
363 { MAX8998_LDO13, &aquila_ldo13_data },
364 { MAX8998_LDO14, &aquila_ldo14_data },
365 { MAX8998_LDO15, &aquila_ldo15_data },
366 { MAX8998_LDO16, &aquila_ldo16_data },
367 { MAX8998_LDO17, &aquila_ldo17_data },
368 { MAX8998_BUCK1, &aquila_buck1_data },
369 { MAX8998_BUCK2, &aquila_buck2_data },
370 { MAX8998_BUCK3, &aquila_buck3_data },
371 { MAX8998_BUCK4, &aquila_buck4_data },
372};
373
374static struct max8998_platform_data aquila_max8998_pdata = {
375 .num_regulators = ARRAY_SIZE(aquila_regulators),
376 .regulators = aquila_regulators,
cb186886
MS
377 .buck1_set1 = S5PV210_GPH0(3),
378 .buck1_set2 = S5PV210_GPH0(4),
379 .buck2_set3 = S5PV210_GPH0(5),
4280e0b4
TF
380 .buck1_voltage = { 1200000, 1200000, 1200000, 1200000 },
381 .buck2_voltage = { 1200000, 1200000 },
a1660c12
MS
382};
383#endif
384
80849798 385static struct regulator_consumer_supply wm8994_fixed_voltage0_supplies[] = {
d3f9c570
KK
386 REGULATOR_SUPPLY("DBVDD", "5-001a"),
387 REGULATOR_SUPPLY("AVDD2", "5-001a"),
388 REGULATOR_SUPPLY("CPVDD", "5-001a"),
80849798
CC
389};
390
391static struct regulator_consumer_supply wm8994_fixed_voltage1_supplies[] = {
d3f9c570
KK
392 REGULATOR_SUPPLY("SPKVDD1", "5-001a"),
393 REGULATOR_SUPPLY("SPKVDD2", "5-001a"),
80849798
CC
394};
395
396static struct regulator_init_data wm8994_fixed_voltage0_init_data = {
397 .constraints = {
398 .always_on = 1,
399 },
400 .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage0_supplies),
401 .consumer_supplies = wm8994_fixed_voltage0_supplies,
402};
403
404static struct regulator_init_data wm8994_fixed_voltage1_init_data = {
405 .constraints = {
406 .always_on = 1,
407 },
408 .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage1_supplies),
409 .consumer_supplies = wm8994_fixed_voltage1_supplies,
410};
411
412static struct fixed_voltage_config wm8994_fixed_voltage0_config = {
413 .supply_name = "VCC_1.8V_PDA",
414 .microvolts = 1800000,
415 .gpio = -EINVAL,
416 .init_data = &wm8994_fixed_voltage0_init_data,
417};
418
419static struct fixed_voltage_config wm8994_fixed_voltage1_config = {
420 .supply_name = "V_BAT",
421 .microvolts = 3700000,
422 .gpio = -EINVAL,
423 .init_data = &wm8994_fixed_voltage1_init_data,
424};
425
426static struct platform_device wm8994_fixed_voltage0 = {
427 .name = "reg-fixed-voltage",
428 .id = 0,
429 .dev = {
430 .platform_data = &wm8994_fixed_voltage0_config,
431 },
432};
433
434static struct platform_device wm8994_fixed_voltage1 = {
435 .name = "reg-fixed-voltage",
436 .id = 1,
437 .dev = {
438 .platform_data = &wm8994_fixed_voltage1_config,
439 },
440};
441
d3f9c570
KK
442static struct regulator_consumer_supply wm8994_avdd1_supply =
443 REGULATOR_SUPPLY("AVDD1", "5-001a");
80849798 444
d3f9c570
KK
445static struct regulator_consumer_supply wm8994_dcvdd_supply =
446 REGULATOR_SUPPLY("DCVDD", "5-001a");
80849798
CC
447
448static struct regulator_init_data wm8994_ldo1_data = {
449 .constraints = {
450 .name = "AVDD1_3.0V",
451 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
452 },
453 .num_consumer_supplies = 1,
454 .consumer_supplies = &wm8994_avdd1_supply,
455};
456
457static struct regulator_init_data wm8994_ldo2_data = {
458 .constraints = {
459 .name = "DCVDD_1.0V",
460 },
461 .num_consumer_supplies = 1,
462 .consumer_supplies = &wm8994_dcvdd_supply,
463};
464
465static struct wm8994_pdata wm8994_platform_data = {
466 /* configure gpio1 function: 0x0001(Logic level input/output) */
467 .gpio_defaults[0] = 0x0001,
468 /* configure gpio3/4/5/7 function for AIF2 voice */
469 .gpio_defaults[2] = 0x8100,
470 .gpio_defaults[3] = 0x8100,
471 .gpio_defaults[4] = 0x8100,
472 .gpio_defaults[6] = 0x0100,
473 /* configure gpio8/9/10/11 function for AIF3 BT */
474 .gpio_defaults[7] = 0x8100,
475 .gpio_defaults[8] = 0x0100,
476 .gpio_defaults[9] = 0x0100,
477 .gpio_defaults[10] = 0x0100,
70499329
KK
478 .ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */
479 .ldo[1] = { 0, &wm8994_ldo2_data },
80849798
CC
480};
481
a1660c12
MS
482/* GPIO I2C PMIC */
483#define AP_I2C_GPIO_PMIC_BUS_4 4
484static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = {
485 .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */
486 .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */
487};
488
489static struct platform_device aquila_i2c_gpio_pmic = {
490 .name = "i2c-gpio",
491 .id = AP_I2C_GPIO_PMIC_BUS_4,
492 .dev = {
493 .platform_data = &aquila_i2c_gpio_pmic_data,
494 },
495};
496
497static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = {
498#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
499 {
500 /* 0xCC when SRAD = 0 */
501 I2C_BOARD_INFO("max8998", 0xCC >> 1),
502 .platform_data = &aquila_max8998_pdata,
503 },
504#endif
505};
506
5112267e
CC
507/* GPIO I2C AP 1.8V */
508#define AP_I2C_GPIO_BUS_5 5
509static struct i2c_gpio_platform_data aquila_i2c_gpio5_data = {
510 .sda_pin = S5PV210_MP05(3), /* XM0ADDR_11 */
511 .scl_pin = S5PV210_MP05(2), /* XM0ADDR_10 */
512};
513
514static struct platform_device aquila_i2c_gpio5 = {
515 .name = "i2c-gpio",
516 .id = AP_I2C_GPIO_BUS_5,
517 .dev = {
518 .platform_data = &aquila_i2c_gpio5_data,
519 },
520};
521
522static struct i2c_board_info i2c_gpio5_devs[] __initdata = {
523 {
524 /* CS/ADDR = low 0x34 (FYI: high = 0x36) */
525 I2C_BOARD_INFO("wm8994", 0x1a),
80849798 526 .platform_data = &wm8994_platform_data,
5112267e
CC
527 },
528};
529
a1660c12
MS
530/* PMIC Power button */
531static struct gpio_keys_button aquila_gpio_keys_table[] = {
532 {
533 .code = KEY_POWER,
534 .gpio = S5PV210_GPH2(6),
535 .desc = "gpio-keys: KEY_POWER",
536 .type = EV_KEY,
537 .active_low = 1,
538 .wakeup = 1,
539 .debounce_interval = 1,
540 },
541};
542
543static struct gpio_keys_platform_data aquila_gpio_keys_data = {
544 .buttons = aquila_gpio_keys_table,
545 .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table),
546};
547
548static struct platform_device aquila_device_gpiokeys = {
549 .name = "gpio-keys",
550 .dev = {
551 .platform_data = &aquila_gpio_keys_data,
552 },
553};
554
555static void __init aquila_pmic_init(void)
556{
557 /* AP_PMIC_IRQ: EINT7 */
558 s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf));
559 s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
560
561 /* nPower: EINT22 */
562 s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf));
563 s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP);
564}
565
ba3fbef9
MS
566/* MoviNAND */
567static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = {
568 .max_width = 4,
569 .cd_type = S3C_SDHCI_CD_PERMANENT,
570};
571
572/* Wireless LAN */
573static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = {
574 .max_width = 4,
575 .cd_type = S3C_SDHCI_CD_EXTERNAL,
576 /* ext_cd_{init,cleanup} callbacks will be added later */
577};
578
579/* External Flash */
580#define AQUILA_EXT_FLASH_EN S5PV210_MP05(4)
581#define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4)
582static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = {
583 .max_width = 4,
584 .cd_type = S3C_SDHCI_CD_GPIO,
585 .ext_cd_gpio = AQUILA_EXT_FLASH_CD,
586 .ext_cd_gpio_invert = 1,
587};
588
589static void aquila_setup_sdhci(void)
590{
2f4f0b42 591 gpio_request_one(AQUILA_EXT_FLASH_EN, GPIOF_OUT_INIT_HIGH, "FLASH_EN");
ba3fbef9
MS
592
593 s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
594 s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
595 s3c_sdhci2_set_platdata(&aquila_hsmmc2_data);
596};
597
c01c4692
SK
598/* Audio device */
599static struct platform_device aquila_device_audio = {
600 .name = "smdk-audio",
601 .id = -1,
602};
603
d947e792 604static struct platform_device *aquila_devices[] __initdata = {
a1660c12 605 &aquila_i2c_gpio_pmic,
5112267e 606 &aquila_i2c_gpio5,
a1660c12 607 &aquila_device_gpiokeys,
c01c4692 608 &aquila_device_audio,
b315032f 609 &s3c_device_fb,
13904fba 610 &s5p_device_onenand,
ba3fbef9
MS
611 &s3c_device_hsmmc0,
612 &s3c_device_hsmmc1,
613 &s3c_device_hsmmc2,
7200c11d
SN
614 &s5p_device_fimc0,
615 &s5p_device_fimc1,
616 &s5p_device_fimc2,
48c18756 617 &s5p_device_fimc_md,
6c29e71c 618 &s5pv210_device_iis0,
80849798
CC
619 &wm8994_fixed_voltage0,
620 &wm8994_fixed_voltage1,
d947e792
MS
621};
622
6c29e71c
CC
623static void __init aquila_sound_init(void)
624{
625 unsigned int gpio;
626
627 /* CODEC_XTAL_EN
628 *
629 * The Aquila board have a oscillator which provide main clock
630 * to WM8994 codec. The oscillator provide 24MHz clock to WM8994
631 * clock. Set gpio setting of "CODEC_XTAL_EN" to enable a oscillator.
632 * */
633 gpio = S5PV210_GPH3(2); /* XEINT_26 */
634 gpio_request(gpio, "CODEC_XTAL_EN");
635 s3c_gpio_cfgpin(gpio, S3C_GPIO_OUTPUT);
636 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
637
638 /* Ths main clock of WM8994 codec uses the output of CLKOUT pin.
639 * The CLKOUT[9:8] set to 0x3(XUSBXTI) of 0xE010E000(OTHERS)
640 * because it needs 24MHz clock to operate WM8994 codec.
641 */
642 __raw_writel(__raw_readl(S5P_OTHERS) | (0x3 << 8), S5P_OTHERS);
643}
644
d947e792
MS
645static void __init aquila_map_io(void)
646{
3fa754c2 647 s5pv210_init_io(NULL, 0);
d947e792 648 s3c24xx_init_clocks(24000000);
df01714a 649 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
c1fcd403 650 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
d947e792
MS
651}
652
653static void __init aquila_machine_init(void)
654{
a1660c12
MS
655 /* PMIC */
656 aquila_pmic_init();
657 i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
658 ARRAY_SIZE(i2c_gpio_pmic_devs));
ba3fbef9
MS
659 /* SDHCI */
660 aquila_setup_sdhci();
a1660c12 661
187749bb
SN
662 s3c_fimc_setname(0, "s5p-fimc");
663 s3c_fimc_setname(1, "s5p-fimc");
664 s3c_fimc_setname(2, "s5p-fimc");
665
5112267e 666 /* SOUND */
6c29e71c 667 aquila_sound_init();
5112267e
CC
668 i2c_register_board_info(AP_I2C_GPIO_BUS_5, i2c_gpio5_devs,
669 ARRAY_SIZE(i2c_gpio5_devs));
670
b315032f
MS
671 /* FB */
672 s3c_fb_set_platdata(&aquila_lcd_pdata);
673
d947e792
MS
674 platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices));
675}
676
677MACHINE_START(AQUILA, "Aquila")
678 /* Maintainers:
679 Marek Szyprowski <m.szyprowski@samsung.com>
680 Kyungmin Park <kyungmin.park@samsung.com> */
02350a1f 681 .atag_offset = 0x100,
d947e792
MS
682 .init_irq = s5pv210_init_irq,
683 .map_io = aquila_map_io,
684 .init_machine = aquila_machine_init,
c1fcd403 685 .init_time = samsung_timer_init,
1f34f0e2 686 .restart = s5pv210_restart,
d947e792 687MACHINE_END
This page took 0.21864 seconds and 5 git commands to generate.