ARM: 7247/1: S5PC100: introduce arch/arm/mach-s5pc100/common.[ch]
[deliverable/linux.git] / arch / arm / mach-s5pv210 / mach-aquila.c
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1/* linux/arch/arm/mach-s5pv210/mach-aquila.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
b315032f 15#include <linux/fb.h>
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16#include <linux/i2c.h>
17#include <linux/i2c-gpio.h>
18#include <linux/mfd/max8998.h>
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19#include <linux/mfd/wm8994/pdata.h>
20#include <linux/regulator/fixed.h>
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21#include <linux/gpio_keys.h>
22#include <linux/input.h>
23#include <linux/gpio.h>
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24
25#include <asm/mach/arch.h>
26#include <asm/mach/map.h>
27#include <asm/setup.h>
28#include <asm/mach-types.h>
29
30#include <mach/map.h>
31#include <mach/regs-clock.h>
32
a1660c12 33#include <plat/gpio-cfg.h>
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34#include <plat/regs-serial.h>
35#include <plat/s5pv210.h>
36#include <plat/devs.h>
37#include <plat/cpu.h>
b315032f 38#include <plat/fb.h>
187749bb 39#include <plat/fimc-core.h>
ba3fbef9 40#include <plat/sdhci.h>
20780fcc 41#include <plat/s5p-time.h>
7bf3ba6b 42#include <plat/regs-fb-v4.h>
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43
44/* Following are default values for UCON, ULCON and UFCON UART registers */
c8def085 45#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
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46 S3C2410_UCON_RXILEVEL | \
47 S3C2410_UCON_TXIRQMODE | \
48 S3C2410_UCON_RXIRQMODE | \
49 S3C2410_UCON_RXFIFO_TOI | \
50 S3C2443_UCON_RXERR_IRQEN)
51
c8def085 52#define AQUILA_ULCON_DEFAULT S3C2410_LCON_CS8
d947e792 53
f2b7e3c5 54#define AQUILA_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
d947e792 55
df01714a 56static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
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57 [0] = {
58 .hwport = 0,
59 .flags = 0,
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60 .ucon = AQUILA_UCON_DEFAULT,
61 .ulcon = AQUILA_ULCON_DEFAULT,
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62 /*
63 * Actually UART0 can support 256 bytes fifo, but aquila board
64 * supports 128 bytes fifo because of initial chip bug
65 */
f2b7e3c5 66 .ufcon = AQUILA_UFCON_DEFAULT |
df01714a 67 S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128,
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68 },
69 [1] = {
70 .hwport = 1,
71 .flags = 0,
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72 .ucon = AQUILA_UCON_DEFAULT,
73 .ulcon = AQUILA_ULCON_DEFAULT,
f2b7e3c5 74 .ufcon = AQUILA_UFCON_DEFAULT |
df01714a 75 S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
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76 },
77 [2] = {
78 .hwport = 2,
79 .flags = 0,
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80 .ucon = AQUILA_UCON_DEFAULT,
81 .ulcon = AQUILA_ULCON_DEFAULT,
f2b7e3c5 82 .ufcon = AQUILA_UFCON_DEFAULT |
df01714a 83 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
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84 },
85 [3] = {
86 .hwport = 3,
87 .flags = 0,
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88 .ucon = AQUILA_UCON_DEFAULT,
89 .ulcon = AQUILA_ULCON_DEFAULT,
f2b7e3c5 90 .ufcon = AQUILA_UFCON_DEFAULT |
df01714a 91 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
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92 },
93};
94
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95/* Frame Buffer */
96static struct s3c_fb_pd_win aquila_fb_win0 = {
97 .win_mode = {
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98 .left_margin = 16,
99 .right_margin = 16,
100 .upper_margin = 3,
101 .lower_margin = 28,
102 .hsync_len = 2,
103 .vsync_len = 2,
104 .xres = 480,
105 .yres = 800,
106 },
107 .max_bpp = 32,
108 .default_bpp = 16,
109};
110
111static struct s3c_fb_pd_win aquila_fb_win1 = {
112 .win_mode = {
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113 .left_margin = 16,
114 .right_margin = 16,
115 .upper_margin = 3,
116 .lower_margin = 28,
117 .hsync_len = 2,
118 .vsync_len = 2,
119 .xres = 480,
120 .yres = 800,
121 },
122 .max_bpp = 32,
123 .default_bpp = 16,
124};
125
126static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
127 .win[0] = &aquila_fb_win0,
128 .win[1] = &aquila_fb_win1,
129 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
130 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
131 VIDCON1_INV_VCLK | VIDCON1_INV_VDEN,
132 .setup_gpio = s5pv210_fb_gpio_setup_24bpp,
133};
134
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135/* MAX8998 regulators */
136#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
137
138static struct regulator_init_data aquila_ldo2_data = {
139 .constraints = {
140 .name = "VALIVE_1.1V",
141 .min_uV = 1100000,
142 .max_uV = 1100000,
143 .apply_uV = 1,
144 .always_on = 1,
145 .state_mem = {
146 .enabled = 1,
147 },
148 },
149};
150
151static struct regulator_init_data aquila_ldo3_data = {
152 .constraints = {
d1061331 153 .name = "VUSB+MIPI_1.1V",
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154 .min_uV = 1100000,
155 .max_uV = 1100000,
156 .apply_uV = 1,
157 .always_on = 1,
158 },
159};
160
161static struct regulator_init_data aquila_ldo4_data = {
162 .constraints = {
163 .name = "VDAC_3.3V",
164 .min_uV = 3300000,
165 .max_uV = 3300000,
166 .apply_uV = 1,
167 },
168};
169
170static struct regulator_init_data aquila_ldo5_data = {
171 .constraints = {
172 .name = "VTF_2.8V",
173 .min_uV = 2800000,
174 .max_uV = 2800000,
175 .apply_uV = 1,
176 },
177};
178
179static struct regulator_init_data aquila_ldo6_data = {
180 .constraints = {
181 .name = "VCC_3.3V",
182 .min_uV = 3300000,
183 .max_uV = 3300000,
184 .apply_uV = 1,
185 },
186};
187
188static struct regulator_init_data aquila_ldo7_data = {
189 .constraints = {
190 .name = "VCC_3.0V",
191 .min_uV = 3000000,
192 .max_uV = 3000000,
193 .apply_uV = 1,
194 .boot_on = 1,
195 .always_on = 1,
196 },
197};
198
199static struct regulator_init_data aquila_ldo8_data = {
200 .constraints = {
d1061331 201 .name = "VUSB+VADC_3.3V",
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202 .min_uV = 3300000,
203 .max_uV = 3300000,
204 .apply_uV = 1,
205 .always_on = 1,
206 },
207};
208
209static struct regulator_init_data aquila_ldo9_data = {
210 .constraints = {
d1061331 211 .name = "VCC+VCAM_2.8V",
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212 .min_uV = 2800000,
213 .max_uV = 2800000,
214 .apply_uV = 1,
215 .always_on = 1,
216 },
217};
218
219static struct regulator_init_data aquila_ldo10_data = {
220 .constraints = {
221 .name = "VPLL_1.1V",
222 .min_uV = 1100000,
223 .max_uV = 1100000,
224 .apply_uV = 1,
225 .boot_on = 1,
226 },
227};
228
229static struct regulator_init_data aquila_ldo11_data = {
230 .constraints = {
231 .name = "CAM_IO_2.8V",
232 .min_uV = 2800000,
233 .max_uV = 2800000,
234 .apply_uV = 1,
235 .always_on = 1,
236 },
237};
238
239static struct regulator_init_data aquila_ldo12_data = {
240 .constraints = {
241 .name = "CAM_ISP_1.2V",
242 .min_uV = 1200000,
243 .max_uV = 1200000,
244 .apply_uV = 1,
245 .always_on = 1,
246 },
247};
248
249static struct regulator_init_data aquila_ldo13_data = {
250 .constraints = {
251 .name = "CAM_A_2.8V",
252 .min_uV = 2800000,
253 .max_uV = 2800000,
254 .apply_uV = 1,
255 .always_on = 1,
256 },
257};
258
259static struct regulator_init_data aquila_ldo14_data = {
260 .constraints = {
261 .name = "CAM_CIF_1.8V",
262 .min_uV = 1800000,
263 .max_uV = 1800000,
264 .apply_uV = 1,
265 .always_on = 1,
266 },
267};
268
269static struct regulator_init_data aquila_ldo15_data = {
270 .constraints = {
271 .name = "CAM_AF_3.3V",
272 .min_uV = 3300000,
273 .max_uV = 3300000,
274 .apply_uV = 1,
275 .always_on = 1,
276 },
277};
278
279static struct regulator_init_data aquila_ldo16_data = {
280 .constraints = {
281 .name = "VMIPI_1.8V",
282 .min_uV = 1800000,
283 .max_uV = 1800000,
284 .apply_uV = 1,
285 .always_on = 1,
286 },
287};
288
289static struct regulator_init_data aquila_ldo17_data = {
290 .constraints = {
291 .name = "CAM_8M_1.8V",
292 .min_uV = 1800000,
293 .max_uV = 1800000,
294 .apply_uV = 1,
295 .always_on = 1,
296 },
297};
298
299/* BUCK */
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300static struct regulator_consumer_supply buck1_consumer =
301 REGULATOR_SUPPLY("vddarm", NULL);
a1660c12 302
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303static struct regulator_consumer_supply buck2_consumer =
304 REGULATOR_SUPPLY("vddint", NULL);
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305
306static struct regulator_init_data aquila_buck1_data = {
307 .constraints = {
308 .name = "VARM_1.2V",
309 .min_uV = 1200000,
310 .max_uV = 1200000,
311 .apply_uV = 1,
312 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
313 REGULATOR_CHANGE_STATUS,
314 },
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315 .num_consumer_supplies = 1,
316 .consumer_supplies = &buck1_consumer,
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317};
318
319static struct regulator_init_data aquila_buck2_data = {
320 .constraints = {
321 .name = "VINT_1.2V",
322 .min_uV = 1200000,
323 .max_uV = 1200000,
324 .apply_uV = 1,
325 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
326 REGULATOR_CHANGE_STATUS,
327 },
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328 .num_consumer_supplies = 1,
329 .consumer_supplies = &buck2_consumer,
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330};
331
332static struct regulator_init_data aquila_buck3_data = {
333 .constraints = {
334 .name = "VCC_1.8V",
335 .min_uV = 1800000,
336 .max_uV = 1800000,
337 .apply_uV = 1,
338 .state_mem = {
339 .enabled = 1,
340 },
341 },
342};
343
344static struct regulator_init_data aquila_buck4_data = {
345 .constraints = {
346 .name = "CAM_CORE_1.2V",
347 .min_uV = 1200000,
348 .max_uV = 1200000,
349 .apply_uV = 1,
350 .always_on = 1,
351 },
352};
353
354static struct max8998_regulator_data aquila_regulators[] = {
355 { MAX8998_LDO2, &aquila_ldo2_data },
356 { MAX8998_LDO3, &aquila_ldo3_data },
357 { MAX8998_LDO4, &aquila_ldo4_data },
358 { MAX8998_LDO5, &aquila_ldo5_data },
359 { MAX8998_LDO6, &aquila_ldo6_data },
360 { MAX8998_LDO7, &aquila_ldo7_data },
361 { MAX8998_LDO8, &aquila_ldo8_data },
362 { MAX8998_LDO9, &aquila_ldo9_data },
363 { MAX8998_LDO10, &aquila_ldo10_data },
364 { MAX8998_LDO11, &aquila_ldo11_data },
365 { MAX8998_LDO12, &aquila_ldo12_data },
366 { MAX8998_LDO13, &aquila_ldo13_data },
367 { MAX8998_LDO14, &aquila_ldo14_data },
368 { MAX8998_LDO15, &aquila_ldo15_data },
369 { MAX8998_LDO16, &aquila_ldo16_data },
370 { MAX8998_LDO17, &aquila_ldo17_data },
371 { MAX8998_BUCK1, &aquila_buck1_data },
372 { MAX8998_BUCK2, &aquila_buck2_data },
373 { MAX8998_BUCK3, &aquila_buck3_data },
374 { MAX8998_BUCK4, &aquila_buck4_data },
375};
376
377static struct max8998_platform_data aquila_max8998_pdata = {
378 .num_regulators = ARRAY_SIZE(aquila_regulators),
379 .regulators = aquila_regulators,
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380 .buck1_set1 = S5PV210_GPH0(3),
381 .buck1_set2 = S5PV210_GPH0(4),
382 .buck2_set3 = S5PV210_GPH0(5),
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383 .buck1_voltage1 = 1200000,
384 .buck1_voltage2 = 1200000,
385 .buck1_voltage3 = 1200000,
386 .buck1_voltage4 = 1200000,
387 .buck2_voltage1 = 1200000,
388 .buck2_voltage2 = 1200000,
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389};
390#endif
391
80849798 392static struct regulator_consumer_supply wm8994_fixed_voltage0_supplies[] = {
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393 REGULATOR_SUPPLY("DBVDD", "5-001a"),
394 REGULATOR_SUPPLY("AVDD2", "5-001a"),
395 REGULATOR_SUPPLY("CPVDD", "5-001a"),
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396};
397
398static struct regulator_consumer_supply wm8994_fixed_voltage1_supplies[] = {
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399 REGULATOR_SUPPLY("SPKVDD1", "5-001a"),
400 REGULATOR_SUPPLY("SPKVDD2", "5-001a"),
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401};
402
403static struct regulator_init_data wm8994_fixed_voltage0_init_data = {
404 .constraints = {
405 .always_on = 1,
406 },
407 .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage0_supplies),
408 .consumer_supplies = wm8994_fixed_voltage0_supplies,
409};
410
411static struct regulator_init_data wm8994_fixed_voltage1_init_data = {
412 .constraints = {
413 .always_on = 1,
414 },
415 .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage1_supplies),
416 .consumer_supplies = wm8994_fixed_voltage1_supplies,
417};
418
419static struct fixed_voltage_config wm8994_fixed_voltage0_config = {
420 .supply_name = "VCC_1.8V_PDA",
421 .microvolts = 1800000,
422 .gpio = -EINVAL,
423 .init_data = &wm8994_fixed_voltage0_init_data,
424};
425
426static struct fixed_voltage_config wm8994_fixed_voltage1_config = {
427 .supply_name = "V_BAT",
428 .microvolts = 3700000,
429 .gpio = -EINVAL,
430 .init_data = &wm8994_fixed_voltage1_init_data,
431};
432
433static struct platform_device wm8994_fixed_voltage0 = {
434 .name = "reg-fixed-voltage",
435 .id = 0,
436 .dev = {
437 .platform_data = &wm8994_fixed_voltage0_config,
438 },
439};
440
441static struct platform_device wm8994_fixed_voltage1 = {
442 .name = "reg-fixed-voltage",
443 .id = 1,
444 .dev = {
445 .platform_data = &wm8994_fixed_voltage1_config,
446 },
447};
448
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449static struct regulator_consumer_supply wm8994_avdd1_supply =
450 REGULATOR_SUPPLY("AVDD1", "5-001a");
80849798 451
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452static struct regulator_consumer_supply wm8994_dcvdd_supply =
453 REGULATOR_SUPPLY("DCVDD", "5-001a");
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454
455static struct regulator_init_data wm8994_ldo1_data = {
456 .constraints = {
457 .name = "AVDD1_3.0V",
458 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
459 },
460 .num_consumer_supplies = 1,
461 .consumer_supplies = &wm8994_avdd1_supply,
462};
463
464static struct regulator_init_data wm8994_ldo2_data = {
465 .constraints = {
466 .name = "DCVDD_1.0V",
467 },
468 .num_consumer_supplies = 1,
469 .consumer_supplies = &wm8994_dcvdd_supply,
470};
471
472static struct wm8994_pdata wm8994_platform_data = {
473 /* configure gpio1 function: 0x0001(Logic level input/output) */
474 .gpio_defaults[0] = 0x0001,
475 /* configure gpio3/4/5/7 function for AIF2 voice */
476 .gpio_defaults[2] = 0x8100,
477 .gpio_defaults[3] = 0x8100,
478 .gpio_defaults[4] = 0x8100,
479 .gpio_defaults[6] = 0x0100,
480 /* configure gpio8/9/10/11 function for AIF3 BT */
481 .gpio_defaults[7] = 0x8100,
482 .gpio_defaults[8] = 0x0100,
483 .gpio_defaults[9] = 0x0100,
484 .gpio_defaults[10] = 0x0100,
485 .ldo[0] = { S5PV210_MP03(6), NULL, &wm8994_ldo1_data }, /* XM0FRNB_2 */
486 .ldo[1] = { 0, NULL, &wm8994_ldo2_data },
487};
488
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489/* GPIO I2C PMIC */
490#define AP_I2C_GPIO_PMIC_BUS_4 4
491static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = {
492 .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */
493 .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */
494};
495
496static struct platform_device aquila_i2c_gpio_pmic = {
497 .name = "i2c-gpio",
498 .id = AP_I2C_GPIO_PMIC_BUS_4,
499 .dev = {
500 .platform_data = &aquila_i2c_gpio_pmic_data,
501 },
502};
503
504static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = {
505#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
506 {
507 /* 0xCC when SRAD = 0 */
508 I2C_BOARD_INFO("max8998", 0xCC >> 1),
509 .platform_data = &aquila_max8998_pdata,
510 },
511#endif
512};
513
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514/* GPIO I2C AP 1.8V */
515#define AP_I2C_GPIO_BUS_5 5
516static struct i2c_gpio_platform_data aquila_i2c_gpio5_data = {
517 .sda_pin = S5PV210_MP05(3), /* XM0ADDR_11 */
518 .scl_pin = S5PV210_MP05(2), /* XM0ADDR_10 */
519};
520
521static struct platform_device aquila_i2c_gpio5 = {
522 .name = "i2c-gpio",
523 .id = AP_I2C_GPIO_BUS_5,
524 .dev = {
525 .platform_data = &aquila_i2c_gpio5_data,
526 },
527};
528
529static struct i2c_board_info i2c_gpio5_devs[] __initdata = {
530 {
531 /* CS/ADDR = low 0x34 (FYI: high = 0x36) */
532 I2C_BOARD_INFO("wm8994", 0x1a),
80849798 533 .platform_data = &wm8994_platform_data,
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534 },
535};
536
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537/* PMIC Power button */
538static struct gpio_keys_button aquila_gpio_keys_table[] = {
539 {
540 .code = KEY_POWER,
541 .gpio = S5PV210_GPH2(6),
542 .desc = "gpio-keys: KEY_POWER",
543 .type = EV_KEY,
544 .active_low = 1,
545 .wakeup = 1,
546 .debounce_interval = 1,
547 },
548};
549
550static struct gpio_keys_platform_data aquila_gpio_keys_data = {
551 .buttons = aquila_gpio_keys_table,
552 .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table),
553};
554
555static struct platform_device aquila_device_gpiokeys = {
556 .name = "gpio-keys",
557 .dev = {
558 .platform_data = &aquila_gpio_keys_data,
559 },
560};
561
562static void __init aquila_pmic_init(void)
563{
564 /* AP_PMIC_IRQ: EINT7 */
565 s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf));
566 s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
567
568 /* nPower: EINT22 */
569 s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf));
570 s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP);
571}
572
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573/* MoviNAND */
574static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = {
575 .max_width = 4,
576 .cd_type = S3C_SDHCI_CD_PERMANENT,
577};
578
579/* Wireless LAN */
580static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = {
581 .max_width = 4,
582 .cd_type = S3C_SDHCI_CD_EXTERNAL,
583 /* ext_cd_{init,cleanup} callbacks will be added later */
584};
585
586/* External Flash */
587#define AQUILA_EXT_FLASH_EN S5PV210_MP05(4)
588#define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4)
589static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = {
590 .max_width = 4,
591 .cd_type = S3C_SDHCI_CD_GPIO,
592 .ext_cd_gpio = AQUILA_EXT_FLASH_CD,
593 .ext_cd_gpio_invert = 1,
594};
595
596static void aquila_setup_sdhci(void)
597{
598 gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN");
599 gpio_direction_output(AQUILA_EXT_FLASH_EN, 1);
600
601 s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
602 s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
603 s3c_sdhci2_set_platdata(&aquila_hsmmc2_data);
604};
605
d947e792 606static struct platform_device *aquila_devices[] __initdata = {
a1660c12 607 &aquila_i2c_gpio_pmic,
5112267e 608 &aquila_i2c_gpio5,
a1660c12 609 &aquila_device_gpiokeys,
b315032f 610 &s3c_device_fb,
13904fba 611 &s5p_device_onenand,
ba3fbef9
MS
612 &s3c_device_hsmmc0,
613 &s3c_device_hsmmc1,
614 &s3c_device_hsmmc2,
7200c11d
SN
615 &s5p_device_fimc0,
616 &s5p_device_fimc1,
617 &s5p_device_fimc2,
6c29e71c 618 &s5pv210_device_iis0,
80849798
CC
619 &wm8994_fixed_voltage0,
620 &wm8994_fixed_voltage1,
d947e792
MS
621};
622
6c29e71c
CC
623static void __init aquila_sound_init(void)
624{
625 unsigned int gpio;
626
627 /* CODEC_XTAL_EN
628 *
629 * The Aquila board have a oscillator which provide main clock
630 * to WM8994 codec. The oscillator provide 24MHz clock to WM8994
631 * clock. Set gpio setting of "CODEC_XTAL_EN" to enable a oscillator.
632 * */
633 gpio = S5PV210_GPH3(2); /* XEINT_26 */
634 gpio_request(gpio, "CODEC_XTAL_EN");
635 s3c_gpio_cfgpin(gpio, S3C_GPIO_OUTPUT);
636 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
637
638 /* Ths main clock of WM8994 codec uses the output of CLKOUT pin.
639 * The CLKOUT[9:8] set to 0x3(XUSBXTI) of 0xE010E000(OTHERS)
640 * because it needs 24MHz clock to operate WM8994 codec.
641 */
642 __raw_writel(__raw_readl(S5P_OTHERS) | (0x3 << 8), S5P_OTHERS);
643}
644
d947e792
MS
645static void __init aquila_map_io(void)
646{
647 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
648 s3c24xx_init_clocks(24000000);
df01714a 649 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
20780fcc 650 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
d947e792
MS
651}
652
653static void __init aquila_machine_init(void)
654{
a1660c12
MS
655 /* PMIC */
656 aquila_pmic_init();
657 i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
658 ARRAY_SIZE(i2c_gpio_pmic_devs));
ba3fbef9
MS
659 /* SDHCI */
660 aquila_setup_sdhci();
a1660c12 661
187749bb
SN
662 s3c_fimc_setname(0, "s5p-fimc");
663 s3c_fimc_setname(1, "s5p-fimc");
664 s3c_fimc_setname(2, "s5p-fimc");
665
5112267e 666 /* SOUND */
6c29e71c 667 aquila_sound_init();
5112267e
CC
668 i2c_register_board_info(AP_I2C_GPIO_BUS_5, i2c_gpio5_devs,
669 ARRAY_SIZE(i2c_gpio5_devs));
670
b315032f
MS
671 /* FB */
672 s3c_fb_set_platdata(&aquila_lcd_pdata);
673
d947e792
MS
674 platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices));
675}
676
677MACHINE_START(AQUILA, "Aquila")
678 /* Maintainers:
679 Marek Szyprowski <m.szyprowski@samsung.com>
680 Kyungmin Park <kyungmin.park@samsung.com> */
02350a1f 681 .atag_offset = 0x100,
d947e792
MS
682 .init_irq = s5pv210_init_irq,
683 .map_io = aquila_map_io,
684 .init_machine = aquila_machine_init,
20780fcc 685 .timer = &s5p_timer,
d947e792 686MACHINE_END
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