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ea31fd43 JL |
1 | /* linux/arch/arm/mach-s5pv210/pm.c |
2 | * | |
0a90d4d6 | 3 | * Copyright (c) 2010-2014 Samsung Electronics Co., Ltd. |
ea31fd43 JL |
4 | * http://www.samsung.com |
5 | * | |
6 | * S5PV210 - Power Management support | |
7 | * | |
8 | * Based on arch/arm/mach-s3c2410/pm.c | |
9 | * Copyright (c) 2006 Simtec Electronics | |
10 | * Ben Dooks <ben@simtec.co.uk> | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | */ | |
16 | ||
17 | #include <linux/init.h> | |
18 | #include <linux/suspend.h> | |
bb072c3c | 19 | #include <linux/syscore_ops.h> |
ea31fd43 JL |
20 | #include <linux/io.h> |
21 | ||
0a90d4d6 TF |
22 | #include <asm/cacheflush.h> |
23 | #include <asm/suspend.h> | |
24 | ||
25 | #include <plat/pm-common.h> | |
ea31fd43 | 26 | |
0a90d4d6 | 27 | #include "common.h" |
9740bdd9 | 28 | #include "regs-clock.h" |
0a90d4d6 | 29 | |
ea31fd43 | 30 | static struct sleep_save s5pv210_core_save[] = { |
ea31fd43 | 31 | /* Clock ETC */ |
ea31fd43 | 32 | SAVE_ITEM(S5P_MDNIE_SEL), |
ea31fd43 JL |
33 | }; |
34 | ||
0a90d4d6 TF |
35 | /* |
36 | * VIC wake-up support (TODO) | |
37 | */ | |
38 | static u32 s5pv210_irqwake_intmask = 0xffffffff; | |
39 | ||
40 | /* | |
41 | * Suspend helpers. | |
42 | */ | |
7e1291de | 43 | static int s5pv210_cpu_suspend(unsigned long arg) |
ea31fd43 JL |
44 | { |
45 | unsigned long tmp; | |
46 | ||
47 | /* issue the standby signal into the pm unit. Note, we | |
48 | * issue a write-buffer drain just in case */ | |
49 | ||
50 | tmp = 0; | |
51 | ||
52 | asm("b 1f\n\t" | |
53 | ".align 5\n\t" | |
54 | "1:\n\t" | |
55 | "mcr p15, 0, %0, c7, c10, 5\n\t" | |
56 | "mcr p15, 0, %0, c7, c10, 4\n\t" | |
57 | "wfi" : : "r" (tmp)); | |
58 | ||
d3fcacf5 AK |
59 | pr_info("Failed to suspend the system\n"); |
60 | return 1; /* Aborting suspend */ | |
ea31fd43 JL |
61 | } |
62 | ||
63 | static void s5pv210_pm_prepare(void) | |
64 | { | |
65 | unsigned int tmp; | |
66 | ||
0a90d4d6 TF |
67 | /* Set wake-up mask registers */ |
68 | __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK); | |
69 | __raw_writel(s5pv210_irqwake_intmask, S5P_WAKEUP_MASK); | |
70 | ||
ea31fd43 | 71 | /* ensure at least INFORM0 has the resume address */ |
0a90d4d6 | 72 | __raw_writel(virt_to_phys(s5pv210_cpu_resume), S5P_INFORM0); |
ea31fd43 JL |
73 | |
74 | tmp = __raw_readl(S5P_SLEEP_CFG); | |
75 | tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN); | |
76 | __raw_writel(tmp, S5P_SLEEP_CFG); | |
77 | ||
78 | /* WFI for SLEEP mode configuration by SYSCON */ | |
79 | tmp = __raw_readl(S5P_PWR_CFG); | |
80 | tmp &= S5P_CFG_WFI_CLEAN; | |
81 | tmp |= S5P_CFG_WFI_SLEEP; | |
82 | __raw_writel(tmp, S5P_PWR_CFG); | |
83 | ||
84 | /* SYSCON interrupt handling disable */ | |
85 | tmp = __raw_readl(S5P_OTHERS); | |
86 | tmp |= S5P_OTHER_SYSC_INTOFF; | |
87 | __raw_writel(tmp, S5P_OTHERS); | |
88 | ||
89 | s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); | |
90 | } | |
91 | ||
0a90d4d6 TF |
92 | /* |
93 | * Suspend operations. | |
94 | */ | |
95 | static int s5pv210_suspend_enter(suspend_state_t state) | |
96 | { | |
97 | int ret; | |
98 | ||
99 | s3c_pm_debug_init(); | |
100 | ||
101 | S3C_PMDBG("%s: suspending the system...\n", __func__); | |
102 | ||
103 | S3C_PMDBG("%s: wakeup masks: %08x,%08x\n", __func__, | |
104 | s5pv210_irqwake_intmask, exynos_get_eint_wake_mask()); | |
105 | ||
106 | if (s5pv210_irqwake_intmask == -1U | |
107 | && exynos_get_eint_wake_mask() == -1U) { | |
108 | pr_err("%s: No wake-up sources!\n", __func__); | |
109 | pr_err("%s: Aborting sleep\n", __func__); | |
110 | return -EINVAL; | |
111 | } | |
112 | ||
113 | s3c_pm_save_uarts(); | |
114 | s5pv210_pm_prepare(); | |
115 | flush_cache_all(); | |
116 | s3c_pm_check_store(); | |
117 | ||
118 | ret = cpu_suspend(0, s5pv210_cpu_suspend); | |
119 | if (ret) | |
120 | return ret; | |
121 | ||
122 | s3c_pm_restore_uarts(); | |
123 | ||
124 | S3C_PMDBG("%s: wakeup stat: %08x\n", __func__, | |
125 | __raw_readl(S5P_WAKEUP_STAT)); | |
126 | ||
127 | s3c_pm_check_restore(); | |
128 | ||
129 | S3C_PMDBG("%s: resuming the system...\n", __func__); | |
130 | ||
131 | return 0; | |
132 | } | |
133 | ||
134 | static int s5pv210_suspend_prepare(void) | |
135 | { | |
136 | s3c_pm_check_prepare(); | |
137 | ||
138 | return 0; | |
139 | } | |
140 | ||
141 | static void s5pv210_suspend_finish(void) | |
142 | { | |
143 | s3c_pm_check_cleanup(); | |
144 | } | |
145 | ||
146 | static const struct platform_suspend_ops s5pv210_suspend_ops = { | |
147 | .enter = s5pv210_suspend_enter, | |
148 | .prepare = s5pv210_suspend_prepare, | |
149 | .finish = s5pv210_suspend_finish, | |
150 | .valid = suspend_valid_only_mem, | |
151 | }; | |
152 | ||
153 | /* | |
154 | * Syscore operations used to delay restore of certain registers. | |
155 | */ | |
bb072c3c | 156 | static void s5pv210_pm_resume(void) |
ea31fd43 JL |
157 | { |
158 | u32 tmp; | |
159 | ||
160 | tmp = __raw_readl(S5P_OTHERS); | |
161 | tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\ | |
162 | S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART); | |
163 | __raw_writel(tmp , S5P_OTHERS); | |
164 | ||
165 | s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); | |
ea31fd43 JL |
166 | } |
167 | ||
bb072c3c | 168 | static struct syscore_ops s5pv210_pm_syscore_ops = { |
ea31fd43 JL |
169 | .resume = s5pv210_pm_resume, |
170 | }; | |
171 | ||
0a90d4d6 TF |
172 | /* |
173 | * Initialization entry point. | |
174 | */ | |
175 | void __init s5pv210_pm_init(void) | |
ea31fd43 | 176 | { |
bb072c3c | 177 | register_syscore_ops(&s5pv210_pm_syscore_ops); |
0a90d4d6 | 178 | suspend_set_ops(&s5pv210_suspend_ops); |
ea31fd43 | 179 | } |