[deliverable/linux.git] / arch / arm / mach-s5pv210 / pm.c

/* linux/arch/arm/mach-s5pv210/pm.c
 *
 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * S5PV210 - Power Management support
 *
 * Based on arch/arm/mach-s3c2410/pm.c
 * Copyright (c) 2006 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/init.h>
#include <linux/suspend.h>
#include <linux/syscore_ops.h>
#include <linux/io.h>

#include <plat/cpu.h>
#include <plat/pm.h>
#include <plat/regs-timer.h>

#include <mach/regs-irq.h>
#include <mach/regs-clock.h>

static struct sleep_save s5pv210_core_save[] = {
	/* Clock source */
	SAVE_ITEM(S5P_CLK_SRC0),
	SAVE_ITEM(S5P_CLK_SRC1),
	SAVE_ITEM(S5P_CLK_SRC2),
	SAVE_ITEM(S5P_CLK_SRC3),
	SAVE_ITEM(S5P_CLK_SRC4),
	SAVE_ITEM(S5P_CLK_SRC5),
	SAVE_ITEM(S5P_CLK_SRC6),

	/* Clock source Mask */
	SAVE_ITEM(S5P_CLK_SRC_MASK0),
	SAVE_ITEM(S5P_CLK_SRC_MASK1),

	/* Clock Divider */
	SAVE_ITEM(S5P_CLK_DIV0),
	SAVE_ITEM(S5P_CLK_DIV1),
	SAVE_ITEM(S5P_CLK_DIV2),
	SAVE_ITEM(S5P_CLK_DIV3),
	SAVE_ITEM(S5P_CLK_DIV4),
	SAVE_ITEM(S5P_CLK_DIV5),
	SAVE_ITEM(S5P_CLK_DIV6),
	SAVE_ITEM(S5P_CLK_DIV7),

	/* Clock Main Gate */
	SAVE_ITEM(S5P_CLKGATE_MAIN0),
	SAVE_ITEM(S5P_CLKGATE_MAIN1),
	SAVE_ITEM(S5P_CLKGATE_MAIN2),

	/* Clock source Peri Gate */
	SAVE_ITEM(S5P_CLKGATE_PERI0),
	SAVE_ITEM(S5P_CLKGATE_PERI1),

	/* Clock source SCLK Gate */
	SAVE_ITEM(S5P_CLKGATE_SCLK0),
	SAVE_ITEM(S5P_CLKGATE_SCLK1),

	/* Clock IP Clock gate */
	SAVE_ITEM(S5P_CLKGATE_IP0),
	SAVE_ITEM(S5P_CLKGATE_IP1),
	SAVE_ITEM(S5P_CLKGATE_IP2),
	SAVE_ITEM(S5P_CLKGATE_IP3),
	SAVE_ITEM(S5P_CLKGATE_IP4),

	/* Clock Blcok and Bus gate */
	SAVE_ITEM(S5P_CLKGATE_BLOCK),
	SAVE_ITEM(S5P_CLKGATE_BUS0),

	/* Clock ETC */
	SAVE_ITEM(S5P_CLK_OUT),
	SAVE_ITEM(S5P_MDNIE_SEL),

	/* PWM Register */
	SAVE_ITEM(S3C2410_TCFG0),
	SAVE_ITEM(S3C2410_TCFG1),
	SAVE_ITEM(S3C64XX_TINT_CSTAT),
	SAVE_ITEM(S3C2410_TCON),
	SAVE_ITEM(S3C2410_TCNTB(0)),
	SAVE_ITEM(S3C2410_TCMPB(0)),
	SAVE_ITEM(S3C2410_TCNTO(0)),
};

static int s5pv210_cpu_suspend(unsigned long arg)
{
	unsigned long tmp;

	/* issue the standby signal into the pm unit. Note, we
	 * issue a write-buffer drain just in case */

	tmp = 0;

	asm("b 1f\n\t"
	    ".align 5\n\t"
	    "1:\n\t"
	    "mcr p15, 0, %0, c7, c10, 5\n\t"
	    "mcr p15, 0, %0, c7, c10, 4\n\t"
	    "wfi" : : "r" (tmp));

	pr_info("Failed to suspend the system\n");
	return 1; /* Aborting suspend */
}

static void s5pv210_pm_prepare(void)
{
	unsigned int tmp;

	/* ensure at least INFORM0 has the resume address */
	__raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);

	tmp = __raw_readl(S5P_SLEEP_CFG);
	tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);
	__raw_writel(tmp, S5P_SLEEP_CFG);

	/* WFI for SLEEP mode configuration by SYSCON */
	tmp = __raw_readl(S5P_PWR_CFG);
	tmp &= S5P_CFG_WFI_CLEAN;
	tmp |= S5P_CFG_WFI_SLEEP;
	__raw_writel(tmp, S5P_PWR_CFG);

	/* SYSCON interrupt handling disable */
	tmp = __raw_readl(S5P_OTHERS);
	tmp |= S5P_OTHER_SYSC_INTOFF;
	__raw_writel(tmp, S5P_OTHERS);

	s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
}

static int s5pv210_pm_add(struct device *dev, struct subsys_interface *sif)
{
	pm_cpu_prep = s5pv210_pm_prepare;
	pm_cpu_sleep = s5pv210_cpu_suspend;

	return 0;
}

static struct subsys_interface s5pv210_pm_interface = {
	.name		= "s5pv210_pm",
	.subsys		= &s5pv210_subsys,
	.add_dev	= s5pv210_pm_add,
};

static __init int s5pv210_pm_drvinit(void)
{
	return subsys_interface_register(&s5pv210_pm_interface);
}
arch_initcall(s5pv210_pm_drvinit);

static void s5pv210_pm_resume(void)
{
	u32 tmp;

	tmp = __raw_readl(S5P_OTHERS);
	tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\
		S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART);
	__raw_writel(tmp , S5P_OTHERS);

	s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
}

static struct syscore_ops s5pv210_pm_syscore_ops = {
	.resume		= s5pv210_pm_resume,
};

static __init int s5pv210_pm_syscore_init(void)
{
	register_syscore_ops(&s5pv210_pm_syscore_ops);
	return 0;
}
arch_initcall(s5pv210_pm_syscore_init);
Commit	Line	Data
ea31fd43 JL	1	/* linux/arch/arm/mach-s5pv210/pm.c
	2	*
	3	* Copyright (c) 2010 Samsung Electronics Co., Ltd.
	4	* http://www.samsung.com
	5	*
	6	* S5PV210 - Power Management support
	7	*
	8	* Based on arch/arm/mach-s3c2410/pm.c
	9	* Copyright (c) 2006 Simtec Electronics
	10	* Ben Dooks <ben@simtec.co.uk>
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License version 2 as
	14	* published by the Free Software Foundation.
	15	*/
	16
	17	#include <linux/init.h>
	18	#include <linux/suspend.h>
bb072c3c	19	#include <linux/syscore_ops.h>
ea31fd43 JL	20	#include <linux/io.h>
	21
	22	#include <plat/cpu.h>
	23	#include <plat/pm.h>
	24	#include <plat/regs-timer.h>
	25
	26	#include <mach/regs-irq.h>
	27	#include <mach/regs-clock.h>
	28
	29	static struct sleep_save s5pv210_core_save[] = {
	30	/* Clock source */
	31	SAVE_ITEM(S5P_CLK_SRC0),
	32	SAVE_ITEM(S5P_CLK_SRC1),
	33	SAVE_ITEM(S5P_CLK_SRC2),
	34	SAVE_ITEM(S5P_CLK_SRC3),
	35	SAVE_ITEM(S5P_CLK_SRC4),
	36	SAVE_ITEM(S5P_CLK_SRC5),
	37	SAVE_ITEM(S5P_CLK_SRC6),
	38
	39	/* Clock source Mask */
	40	SAVE_ITEM(S5P_CLK_SRC_MASK0),
	41	SAVE_ITEM(S5P_CLK_SRC_MASK1),
	42
	43	/* Clock Divider */
	44	SAVE_ITEM(S5P_CLK_DIV0),
	45	SAVE_ITEM(S5P_CLK_DIV1),
	46	SAVE_ITEM(S5P_CLK_DIV2),
	47	SAVE_ITEM(S5P_CLK_DIV3),
	48	SAVE_ITEM(S5P_CLK_DIV4),
	49	SAVE_ITEM(S5P_CLK_DIV5),
	50	SAVE_ITEM(S5P_CLK_DIV6),
	51	SAVE_ITEM(S5P_CLK_DIV7),
	52
	53	/* Clock Main Gate */
	54	SAVE_ITEM(S5P_CLKGATE_MAIN0),
	55	SAVE_ITEM(S5P_CLKGATE_MAIN1),
	56	SAVE_ITEM(S5P_CLKGATE_MAIN2),
	57
	58	/* Clock source Peri Gate */
	59	SAVE_ITEM(S5P_CLKGATE_PERI0),
	60	SAVE_ITEM(S5P_CLKGATE_PERI1),
	61
	62	/* Clock source SCLK Gate */
	63	SAVE_ITEM(S5P_CLKGATE_SCLK0),
	64	SAVE_ITEM(S5P_CLKGATE_SCLK1),
	65
	66	/* Clock IP Clock gate */
	67	SAVE_ITEM(S5P_CLKGATE_IP0),
	68	SAVE_ITEM(S5P_CLKGATE_IP1),
	69	SAVE_ITEM(S5P_CLKGATE_IP2),
	70	SAVE_ITEM(S5P_CLKGATE_IP3),
	71	SAVE_ITEM(S5P_CLKGATE_IP4),
	72
	73	/* Clock Blcok and Bus gate */
	74	SAVE_ITEM(S5P_CLKGATE_BLOCK),
	75	SAVE_ITEM(S5P_CLKGATE_BUS0),
	76
	77	/* Clock ETC */
	78	SAVE_ITEM(S5P_CLK_OUT),
	79	SAVE_ITEM(S5P_MDNIE_SEL),
	80
	81	/* PWM Register */
	82	SAVE_ITEM(S3C2410_TCFG0),
	83	SAVE_ITEM(S3C2410_TCFG1),
84	SAVE_ITEM(S3C64XX_TINT_CSTAT),
85	SAVE_ITEM(S3C2410_TCON),
86	SAVE_ITEM(S3C2410_TCNTB(0)),
87	SAVE_ITEM(S3C2410_TCMPB(0)),
88	SAVE_ITEM(S3C2410_TCNTO(0)),
89	};
90
7e1291de	91	static int s5pv210_cpu_suspend(unsigned long arg)
ea31fd43 JL	92	{
	93	unsigned long tmp;
	94
	95	/* issue the standby signal into the pm unit. Note, we
	96	* issue a write-buffer drain just in case */
	97
	98	tmp = 0;
	99
	100	asm("b 1f\n\t"
	101	".align 5\n\t"
	102	"1:\n\t"
	103	"mcr p15, 0, %0, c7, c10, 5\n\t"
	104	"mcr p15, 0, %0, c7, c10, 4\n\t"
	105	"wfi" : : "r" (tmp));
	106
d3fcacf5 AK	107	pr_info("Failed to suspend the system\n");
d3fcacf5 AK	108	return 1; /* Aborting suspend */
ea31fd43 JL	109	}
	110
	111	static void s5pv210_pm_prepare(void)
	112	{
	113	unsigned int tmp;
	114
	115	/* ensure at least INFORM0 has the resume address */
	116	__raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);
	117
	118	tmp = __raw_readl(S5P_SLEEP_CFG);
	119	tmp &= ~(S5P_SLEEP_CFG_OSC_EN \| S5P_SLEEP_CFG_USBOSC_EN);
	120	__raw_writel(tmp, S5P_SLEEP_CFG);
	121
	122	/* WFI for SLEEP mode configuration by SYSCON */
	123	tmp = __raw_readl(S5P_PWR_CFG);
	124	tmp &= S5P_CFG_WFI_CLEAN;
	125	tmp \|= S5P_CFG_WFI_SLEEP;
	126	__raw_writel(tmp, S5P_PWR_CFG);
	127
	128	/* SYSCON interrupt handling disable */
	129	tmp = __raw_readl(S5P_OTHERS);
	130	tmp \|= S5P_OTHER_SYSC_INTOFF;
	131	__raw_writel(tmp, S5P_OTHERS);
	132
	133	s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
	134	}
	135
04511a6f	136	static int s5pv210_pm_add(struct device dev, struct subsys_interface sif)
ea31fd43 JL	137	{
	138	pm_cpu_prep = s5pv210_pm_prepare;
	139	pm_cpu_sleep = s5pv210_cpu_suspend;
	140
	141	return 0;
	142	}
	143
4a858cfc KS	144	static struct subsys_interface s5pv210_pm_interface = {
	145	.name = "s5pv210_pm",
	146	.subsys = &s5pv210_subsys,
	147	.add_dev = s5pv210_pm_add,
bb072c3c RW	148	};
	149
	150	static __init int s5pv210_pm_drvinit(void)
	151	{
4a858cfc	152	return subsys_interface_register(&s5pv210_pm_interface);
bb072c3c RW	153	}
	154	arch_initcall(s5pv210_pm_drvinit);
	155
	156	static void s5pv210_pm_resume(void)
ea31fd43 JL	157	{
	158	u32 tmp;
	159
	160	tmp = __raw_readl(S5P_OTHERS);
	161	tmp \|= (S5P_OTHERS_RET_IO \| S5P_OTHERS_RET_CF \|\
	162	S5P_OTHERS_RET_MMC \| S5P_OTHERS_RET_UART);
	163	__raw_writel(tmp , S5P_OTHERS);
	164
	165	s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
ea31fd43 JL	166	}
ea31fd43 JL	167
bb072c3c	168	static struct syscore_ops s5pv210_pm_syscore_ops = {
ea31fd43 JL	169	.resume = s5pv210_pm_resume,
	170	};
	171
bb072c3c	172	static __init int s5pv210_pm_syscore_init(void)
ea31fd43	173	{
bb072c3c RW	174	register_syscore_ops(&s5pv210_pm_syscore_ops);
bb072c3c RW	175	return 0;
ea31fd43	176	}
bb072c3c	177	arch_initcall(s5pv210_pm_syscore_init);