projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 | 1 | /* |
| a09e64fb | 2 | * arch/arm/mach-sa1100/include/mach/hardware.h |
| 1da177e4 | 3 | * |
| 2f82af08 | 4 | * Copyright (C) 1998 Nicolas Pitre <nico@fluxnic.net> |
| 1da177e4 LT |
5 | * |
| 6 | * This file contains the hardware definitions for SA1100 architecture | |
| 7 | * | |
| 8 | * 2000/05/23 John Dorsey <john+@cs.cmu.edu> | |
| 9 | * Definitions for SA1111 added. | |
| 10 | */ | |
| 11 | ||
| 12 | #ifndef __ASM_ARCH_HARDWARE_H | |
| 13 | #define __ASM_ARCH_HARDWARE_H | |
| 14 | ||
| 1da177e4 | 15 | |
| 1da177e4 LT |
16 | #define UNCACHEABLE_ADDR 0xfa050000 |
| 17 | ||
| 18 | ||
| 1da177e4 LT |
19 | /* |
| 20 | * SA1100 internal I/O mappings | |
| 21 | * | |
| 22 | * We have the following mapping: | |
| 23 | * phys virt | |
| 24 | * 80000000 f8000000 | |
| 25 | * 90000000 fa000000 | |
| 26 | * a0000000 fc000000 | |
| 27 | * b0000000 fe000000 | |
| 28 | */ | |
| 29 | ||
| 30 | #define VIO_BASE 0xf8000000 /* virtual start of IO space */ | |
| 31 | #define VIO_SHIFT 3 /* x = IO space shrink power */ | |
| 32 | #define PIO_START 0x80000000 /* physical start of IO space */ | |
| 33 | ||
| 34 | #define io_p2v( x ) \ | |
| 35 | ( (((x)&0x00ffffff) | (((x)&0x30000000)>>VIO_SHIFT)) + VIO_BASE ) | |
| 36 | #define io_v2p( x ) \ | |
| 37 | ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START ) | |
| 38 | ||
| 0ba8b9b2 RK |
39 | #define CPU_SA1110_A0 (0) |
| 40 | #define CPU_SA1110_B0 (4) | |
| 41 | #define CPU_SA1110_B1 (5) | |
| 42 | #define CPU_SA1110_B2 (6) | |
| 43 | #define CPU_SA1110_B4 (8) | |
| 44 | ||
| 45 | #define CPU_SA1100_ID (0x4401a110) | |
| 46 | #define CPU_SA1100_MASK (0xfffffff0) | |
| 47 | #define CPU_SA1110_ID (0x6901b110) | |
| 48 | #define CPU_SA1110_MASK (0xfffffff0) | |
| 49 | ||
| 1da177e4 | 50 | #ifndef __ASSEMBLY__ |
| 1da177e4 | 51 | |
| 0ba8b9b2 RK |
52 | #include <asm/cputype.h> |
| 53 | ||
| 54 | #define CPU_REVISION (read_cpuid_id() & 15) | |
| 55 | ||
| 56 | #define cpu_is_sa1100() ((read_cpuid_id() & CPU_SA1100_MASK) == CPU_SA1100_ID) | |
| 57 | #define cpu_is_sa1110() ((read_cpuid_id() & CPU_SA1110_MASK) == CPU_SA1110_ID) | |
| 58 | ||
| 61c8c158 NP |
59 | # define __REG(x) (*((volatile unsigned long *)io_p2v(x))) |
| 60 | # define __PREG(x) (io_v2p((unsigned long)&(x))) | |
| 1da177e4 | 61 | |
| 6769717d EM |
62 | static inline unsigned long get_clock_tick_rate(void) |
| 63 | { | |
| 64 | return 3686400; | |
| 65 | } | |
| 1da177e4 LT |
66 | #else |
| 67 | ||
| 68 | # define __REG(x) io_p2v(x) | |
| 69 | # define __PREG(x) io_v2p(x) | |
| 70 | ||
| 71 | #endif | |
| 72 | ||
| 73 | #include "SA-1100.h" | |
| 74 | ||
| 75 | #ifdef CONFIG_SA1101 | |
| 76 | #include "SA-1101.h" | |
| 77 | #endif | |
| 78 | ||
| 79 | #endif /* _ASM_ARCH_HARDWARE_H */ |