Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-sa1100/lart.c | |
3 | */ | |
4 | ||
5 | #include <linux/init.h> | |
6 | #include <linux/kernel.h> | |
6920b5a7 | 7 | #include <linux/platform_data/sa11x0-serial.h> |
1da177e4 | 8 | #include <linux/tty.h> |
18775a7b BW |
9 | #include <linux/gpio.h> |
10 | #include <linux/leds.h> | |
11 | #include <linux/platform_device.h> | |
1da177e4 | 12 | |
e1b7a72a RK |
13 | #include <video/sa1100fb.h> |
14 | ||
a09e64fb | 15 | #include <mach/hardware.h> |
1da177e4 LT |
16 | #include <asm/setup.h> |
17 | #include <asm/mach-types.h> | |
5876ee95 | 18 | #include <asm/page.h> |
1da177e4 LT |
19 | |
20 | #include <asm/mach/arch.h> | |
21 | #include <asm/mach/map.h> | |
a1fd844c | 22 | #include <linux/platform_data/mfd-mcp-sa11x0.h> |
f314f33b | 23 | #include <mach/irqs.h> |
1da177e4 LT |
24 | |
25 | #include "generic.h" | |
26 | ||
323cdfc1 RK |
27 | static struct mcp_plat_data lart_mcp_data = { |
28 | .mccr0 = MCCR0_ADM, | |
29 | .sclk_rate = 11981000, | |
30 | }; | |
31 | ||
e1b7a72a RK |
32 | #ifdef LART_GREY_LCD |
33 | static struct sa1100fb_mach_info lart_grey_info = { | |
34 | .pixclock = 150000, .bpp = 4, | |
35 | .xres = 320, .yres = 240, | |
36 | ||
37 | .hsync_len = 1, .vsync_len = 1, | |
38 | .left_margin = 4, .upper_margin = 0, | |
39 | .right_margin = 2, .lower_margin = 0, | |
40 | ||
41 | .cmap_greyscale = 1, | |
42 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
43 | ||
44 | .lccr0 = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono, | |
45 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512), | |
46 | }; | |
47 | #endif | |
48 | #ifdef LART_COLOR_LCD | |
49 | static struct sa1100fb_mach_info lart_color_info = { | |
50 | .pixclock = 150000, .bpp = 16, | |
51 | .xres = 320, .yres = 240, | |
52 | ||
53 | .hsync_len = 2, .vsync_len = 3, | |
54 | .left_margin = 69, .upper_margin = 14, | |
55 | .right_margin = 8, .lower_margin = 4, | |
56 | ||
57 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, | |
58 | .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512), | |
59 | }; | |
60 | #endif | |
61 | #ifdef LART_VIDEO_OUT | |
62 | static struct sa1100fb_mach_info lart_video_info = { | |
63 | .pixclock = 39721, .bpp = 16, | |
64 | .xres = 640, .yres = 480, | |
65 | ||
66 | .hsync_len = 95, .vsync_len = 2, | |
67 | .left_margin = 40, .upper_margin = 32, | |
68 | .right_margin = 24, .lower_margin = 11, | |
69 | ||
70 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
71 | ||
72 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, | |
73 | .lccr3 = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512), | |
74 | }; | |
75 | #endif | |
76 | ||
77 | #ifdef LART_KIT01_LCD | |
78 | static struct sa1100fb_mach_info lart_kit01_info = { | |
79 | .pixclock = 63291, .bpp = 16, | |
80 | .xres = 640, .yres = 480, | |
81 | ||
82 | .hsync_len = 64, .vsync_len = 3, | |
83 | .left_margin = 122, .upper_margin = 45, | |
84 | .right_margin = 10, .lower_margin = 10, | |
85 | ||
86 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, | |
87 | .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | |
88 | }; | |
89 | #endif | |
90 | ||
323cdfc1 RK |
91 | static void __init lart_init(void) |
92 | { | |
e1b7a72a RK |
93 | struct sa1100fb_mach_info *inf = NULL; |
94 | ||
95 | #ifdef LART_GREY_LCD | |
96 | inf = &lart_grey_info; | |
97 | #endif | |
98 | #ifdef LART_COLOR_LCD | |
99 | inf = &lart_color_info; | |
100 | #endif | |
101 | #ifdef LART_VIDEO_OUT | |
102 | inf = &lart_video_info; | |
103 | #endif | |
104 | #ifdef LART_KIT01_LCD | |
105 | inf = &lart_kit01_info; | |
106 | #endif | |
107 | ||
108 | if (inf) | |
109 | sa11x0_register_lcd(inf); | |
110 | ||
e36e26a8 | 111 | sa11x0_ppc_configure_mcp(); |
7a5b4e16 | 112 | sa11x0_register_mcp(&lart_mcp_data); |
323cdfc1 RK |
113 | } |
114 | ||
1da177e4 | 115 | static struct map_desc lart_io_desc[] __initdata = { |
92519d82 DS |
116 | { /* main flash memory */ |
117 | .virtual = 0xe8000000, | |
118 | .pfn = __phys_to_pfn(0x00000000), | |
119 | .length = 0x00400000, | |
120 | .type = MT_DEVICE | |
121 | }, { /* main flash, alternative location */ | |
122 | .virtual = 0xec000000, | |
123 | .pfn = __phys_to_pfn(0x08000000), | |
124 | .length = 0x00400000, | |
125 | .type = MT_DEVICE | |
126 | } | |
1da177e4 LT |
127 | }; |
128 | ||
18775a7b BW |
129 | /* LEDs */ |
130 | struct gpio_led lart_gpio_leds[] = { | |
131 | { | |
132 | .name = "lart:red", | |
133 | .default_trigger = "cpu0", | |
134 | .gpio = 23, | |
135 | }, | |
136 | }; | |
137 | ||
138 | static struct gpio_led_platform_data lart_gpio_led_info = { | |
139 | .leds = lart_gpio_leds, | |
140 | .num_leds = ARRAY_SIZE(lart_gpio_leds), | |
141 | }; | |
142 | ||
143 | static struct platform_device lart_leds = { | |
144 | .name = "leds-gpio", | |
145 | .id = -1, | |
146 | .dev = { | |
147 | .platform_data = &lart_gpio_led_info, | |
148 | } | |
149 | }; | |
1da177e4 LT |
150 | static void __init lart_map_io(void) |
151 | { | |
152 | sa1100_map_io(); | |
153 | iotable_init(lart_io_desc, ARRAY_SIZE(lart_io_desc)); | |
154 | ||
155 | sa1100_register_uart(0, 3); | |
156 | sa1100_register_uart(1, 1); | |
157 | sa1100_register_uart(2, 2); | |
158 | ||
159 | GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD); | |
160 | GPDR |= GPIO_UART_TXD; | |
161 | GPDR &= ~GPIO_UART_RXD; | |
162 | PPAR |= PPAR_UPR; | |
18775a7b BW |
163 | |
164 | platform_device_register(&lart_leds); | |
1da177e4 LT |
165 | } |
166 | ||
167 | MACHINE_START(LART, "LART") | |
17f4425d | 168 | .atag_offset = 0x100, |
e9dea0c6 | 169 | .map_io = lart_map_io, |
f314f33b | 170 | .nr_irqs = SA1100_NR_IRQS, |
e9dea0c6 | 171 | .init_irq = sa1100_init_irq, |
323cdfc1 | 172 | .init_machine = lart_init, |
7fea1ba5 | 173 | .init_late = sa11x0_init_late, |
6bb27d73 | 174 | .init_time = sa1100_timer_init, |
d9ca5839 | 175 | .restart = sa11x0_restart, |
1da177e4 | 176 | MACHINE_END |