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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-sa1100/time.c | |
3 | * | |
4 | * Copyright (C) 1998 Deborah Wallach. | |
5 | * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com> | |
6 | * | |
7 | * 2000/03/29 (C) Nicolas Pitre <nico@cam.org> | |
8 | * Rewritten: big cleanup, much simpler, better HZ accuracy. | |
9 | * | |
10 | */ | |
11 | #include <linux/init.h> | |
12 | #include <linux/errno.h> | |
13 | #include <linux/interrupt.h> | |
119c641c | 14 | #include <linux/irq.h> |
1da177e4 LT |
15 | #include <linux/timex.h> |
16 | #include <linux/signal.h> | |
17 | ||
18 | #include <asm/mach/time.h> | |
19 | #include <asm/hardware.h> | |
20 | ||
21 | #define RTC_DEF_DIVIDER (32768 - 1) | |
22 | #define RTC_DEF_TRIM 0 | |
23 | ||
24 | static unsigned long __init sa1100_get_rtc_time(void) | |
25 | { | |
26 | /* | |
27 | * According to the manual we should be able to let RTTR be zero | |
28 | * and then a default diviser for a 32.768KHz clock is used. | |
29 | * Apparently this doesn't work, at least for my SA1110 rev 5. | |
30 | * If the clock divider is uninitialized then reset it to the | |
31 | * default value to get the 1Hz clock. | |
32 | */ | |
33 | if (RTTR == 0) { | |
34 | RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); | |
35 | printk(KERN_WARNING "Warning: uninitialized Real Time Clock\n"); | |
36 | /* The current RTC value probably doesn't make sense either */ | |
37 | RCNR = 0; | |
38 | return 0; | |
39 | } | |
40 | return RCNR; | |
41 | } | |
42 | ||
43 | static int sa1100_set_rtc(void) | |
44 | { | |
45 | unsigned long current_time = xtime.tv_sec; | |
46 | ||
47 | if (RTSR & RTSR_ALE) { | |
48 | /* make sure not to forward the clock over an alarm */ | |
49 | unsigned long alarm = RTAR; | |
50 | if (current_time >= alarm && alarm >= RCNR) | |
51 | return -ERESTARTSYS; | |
52 | } | |
53 | RCNR = current_time; | |
54 | return 0; | |
55 | } | |
56 | ||
57 | /* IRQs are disabled before entering here from do_gettimeofday() */ | |
58 | static unsigned long sa1100_gettimeoffset (void) | |
59 | { | |
60 | unsigned long ticks_to_match, elapsed, usec; | |
61 | ||
62 | /* Get ticks before next timer match */ | |
63 | ticks_to_match = OSMR0 - OSCR; | |
64 | ||
65 | /* We need elapsed ticks since last match */ | |
66 | elapsed = LATCH - ticks_to_match; | |
67 | ||
68 | /* Now convert them to usec */ | |
69 | usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH; | |
70 | ||
71 | return usec; | |
72 | } | |
73 | ||
569d2c34 NP |
74 | #ifdef CONFIG_NO_IDLE_HZ |
75 | static unsigned long initial_match; | |
76 | static int match_posponed; | |
77 | #endif | |
78 | ||
1da177e4 | 79 | static irqreturn_t |
0cd61b68 | 80 | sa1100_timer_interrupt(int irq, void *dev_id) |
1da177e4 LT |
81 | { |
82 | unsigned int next_match; | |
83 | ||
84 | write_seqlock(&xtime_lock); | |
85 | ||
569d2c34 NP |
86 | #ifdef CONFIG_NO_IDLE_HZ |
87 | if (match_posponed) { | |
88 | match_posponed = 0; | |
89 | OSMR0 = initial_match; | |
90 | } | |
91 | #endif | |
92 | ||
20e91268 NP |
93 | /* |
94 | * Loop until we get ahead of the free running timer. | |
95 | * This ensures an exact clock tick count and time accuracy. | |
96 | * Since IRQs are disabled at this point, coherence between | |
97 | * lost_ticks(updated in do_timer()) and the match reg value is | |
98 | * ensured, hence we can use do_gettimeofday() from interrupt | |
99 | * handlers. | |
100 | */ | |
1da177e4 | 101 | do { |
0cd61b68 | 102 | timer_tick(); |
1da177e4 LT |
103 | OSSR = OSSR_M0; /* Clear match on timer 0 */ |
104 | next_match = (OSMR0 += LATCH); | |
105 | } while ((signed long)(next_match - OSCR) <= 0); | |
106 | ||
107 | write_sequnlock(&xtime_lock); | |
108 | ||
109 | return IRQ_HANDLED; | |
110 | } | |
111 | ||
112 | static struct irqaction sa1100_timer_irq = { | |
113 | .name = "SA11xx Timer Tick", | |
52e405ea | 114 | .flags = IRQF_DISABLED | IRQF_TIMER, |
09b8b5f8 | 115 | .handler = sa1100_timer_interrupt, |
1da177e4 LT |
116 | }; |
117 | ||
118 | static void __init sa1100_timer_init(void) | |
119 | { | |
120 | struct timespec tv; | |
121 | ||
122 | set_rtc = sa1100_set_rtc; | |
123 | ||
124 | tv.tv_nsec = 0; | |
125 | tv.tv_sec = sa1100_get_rtc_time(); | |
126 | do_settimeofday(&tv); | |
127 | ||
5285eb57 NP |
128 | OIER = 0; /* disable any timer interrupts */ |
129 | OSCR = LATCH*2; /* push OSCR out of the way */ | |
130 | OSMR0 = LATCH; /* set initial match */ | |
1da177e4 LT |
131 | OSSR = 0xf; /* clear status on all timers */ |
132 | setup_irq(IRQ_OST0, &sa1100_timer_irq); | |
5285eb57 NP |
133 | OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */ |
134 | OSCR = 0; /* initialize free-running timer */ | |
1da177e4 LT |
135 | } |
136 | ||
569d2c34 NP |
137 | #ifdef CONFIG_NO_IDLE_HZ |
138 | static int sa1100_dyn_tick_enable_disable(void) | |
139 | { | |
140 | /* nothing to do */ | |
141 | return 0; | |
142 | } | |
143 | ||
144 | static void sa1100_dyn_tick_reprogram(unsigned long ticks) | |
145 | { | |
146 | if (ticks > 1) { | |
147 | initial_match = OSMR0; | |
148 | OSMR0 = initial_match + ticks * LATCH; | |
149 | match_posponed = 1; | |
150 | } | |
151 | } | |
152 | ||
153 | static irqreturn_t | |
0cd61b68 | 154 | sa1100_dyn_tick_handler(int irq, void *dev_id) |
569d2c34 NP |
155 | { |
156 | if (match_posponed) { | |
157 | match_posponed = 0; | |
158 | OSMR0 = initial_match; | |
159 | if ((signed long)(initial_match - OSCR) <= 0) | |
0cd61b68 | 160 | return sa1100_timer_interrupt(irq, dev_id); |
569d2c34 NP |
161 | } |
162 | return IRQ_NONE; | |
163 | } | |
164 | ||
165 | static struct dyn_tick_timer sa1100_dyn_tick = { | |
166 | .enable = sa1100_dyn_tick_enable_disable, | |
167 | .disable = sa1100_dyn_tick_enable_disable, | |
168 | .reprogram = sa1100_dyn_tick_reprogram, | |
169 | .handler = sa1100_dyn_tick_handler, | |
170 | }; | |
171 | #endif | |
172 | ||
1da177e4 LT |
173 | #ifdef CONFIG_PM |
174 | unsigned long osmr[4], oier; | |
175 | ||
176 | static void sa1100_timer_suspend(void) | |
177 | { | |
178 | osmr[0] = OSMR0; | |
179 | osmr[1] = OSMR1; | |
180 | osmr[2] = OSMR2; | |
181 | osmr[3] = OSMR3; | |
182 | oier = OIER; | |
183 | } | |
184 | ||
185 | static void sa1100_timer_resume(void) | |
186 | { | |
187 | OSSR = 0x0f; | |
188 | OSMR0 = osmr[0]; | |
189 | OSMR1 = osmr[1]; | |
190 | OSMR2 = osmr[2]; | |
191 | OSMR3 = osmr[3]; | |
192 | OIER = oier; | |
193 | ||
194 | /* | |
195 | * OSMR0 is the system timer: make sure OSCR is sufficiently behind | |
196 | */ | |
197 | OSCR = OSMR0 - LATCH; | |
198 | } | |
199 | #else | |
200 | #define sa1100_timer_suspend NULL | |
201 | #define sa1100_timer_resume NULL | |
202 | #endif | |
203 | ||
204 | struct sys_timer sa1100_timer = { | |
205 | .init = sa1100_timer_init, | |
206 | .suspend = sa1100_timer_suspend, | |
207 | .resume = sa1100_timer_resume, | |
208 | .offset = sa1100_gettimeoffset, | |
569d2c34 NP |
209 | #ifdef CONFIG_NO_IDLE_HZ |
210 | .dyn_tick = &sa1100_dyn_tick, | |
211 | #endif | |
1da177e4 | 212 | }; |