ARM: mach-shmobile: Initial AG5 and AG5EVM support
[deliverable/linux.git] / arch / arm / mach-shmobile / board-ag5evm.c
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1/*
2 * arch/arm/mach-shmobile/board-ag5evm.c
3 *
4 * Copyright (C) 2010 Takashi Yoshii <yoshii.takashi.zj@renesas.com>
5 * Copyright (C) 2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 */
21
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/interrupt.h>
25#include <linux/irq.h>
26#include <linux/platform_device.h>
27#include <linux/delay.h>
28#include <linux/io.h>
29#include <linux/dma-mapping.h>
30#include <linux/serial_sci.h>
31#include <linux/smsc911x.h>
32#include <linux/gpio.h>
33#include <mach/hardware.h>
34#include <mach/sh73a0.h>
35#include <mach/common.h>
36#include <asm/mach-types.h>
37#include <asm/mach/arch.h>
38#include <asm/mach/map.h>
39#include <asm/mach/time.h>
40#include <asm/hardware/gic.h>
41#include <asm/hardware/cache-l2x0.h>
42#include <asm/traps.h>
43
44static struct resource smsc9220_resources[] = {
45 [0] = {
46 .start = 0x14000000,
47 .end = 0x14000000 + SZ_64K - 1,
48 .flags = IORESOURCE_MEM,
49 },
50 [1] = {
51 .start = gic_spi(33), /* PINT1 */
52 .flags = IORESOURCE_IRQ,
53 },
54};
55
56static struct smsc911x_platform_config smsc9220_platdata = {
57 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
58 .phy_interface = PHY_INTERFACE_MODE_MII,
59 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
60 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
61};
62
63static struct platform_device eth_device = {
64 .name = "smsc911x",
65 .id = 0,
66 .dev = {
67 .platform_data = &smsc9220_platdata,
68 },
69 .resource = smsc9220_resources,
70 .num_resources = ARRAY_SIZE(smsc9220_resources),
71};
72
73static struct platform_device *ag5evm_devices[] __initdata = {
74 &eth_device,
75};
76
77static struct map_desc ag5evm_io_desc[] __initdata = {
78 /* create a 1:1 entity map for 0xe6xxxxxx
79 * used by CPGA, INTC and PFC.
80 */
81 {
82 .virtual = 0xe6000000,
83 .pfn = __phys_to_pfn(0xe6000000),
84 .length = 256 << 20,
85 .type = MT_DEVICE_NONSHARED
86 },
87};
88
89static void __init ag5evm_map_io(void)
90{
91 iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc));
92
93 /* setup early devices and console here as well */
94 sh73a0_add_early_devices();
95 shmobile_setup_console();
96}
97
98#define PINTC_ADDR 0xe6900000
99#define PINTER0A (PINTC_ADDR + 0xa0)
100#define PINTCR0A (PINTC_ADDR + 0xb0)
101
102void __init ag5evm_init_irq(void)
103{
104 /* setup PINT: enable PINTA2 as active low */
105 __raw_writel(__raw_readl(PINTER0A) | (1<<29), PINTER0A);
106 __raw_writew(__raw_readw(PINTCR0A) | (2<<10), PINTCR0A);
107
108 gic_dist_init(0, __io(0xf0001000), 29);
109 gic_cpu_init(0, __io(0xf0000100));
110}
111
112#define PORT144CR 0xe6052090
113#define PORT145CR 0xe6052091
114
115#define PORT154CR 0xe605209a
116#define PORT155CR 0xe605209b
117#define PORT156CR 0xe605209c
118#define PORT157CR 0xe605209d
119
120#define PORTR159_128DR 0xe6056004
121
122static void __init ag5evm_init(void)
123{
124 /* enable SCIFA2 */
125 __raw_writeb(0x12, PORT154CR); /* TXD */
126 __raw_writeb(0x22, PORT155CR); /* RXD */
127 __raw_writeb(0x12, PORT156CR); /* RTS */
128 __raw_writeb(0x22, PORT157CR); /* CTS */
129
130 /* enable SMSC911X */
131 __raw_writeb(0x20, PORT144CR); /* PINTA2 */
132 __raw_writeb(0x10, PORT145CR); /* RESET */
133 __raw_writel(__raw_readl(PORTR159_128DR) & ~(1 << 17), PORTR159_128DR);
134
135#ifdef CONFIG_CACHE_L2X0
136 /* Shared attribute override enable, 64K*8way */
137 l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
138#endif
139 sh73a0_add_standard_devices();
140 platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
141}
142
143static void __init ag5evm_timer_init(void)
144{
145 sh73a0_clock_init();
146 shmobile_timer.init();
147 return;
148}
149
150struct sys_timer ag5evm_timer = {
151 .init = ag5evm_timer_init,
152};
153
154MACHINE_START(AG5EVM, "ag5evm")
155 .map_io = ag5evm_map_io,
156 .init_irq = ag5evm_init_irq,
157 .init_machine = ag5evm_init,
158 .timer = &ag5evm_timer,
159MACHINE_END
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