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ASoC: Remove controls from sequenced PGA arguments
[deliverable/linux.git] / arch / arm / mach-shmobile / board-ap4evb.c
CommitLineData
2b7eda63
MD		 1/*
2 * AP4EVB board support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
8eda2f21 20#include <linux/clk.h>
2b7eda63
MD		 21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/platform_device.h>
26#include <linux/delay.h>
69bf6f45 27#include <linux/mfd/sh_mobile_sdhi.h>
410d878b 28#include <linux/mfd/tmio.h>
341291a6 29#include <linux/mmc/host.h>
2b7eda63
MD		 30#include <linux/mtd/mtd.h>
31#include <linux/mtd/partitions.h>
32#include <linux/mtd/physmap.h>
c8ee3d4b 33#include <linux/mmc/sh_mmcif.h>
91cf5082
KM		 34#include <linux/i2c.h>
35#include <linux/i2c/tsc2007.h>
2b7eda63 36#include <linux/io.h>
1b7e0677 37#include <linux/smsc911x.h>
cb9215e1
KM		 38#include <linux/sh_intc.h>
39#include <linux/sh_clk.h>
1b7e0677 40#include <linux/gpio.h>
17ccb834 41#include <linux/input.h>
2863e935 42#include <linux/leds.h>
17ccb834 43#include <linux/input/sh_keysc.h>
fb54d268 44#include <linux/usb/r8a66597.h>
8eda2f21 45
1a0b1eac
GL		 46#include <media/sh_mobile_ceu.h>
47#include <media/sh_mobile_csi2.h>
48#include <media/soc_camera.h>
49
cb9215e1
KM		 50#include <sound/sh_fsi.h>
51
dfbcdf64 52#include <video/sh_mobile_hdmi.h>
8eda2f21
GL		 53#include <video/sh_mobile_lcdc.h>
54#include <video/sh_mipi_dsi.h>
55
2b7eda63 56#include <mach/common.h>
8eda2f21 57#include <mach/irqs.h>
1b7e0677 58#include <mach/sh7372.h>
8eda2f21 59
2b7eda63
MD		 60#include <asm/mach-types.h>
61#include <asm/mach/arch.h>
62#include <asm/mach/map.h>
495b3cea 63#include <asm/mach/time.h>
3d09fbcd 64#include <asm/setup.h>
2b7eda63 65
02624a17
KM		 66/*
67 * Address Interface BusWidth note
68 * ------------------------------------------------------------------
69 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
70 * 0x0800_0000 user area -
71 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
72 * 0x1400_0000 Ether (LAN9220) 16bit
73 * 0x1600_0000 user area - cannot use with NAND
74 * 0x1800_0000 user area -
75 * 0x1A00_0000 -
76 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
77 */
78
79/*
80 * NOR Flash ROM
81 *
82 * SW1 | SW2 | SW7 | NOR Flash ROM
83 * bit1 | bit1 bit2 | bit1 | Memory allocation
84 * ------+------------+------+------------------
85 * OFF | ON OFF | ON | Area 0
86 * OFF | ON OFF | OFF | Area 4
87 */
88
89/*
90 * NAND Flash ROM
91 *
92 * SW1 | SW2 | SW7 | NAND Flash ROM
93 * bit1 | bit1 bit2 | bit2 | Memory allocation
94 * ------+------------+------+------------------
95 * OFF | ON OFF | ON | FCE 0
96 * OFF | ON OFF | OFF | FCE 1
97 */
98
99/*
100 * SMSC 9220
101 *
102 * SW1 SMSC 9220
103 * -----------------------
104 * ON access disable
105 * OFF access enable
106 */
107
17ccb834 108/*
dda128dc 109 * LCD / IRQ / KEYSC / IrDA
17ccb834 110 *
9fa1b7fe
KM		 111 * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
112 * LCD = 2nd LCDC (WVGA)
dda128dc
KM		 113 *
114 * | SW43 |
115 * SW3 | ON | OFF |
116 * -------------+-----------------------+---------------+
117 * ON | KEY / IrDA | LCD |
118 * OFF | KEY / IrDA / IRQ | IRQ |
9fa1b7fe
KM		 119 *
120 *
121 * QHD / WVGA display
122 *
123 * You can choice display type on menuconfig.
124 * Then, check above dip-switch.
17ccb834
KM		 125 */
126
fb54d268
KM		 127/*
128 * USB
129 *
130 * J7 : 1-2 MAX3355E VBUS
131 * 2-3 DC 5.0V
132 *
133 * S39: bit2: off
134 */
135
cb9215e1
KM		 136/*
137 * FSI/FSMI
138 *
139 * SW41 : ON : SH-Mobile AP4 Audio Mode
140 * : OFF : Bluetooth Audio Mode
141 */
142
c8ee3d4b 143/*
d3d03e48 144 * MMC0/SDHI1 (CN7)
c8ee3d4b 145 *
d3d03e48
KM		 146 * J22 : select card voltage
147 * 1-2 pin : 1.8v
148 * 2-3 pin : 3.3v
149 *
150 * SW1 | SW33
151 * | bit1 | bit2 | bit3 | bit4
152 * ------------+------+------+------+-------
153 * MMC0 OFF | OFF | ON | ON | X
154 * SDHI1 OFF | ON | X | OFF | ON
155 *
156 * voltage lebel
157 * CN7 : 1.8v
158 * CN12: 3.3v
c8ee3d4b
KM		 159 */
160
1b7e0677 161/* MTD */
2b7eda63
MD		 162static struct mtd_partition nor_flash_partitions[] = {
163 {
164 .name = "loader",
165 .offset = 0x00000000,
166 .size = 512 * 1024,
2e351ec6 167 .mask_flags = MTD_WRITEABLE,
2b7eda63
MD		 168 },
169 {
170 .name = "bootenv",
171 .offset = MTDPART_OFS_APPEND,
172 .size = 512 * 1024,
2e351ec6 173 .mask_flags = MTD_WRITEABLE,
2b7eda63
MD		 174 },
175 {
176 .name = "kernel_ro",
177 .offset = MTDPART_OFS_APPEND,
178 .size = 8 * 1024 * 1024,
179 .mask_flags = MTD_WRITEABLE,
180 },
181 {
182 .name = "kernel",
183 .offset = MTDPART_OFS_APPEND,
184 .size = 8 * 1024 * 1024,
185 },
186 {
187 .name = "data",
188 .offset = MTDPART_OFS_APPEND,
189 .size = MTDPART_SIZ_FULL,
190 },
191};
192
193static struct physmap_flash_data nor_flash_data = {
194 .width = 2,
195 .parts = nor_flash_partitions,
196 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
197};
198
199static struct resource nor_flash_resources[] = {
200 [0] = {
201 .start = 0x00000000,
202 .end = 0x08000000 - 1,
203 .flags = IORESOURCE_MEM,
204 }
205};
206
207static struct platform_device nor_flash_device = {
208 .name = "physmap-flash",
209 .dev = {
210 .platform_data = &nor_flash_data,
211 },
212 .num_resources = ARRAY_SIZE(nor_flash_resources),
213 .resource = nor_flash_resources,
214};
215
1b7e0677
KM		 216/* SMSC 9220 */
217static struct resource smc911x_resources[] = {
218 {
219 .start = 0x14000000,
220 .end = 0x16000000 - 1,
221 .flags = IORESOURCE_MEM,
222 }, {
33c9607a 223 .start = evt2irq(0x02c0) /* IRQ6A */,
1b7e0677
KM		 224 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
225 },
226};
227
228static struct smsc911x_platform_config smsc911x_info = {
229 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
230 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
231 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
232};
233
234static struct platform_device smc911x_device = {
235 .name = "smsc911x",
236 .id = -1,
237 .num_resources = ARRAY_SIZE(smc911x_resources),
238 .resource = smc911x_resources,
239 .dev = {
240 .platform_data = &smsc911x_info,
241 },
242};
2b7eda63 243
68accd73
AH		 244/*
245 * The card detect pin of the top SD/MMC slot (CN7) is active low and is
246 * connected to GPIO A22 of SH7372 (GPIO_PORT41).
247 */
248static int slot_cn7_get_cd(struct platform_device *pdev)
249{
ceb50f33 250 return !gpio_get_value(GPIO_PORT41);
68accd73
AH		 251}
252
c8ee3d4b
KM		 253/* SH_MMCIF */
254static struct resource sh_mmcif_resources[] = {
255 [0] = {
0fb0834b 256 .name = "MMCIF",
c8ee3d4b
KM		 257 .start = 0xE6BD0000,
258 .end = 0xE6BD00FF,
259 .flags = IORESOURCE_MEM,
260 },
261 [1] = {
262 /* MMC ERR */
8d569341 263 .start = evt2irq(0x1ac0),
c8ee3d4b
KM		 264 .flags = IORESOURCE_IRQ,
265 },
266 [2] = {
267 /* MMC NOR */
8d569341 268 .start = evt2irq(0x1ae0),
c8ee3d4b
KM		 269 .flags = IORESOURCE_IRQ,
270 },
271};
272
df73af86
GL		 273static struct sh_mmcif_dma sh_mmcif_dma = {
274 .chan_priv_rx = {
275 .slave_id = SHDMA_SLAVE_MMCIF_RX,
276 },
277 .chan_priv_tx = {
278 .slave_id = SHDMA_SLAVE_MMCIF_TX,
279 },
280};
281
bb04e197 282static struct sh_mmcif_plat_data sh_mmcif_plat = {
c8ee3d4b
KM		 283 .sup_pclk = 0,
284 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
285 .caps = MMC_CAP_4_BIT_DATA |
286 MMC_CAP_8_BIT_DATA |
287 MMC_CAP_NEEDS_POLL,
68accd73 288 .get_cd = slot_cn7_get_cd,
df73af86 289 .dma = &sh_mmcif_dma,
c8ee3d4b
KM		 290};
291
292static struct platform_device sh_mmcif_device = {
293 .name = "sh_mmcif",
294 .id = 0,
295 .dev = {
296 .dma_mask = NULL,
297 .coherent_dma_mask = 0xffffffff,
298 .platform_data = &sh_mmcif_plat,
299 },
300 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
301 .resource = sh_mmcif_resources,
302};
303
3a14d039 304/* SDHI0 */
69bf6f45 305static struct sh_mobile_sdhi_info sdhi0_info = {
341291a6
GL		 306 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
307 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
330e4e71 308 .tmio_caps = MMC_CAP_SDIO_IRQ,
69bf6f45
GL		 309};
310
3a14d039
MD		 311static struct resource sdhi0_resources[] = {
312 [0] = {
313 .name = "SDHI0",
314 .start = 0xe6850000,
315 .end = 0xe68501ff,
316 .flags = IORESOURCE_MEM,
317 },
318 [1] = {
33c9607a 319 .start = evt2irq(0x0e00) /* SDHI0 */,
3a14d039
MD		 320 .flags = IORESOURCE_IRQ,
321 },
322};
323
324static struct platform_device sdhi0_device = {
325 .name = "sh_mobile_sdhi",
326 .num_resources = ARRAY_SIZE(sdhi0_resources),
327 .resource = sdhi0_resources,
328 .id = 0,
69bf6f45
GL		 329 .dev = {
330 .platform_data = &sdhi0_info,
331 },
3a14d039
MD		 332};
333
341291a6
GL		 334/* SDHI1 */
335static struct sh_mobile_sdhi_info sdhi1_info = {
336 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
337 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
338 .tmio_ocr_mask = MMC_VDD_165_195,
410d878b 339 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
330e4e71 340 .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
68accd73 341 .get_cd = slot_cn7_get_cd,
341291a6
GL		 342};
343
344static struct resource sdhi1_resources[] = {
345 [0] = {
346 .name = "SDHI1",
347 .start = 0xe6860000,
348 .end = 0xe68601ff,
349 .flags = IORESOURCE_MEM,
350 },
351 [1] = {
352 .start = evt2irq(0x0e80),
353 .flags = IORESOURCE_IRQ,
354 },
355};
356
357static struct platform_device sdhi1_device = {
358 .name = "sh_mobile_sdhi",
359 .num_resources = ARRAY_SIZE(sdhi1_resources),
360 .resource = sdhi1_resources,
361 .id = 1,
362 .dev = {
363 .platform_data = &sdhi1_info,
364 },
365};
366
fb54d268 367/* USB1 */
bb04e197 368static void usb1_host_port_power(int port, int power)
fb54d268
KM		 369{
370 if (!power) /* only power-on supported for now */
371 return;
372
373 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
374 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
375}
376
377static struct r8a66597_platdata usb1_host_data = {
378 .on_chip = 1,
379 .port_power = usb1_host_port_power,
380};
381
382static struct resource usb1_host_resources[] = {
383 [0] = {
384 .name = "USBHS",
385 .start = 0xE68B0000,
386 .end = 0xE68B00E6 - 1,
387 .flags = IORESOURCE_MEM,
388 },
389 [1] = {
33c9607a 390 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
fb54d268
KM		 391 .flags = IORESOURCE_IRQ,
392 },
393};
394
395static struct platform_device usb1_host_device = {
396 .name = "r8a66597_hcd",
397 .id = 1,
398 .dev = {
399 .dma_mask = NULL, /* not use dma */
400 .coherent_dma_mask = 0xffffffff,
401 .platform_data = &usb1_host_data,
402 },
403 .num_resources = ARRAY_SIZE(usb1_host_resources),
404 .resource = usb1_host_resources,
405};
406
44432407
GL		 407const static struct fb_videomode ap4evb_lcdc_modes[] = {
408 {
409#ifdef CONFIG_AP4EVB_QHD
410 .name = "R63302(QHD)",
411 .xres = 544,
412 .yres = 961,
413 .left_margin = 72,
414 .right_margin = 600,
415 .hsync_len = 16,
416 .upper_margin = 8,
417 .lower_margin = 8,
418 .vsync_len = 2,
419 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
420#else
421 .name = "WVGA Panel",
422 .xres = 800,
423 .yres = 480,
424 .left_margin = 220,
425 .right_margin = 110,
426 .hsync_len = 70,
427 .upper_margin = 20,
428 .lower_margin = 5,
429 .vsync_len = 5,
430 .sync = 0,
431#endif
432 },
433};
434
9fa1b7fe 435static struct sh_mobile_lcdc_info lcdc_info = {
8eda2f21
GL		 436 .ch[0] = {
437 .chan = LCDC_CHAN_MAINLCD,
438 .bpp = 16,
44432407
GL		 439 .lcd_cfg = ap4evb_lcdc_modes,
440 .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes),
8eda2f21
GL		 441 }
442};
443
444static struct resource lcdc_resources[] = {
445 [0] = {
446 .name = "LCDC",
447 .start = 0xfe940000, /* P4-only space */
448 .end = 0xfe943fff,
449 .flags = IORESOURCE_MEM,
450 },
451 [1] = {
452 .start = intcs_evt2irq(0x580),
453 .flags = IORESOURCE_IRQ,
454 },
455};
456
457static struct platform_device lcdc_device = {
458 .name = "sh_mobile_lcdc_fb",
459 .num_resources = ARRAY_SIZE(lcdc_resources),
460 .resource = lcdc_resources,
461 .dev = {
9fa1b7fe 462 .platform_data = &lcdc_info,
8eda2f21
GL		 463 .coherent_dma_mask = ~0,
464 },
465};
466
9fa1b7fe
KM		 467/*
468 * QHD display
469 */
470#ifdef CONFIG_AP4EVB_QHD
471
472/* KEYSC (Needs SW43 set to ON) */
473static struct sh_keysc_info keysc_info = {
474 .mode = SH_KEYSC_MODE_1,
475 .scan_timing = 3,
476 .delay = 2500,
477 .keycodes = {
478 KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
479 KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
480 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
481 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
482 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
483 },
484};
485
486static struct resource keysc_resources[] = {
487 [0] = {
488 .name = "KEYSC",
489 .start = 0xe61b0000,
490 .end = 0xe61b0063,
491 .flags = IORESOURCE_MEM,
492 },
493 [1] = {
494 .start = evt2irq(0x0be0), /* KEYSC_KEY */
495 .flags = IORESOURCE_IRQ,
496 },
497};
498
499static struct platform_device keysc_device = {
500 .name = "sh_keysc",
501 .id = 0, /* "keysc0" clock */
502 .num_resources = ARRAY_SIZE(keysc_resources),
503 .resource = keysc_resources,
504 .dev = {
505 .platform_data = &keysc_info,
506 },
507};
508
509/* MIPI-DSI */
8eda2f21
GL		 510static struct resource mipidsi0_resources[] = {
511 [0] = {
512 .start = 0xffc60000,
5958d58a
MD		 513 .end = 0xffc63073,
514 .flags = IORESOURCE_MEM,
515 },
516 [1] = {
517 .start = 0xffc68000,
518 .end = 0xffc680ef,
8eda2f21
GL		 519 .flags = IORESOURCE_MEM,
520 },
521};
522
523static struct sh_mipi_dsi_info mipidsi0_info = {
524 .data_format = MIPI_RGB888,
9fa1b7fe 525 .lcd_chan = &lcdc_info.ch[0],
6fd46595 526 .vsynw_offset = 17,
8eda2f21
GL		 527};
528
529static struct platform_device mipidsi0_device = {
530 .name = "sh-mipi-dsi",
531 .num_resources = ARRAY_SIZE(mipidsi0_resources),
532 .resource = mipidsi0_resources,
533 .id = 0,
534 .dev = {
535 .platform_data = &mipidsi0_info,
536 },
537};
538
9fa1b7fe
KM		 539static struct platform_device *qhd_devices[] __initdata = {
540 &mipidsi0_device,
541 &keysc_device,
542};
543#endif /* CONFIG_AP4EVB_QHD */
544
cb9215e1
KM		 545/* FSI */
546#define IRQ_FSI evt2irq(0x1840)
d4bc99b9
KM		 547static int __fsi_set_rate(struct clk *clk, long rate, int enable)
548{
549 int ret = 0;
550
551 if (rate <= 0)
552 return ret;
2669efec 553
d4bc99b9 554 if (enable) {
22de4e1f 555 ret = clk_set_rate(clk, rate);
d4bc99b9
KM		 556 if (0 == ret)
557 ret = clk_enable(clk);
558 } else {
559 clk_disable(clk);
560 }
561
562 return ret;
563}
564
22de4e1f
KM		 565static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
566{
567 return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
568}
569
570static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
571{
572 struct clk *fsia_ick;
573 struct clk *fsiack;
574 int ret = -EIO;
575
576 fsia_ick = clk_get(dev, "icka");
577 if (IS_ERR(fsia_ick))
578 return PTR_ERR(fsia_ick);
579
580 /*
581 * FSIACK is connected to AK4642,
582 * and use external clock pin from it.
583 * it is parent of fsia_ick now.
584 */
585 fsiack = clk_get_parent(fsia_ick);
586 if (!fsiack)
587 goto fsia_ick_out;
588
589 /*
590 * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
591 *
592 ** FIXME **
593 * Because the freq_table of external clk (fsiack) are all 0,
594 * the return value of clk_round_rate became 0.
595 * So, it use __fsi_set_rate here.
596 */
597 ret = __fsi_set_rate(fsiack, rate, enable);
598 if (ret < 0)
599 goto fsiack_out;
600
601 ret = __fsi_set_round_rate(fsia_ick, rate, enable);
602 if ((ret < 0) && enable)
603 __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
604
605fsiack_out:
606 clk_put(fsiack);
607
608fsia_ick_out:
609 clk_put(fsia_ick);
610
611 return 0;
612}
613
614static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
2669efec
KM		 615{
616 struct clk *fsib_clk;
617 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
d4bc99b9
KM		 618 long fsib_rate = 0;
619 long fdiv_rate = 0;
620 int ackmd_bpfmd;
2669efec
KM		 621 int ret;
622
2669efec 623 switch (rate) {
574490e3 624 case 44100:
d4bc99b9
KM		 625 fsib_rate = rate * 256;
626 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
574490e3 627 break;
2669efec 628 case 48000:
d4bc99b9
KM		 629 fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
630 fdiv_rate = rate * 256;
631 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
2669efec
KM		 632 break;
633 default:
634 pr_err("unsupported rate in FSI2 port B\n");
d4bc99b9 635 return -EINVAL;
2669efec
KM		 636 }
637
d4bc99b9
KM		 638 /* FSI B setting */
639 fsib_clk = clk_get(dev, "ickb");
640 if (IS_ERR(fsib_clk))
641 return -EIO;
642
22de4e1f 643 ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
d4bc99b9 644 if (ret < 0)
73674648 645 goto fsi_set_rate_end;
d4bc99b9
KM		 646
647 /* FSI DIV setting */
22de4e1f 648 ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
d4bc99b9
KM		 649 if (ret < 0) {
650 /* disable FSI B */
651 if (enable)
22de4e1f 652 __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
73674648 653 goto fsi_set_rate_end;
d4bc99b9 654 }
2669efec 655
73674648
KM		 656 ret = ackmd_bpfmd;
657
658fsi_set_rate_end:
659 clk_put(fsib_clk);
660 return ret;
2669efec
KM		 661}
662
22de4e1f
KM		 663static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
664{
665 int ret;
666
667 if (is_porta)
668 ret = fsi_ak4642_set_rate(dev, rate, enable);
669 else
670 ret = fsi_hdmi_set_rate(dev, rate, enable);
671
672 return ret;
673}
674
bb04e197 675static struct sh_fsi_platform_info fsi_info = {
cb9215e1 676 .porta_flags = SH_FSI_BRS_INV |
cb9215e1
KM		 677 SH_FSI_OFMT(PCM) |
678 SH_FSI_IFMT(PCM),
2669efec
KM		 679
680 .portb_flags = SH_FSI_BRS_INV |
681 SH_FSI_BRM_INV |
682 SH_FSI_LRS_INV |
683 SH_FSI_OFMT(SPDIF),
684 .set_rate = fsi_set_rate,
cb9215e1
KM		 685};
686
687static struct resource fsi_resources[] = {
688 [0] = {
689 .name = "FSI",
690 .start = 0xFE3C0000,
691 .end = 0xFE3C0400 - 1,
692 .flags = IORESOURCE_MEM,
693 },
694 [1] = {
695 .start = IRQ_FSI,
696 .flags = IORESOURCE_IRQ,
697 },
698};
699
700static struct platform_device fsi_device = {
701 .name = "sh_fsi2",
9f6f11b6 702 .id = -1,
cb9215e1
KM		 703 .num_resources = ARRAY_SIZE(fsi_resources),
704 .resource = fsi_resources,
705 .dev = {
706 .platform_data = &fsi_info,
707 },
708};
709
c8d6bf9a
KM		 710static struct platform_device fsi_ak4643_device = {
711 .name = "sh_fsi2_a_ak4643",
712};
713
dfbcdf64
GL		 714static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
715 .clock_source = LCDC_CLK_EXTERNAL,
716 .ch[0] = {
717 .chan = LCDC_CHAN_MAINLCD,
718 .bpp = 16,
719 .interface_type = RGB24,
720 .clock_divider = 1,
721 .flags = LCDC_FLAGS_DWPOL,
dfbcdf64
GL		 722 }
723};
724
725static struct resource lcdc1_resources[] = {
726 [0] = {
727 .name = "LCDC1",
728 .start = 0xfe944000,
729 .end = 0xfe947fff,
730 .flags = IORESOURCE_MEM,
731 },
732 [1] = {
88c759a2 733 .start = intcs_evt2irq(0x1780),
dfbcdf64
GL		 734 .flags = IORESOURCE_IRQ,
735 },
736};
737
738static struct platform_device lcdc1_device = {
739 .name = "sh_mobile_lcdc_fb",
740 .num_resources = ARRAY_SIZE(lcdc1_resources),
741 .resource = lcdc1_resources,
742 .id = 1,
743 .dev = {
744 .platform_data = &sh_mobile_lcdc1_info,
745 .coherent_dma_mask = ~0,
746 },
747};
748
640dcfa0
GL		 749static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
750 unsigned long *parent_freq);
751
752
dfbcdf64
GL		 753static struct sh_mobile_hdmi_info hdmi_info = {
754 .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
755 .lcd_dev = &lcdc1_device.dev,
2669efec 756 .flags = HDMI_SND_SRC_SPDIF,
640dcfa0 757 .clk_optimize_parent = ap4evb_clk_optimize,
dfbcdf64
GL		 758};
759
760static struct resource hdmi_resources[] = {
761 [0] = {
762 .name = "HDMI",
763 .start = 0xe6be0000,
764 .end = 0xe6be00ff,
765 .flags = IORESOURCE_MEM,
766 },
767 [1] = {
768 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
769 .start = evt2irq(0x17e0),
770 .flags = IORESOURCE_IRQ,
771 },
772};
773
774static struct platform_device hdmi_device = {
775 .name = "sh-mobile-hdmi",
776 .num_resources = ARRAY_SIZE(hdmi_resources),
777 .resource = hdmi_resources,
778 .id = -1,
779 .dev = {
780 .platform_data = &hdmi_info,
781 },
782};
783
640dcfa0
GL		 784static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
785 unsigned long *parent_freq)
786{
787 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
788 long error;
789
790 if (IS_ERR(hdmi_ick)) {
791 int ret = PTR_ERR(hdmi_ick);
792 pr_err("Cannot get HDMI ICK: %d\n", ret);
793 return ret;
794 }
795
796 error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
797
798 clk_put(hdmi_ick);
799
800 return error;
801}
802
2863e935
AH		 803static struct gpio_led ap4evb_leds[] = {
804 {
805 .name = "led4",
806 .gpio = GPIO_PORT185,
807 .default_state = LEDS_GPIO_DEFSTATE_ON,
808 },
809 {
810 .name = "led2",
811 .gpio = GPIO_PORT186,
812 .default_state = LEDS_GPIO_DEFSTATE_ON,
813 },
814 {
815 .name = "led3",
816 .gpio = GPIO_PORT187,
817 .default_state = LEDS_GPIO_DEFSTATE_ON,
818 },
819 {
820 .name = "led1",
821 .gpio = GPIO_PORT188,
822 .default_state = LEDS_GPIO_DEFSTATE_ON,
823 }
824};
825
826static struct gpio_led_platform_data ap4evb_leds_pdata = {
827 .num_leds = ARRAY_SIZE(ap4evb_leds),
8050fbf2 828 .leds = ap4evb_leds,
2863e935
AH		 829};
830
831static struct platform_device leds_device = {
832 .name = "leds-gpio",
833 .id = 0,
834 .dev = {
835 .platform_data = &ap4evb_leds_pdata,
836 },
837};
838
1a0b1eac
GL		 839static struct i2c_board_info imx074_info = {
840 I2C_BOARD_INFO("imx074", 0x1a),
841};
842
843struct soc_camera_link imx074_link = {
844 .bus_id = 0,
845 .board_info = &imx074_info,
846 .i2c_adapter_id = 0,
847 .module_name = "imx074",
848};
849
850static struct platform_device ap4evb_camera = {
851 .name = "soc-camera-pdrv",
852 .id = 0,
853 .dev = {
854 .platform_data = &imx074_link,
855 },
856};
857
858static struct sh_csi2_client_config csi2_clients[] = {
859 {
860 .phy = SH_CSI2_PHY_MAIN,
861 .lanes = 3,
862 .channel = 0,
863 .pdev = &ap4evb_camera,
864 },
865};
866
867static struct sh_csi2_pdata csi2_info = {
868 .type = SH_CSI2C,
869 .clients = csi2_clients,
870 .num_clients = ARRAY_SIZE(csi2_clients),
871 .flags = SH_CSI2_ECC | SH_CSI2_CRC,
872};
873
874static struct resource csi2_resources[] = {
875 [0] = {
876 .name = "CSI2",
877 .start = 0xffc90000,
878 .end = 0xffc90fff,
879 .flags = IORESOURCE_MEM,
880 },
881 [1] = {
882 .start = intcs_evt2irq(0x17a0),
883 .flags = IORESOURCE_IRQ,
884 },
885};
886
887static struct platform_device csi2_device = {
888 .name = "sh-mobile-csi2",
889 .id = 0,
890 .num_resources = ARRAY_SIZE(csi2_resources),
891 .resource = csi2_resources,
892 .dev = {
893 .platform_data = &csi2_info,
894 },
895};
896
897static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
898 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
899 .csi2_dev = &csi2_device.dev,
900};
901
902static struct resource ceu_resources[] = {
903 [0] = {
904 .name = "CEU",
905 .start = 0xfe910000,
906 .end = 0xfe91009f,
907 .flags = IORESOURCE_MEM,
908 },
909 [1] = {
910 .start = intcs_evt2irq(0x880),
911 .flags = IORESOURCE_IRQ,
912 },
913 [2] = {
914 /* place holder for contiguous memory */
915 },
916};
917
918static struct platform_device ceu_device = {
919 .name = "sh_mobile_ceu",
920 .id = 0, /* "ceu0" clock */
921 .num_resources = ARRAY_SIZE(ceu_resources),
922 .resource = ceu_resources,
923 .dev = {
924 .platform_data = &sh_mobile_ceu_info,
925 },
926};
927
2b7eda63 928static struct platform_device *ap4evb_devices[] __initdata = {
2863e935 929 &leds_device,
2b7eda63 930 &nor_flash_device,
1b7e0677 931 &smc911x_device,
3a14d039 932 &sdhi0_device,
341291a6 933 &sdhi1_device,
fb54d268 934 &usb1_host_device,
cb9215e1 935 &fsi_device,
c8d6bf9a 936 &fsi_ak4643_device,
beccb12f 937 &sh_mmcif_device,
dfbcdf64
GL		 938 &lcdc1_device,
939 &lcdc_device,
940 &hdmi_device,
1a0b1eac
GL		 941 &csi2_device,
942 &ceu_device,
943 &ap4evb_camera,
2b7eda63
MD		 944};
945
dfbcdf64
GL		 946static int __init hdmi_init_pm_clock(void)
947{
948 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
949 int ret;
950 long rate;
951
952 if (IS_ERR(hdmi_ick)) {
953 ret = PTR_ERR(hdmi_ick);
954 pr_err("Cannot get HDMI ICK: %d\n", ret);
955 goto out;
956 }
957
685e4080 958 ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
dfbcdf64 959 if (ret < 0) {
685e4080 960 pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
dfbcdf64
GL		 961 goto out;
962 }
963
685e4080 964 pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
dfbcdf64 965
685e4080 966 rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
dfbcdf64
GL		 967 if (rate < 0) {
968 pr_err("Cannot get suitable rate: %ld\n", rate);
969 ret = rate;
970 goto out;
971 }
972
685e4080 973 ret = clk_set_rate(&sh7372_pllc2_clk, rate);
dfbcdf64
GL		 974 if (ret < 0) {
975 pr_err("Cannot set rate %ld: %d\n", rate, ret);
976 goto out;
977 }
978
421b446a
KM		 979 ret = clk_enable(&sh7372_pllc2_clk);
980 if (ret < 0) {
981 pr_err("Cannot enable pllc2 clock\n");
982 goto out;
983 }
dfbcdf64
GL		 984 pr_debug("PLLC2 set frequency %lu\n", rate);
985
685e4080 986 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
dfbcdf64
GL		 987 if (ret < 0) {
988 pr_err("Cannot set HDMI parent: %d\n", ret);
989 goto out;
990 }
991
992out:
993 if (!IS_ERR(hdmi_ick))
994 clk_put(hdmi_ick);
995 return ret;
996}
997
998device_initcall(hdmi_init_pm_clock);
999
69ce8aa4
KM		 1000static int __init fsi_init_pm_clock(void)
1001{
1002 struct clk *fsia_ick;
1003 int ret;
1004
69ce8aa4
KM		 1005 fsia_ick = clk_get(&fsi_device.dev, "icka");
1006 if (IS_ERR(fsia_ick)) {
1007 ret = PTR_ERR(fsia_ick);
1008 pr_err("Cannot get FSI ICK: %d\n", ret);
1009 return ret;
1010 }
1011
1012 ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
69ce8aa4 1013 if (ret < 0)
22de4e1f 1014 pr_err("Cannot set FSI-A parent: %d\n", ret);
69ce8aa4 1015
69ce8aa4
KM		 1016 clk_put(fsia_ick);
1017
1018 return ret;
1019}
1020device_initcall(fsi_init_pm_clock);
1021
71c3ba9a
KM		 1022/*
1023 * FIXME !!
1024 *
1025 * gpio_no_direction
71c3ba9a
KM		 1026 * are quick_hack.
1027 *
1028 * current gpio frame work doesn't have
1029 * the method to control only pull up/down/free.
1030 * this function should be replaced by correct gpio function
1031 */
1032static void __init gpio_no_direction(u32 addr)
1033{
1034 __raw_writeb(0x00, addr);
1035}
1036
9fa1b7fe 1037/* TouchScreen */
52d5ac00
KM		 1038#ifdef CONFIG_AP4EVB_QHD
1039# define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
1040# define GPIO_TSC_PORT GPIO_PORT123
1041#else /* WVGA */
1042# define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
1043# define GPIO_TSC_PORT GPIO_PORT40
1044#endif
1045
33c9607a 1046#define IRQ28 evt2irq(0x3380) /* IRQ28A */
9fa1b7fe 1047#define IRQ7 evt2irq(0x02e0) /* IRQ7A */
71c3ba9a
KM		 1048static int ts_get_pendown_state(void)
1049{
52d5ac00 1050 int val;
71c3ba9a 1051
52d5ac00 1052 gpio_free(GPIO_TSC_IRQ);
71c3ba9a 1053
52d5ac00 1054 gpio_request(GPIO_TSC_PORT, NULL);
71c3ba9a 1055
52d5ac00 1056 gpio_direction_input(GPIO_TSC_PORT);
71c3ba9a 1057
52d5ac00 1058 val = gpio_get_value(GPIO_TSC_PORT);
71c3ba9a 1059
52d5ac00 1060 gpio_request(GPIO_TSC_IRQ, NULL);
71c3ba9a 1061
52d5ac00 1062 return !val;
71c3ba9a
KM		 1063}
1064
71c3ba9a
KM		 1065static int ts_init(void)
1066{
52d5ac00 1067 gpio_request(GPIO_TSC_IRQ, NULL);
71c3ba9a
KM		 1068
1069 return 0;
1070}
1071
bb04e197 1072static struct tsc2007_platform_data tsc2007_info = {
91cf5082
KM		 1073 .model = 2007,
1074 .x_plate_ohms = 180,
71c3ba9a
KM		 1075 .get_pendown_state = ts_get_pendown_state,
1076 .init_platform_hw = ts_init,
91cf5082
KM		 1077};
1078
9fa1b7fe
KM		 1079static struct i2c_board_info tsc_device = {
1080 I2C_BOARD_INFO("tsc2007", 0x48),
1081 .type = "tsc2007",
1082 .platform_data = &tsc2007_info,
1083 /*.irq is selected on ap4evb_init */
1084};
1085
91cf5082 1086/* I2C */
cb9215e1
KM		 1087static struct i2c_board_info i2c0_devices[] = {
1088 {
1089 I2C_BOARD_INFO("ak4643", 0x13),
1090 },
1091};
1092
91cf5082 1093static struct i2c_board_info i2c1_devices[] = {
8fc883c2
KM		 1094 {
1095 I2C_BOARD_INFO("r2025sd", 0x32),
1096 },
91cf5082
KM		 1097};
1098
2b7eda63
MD		 1099static struct map_desc ap4evb_io_desc[] __initdata = {
1100 /* create a 1:1 entity map for 0xe6xxxxxx
1101 * used by CPGA, INTC and PFC.
1102 */
1103 {
1104 .virtual = 0xe6000000,
1105 .pfn = __phys_to_pfn(0xe6000000),
1106 .length = 256 << 20,
1107 .type = MT_DEVICE_NONSHARED
1108 },
1109};
1110
1111static void __init ap4evb_map_io(void)
1112{
1113 iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
1114
495b3cea 1115 /* setup early devices and console here as well */
2b7eda63 1116 sh7372_add_early_devices();
4ae04acb 1117 shmobile_setup_console();
2b7eda63
MD		 1118}
1119
cb9215e1
KM		 1120#define GPIO_PORT9CR 0xE6051009
1121#define GPIO_PORT10CR 0xE605100A
2669efec 1122#define USCCR1 0xE6058144
2b7eda63
MD		 1123static void __init ap4evb_init(void)
1124{
dfbcdf64 1125 u32 srcr4;
cb9215e1
KM		 1126 struct clk *clk;
1127
1b7e0677
KM		 1128 sh7372_pinmux_init();
1129
b228b48e
KM		 1130 /* enable SCIFA0 */
1131 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1132 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1133
1b7e0677
KM		 1134 /* enable SMSC911X */
1135 gpio_request(GPIO_FN_CS5A, NULL);
1136 gpio_request(GPIO_FN_IRQ6_39, NULL);
1137
8cb3a2eb
KM		 1138 /* enable Debug switch (S6) */
1139 gpio_request(GPIO_PORT32, NULL);
1140 gpio_request(GPIO_PORT33, NULL);
1141 gpio_request(GPIO_PORT34, NULL);
1142 gpio_request(GPIO_PORT35, NULL);
1143 gpio_direction_input(GPIO_PORT32);
1144 gpio_direction_input(GPIO_PORT33);
1145 gpio_direction_input(GPIO_PORT34);
1146 gpio_direction_input(GPIO_PORT35);
1147 gpio_export(GPIO_PORT32, 0);
1148 gpio_export(GPIO_PORT33, 0);
1149 gpio_export(GPIO_PORT34, 0);
1150 gpio_export(GPIO_PORT35, 0);
1151
3a14d039
MD		 1152 /* SDHI0 */
1153 gpio_request(GPIO_FN_SDHICD0, NULL);
1154 gpio_request(GPIO_FN_SDHIWP0, NULL);
1155 gpio_request(GPIO_FN_SDHICMD0, NULL);
1156 gpio_request(GPIO_FN_SDHICLK0, NULL);
1157 gpio_request(GPIO_FN_SDHID0_3, NULL);
1158 gpio_request(GPIO_FN_SDHID0_2, NULL);
1159 gpio_request(GPIO_FN_SDHID0_1, NULL);
1160 gpio_request(GPIO_FN_SDHID0_0, NULL);
1161
9fa1b7fe
KM		 1162 /* SDHI1 */
1163 gpio_request(GPIO_FN_SDHICMD1, NULL);
1164 gpio_request(GPIO_FN_SDHICLK1, NULL);
1165 gpio_request(GPIO_FN_SDHID1_3, NULL);
1166 gpio_request(GPIO_FN_SDHID1_2, NULL);
1167 gpio_request(GPIO_FN_SDHID1_1, NULL);
1168 gpio_request(GPIO_FN_SDHID1_0, NULL);
91cf5082 1169
c8ee3d4b
KM		 1170 /* MMCIF */
1171 gpio_request(GPIO_FN_MMCD0_0, NULL);
1172 gpio_request(GPIO_FN_MMCD0_1, NULL);
1173 gpio_request(GPIO_FN_MMCD0_2, NULL);
1174 gpio_request(GPIO_FN_MMCD0_3, NULL);
1175 gpio_request(GPIO_FN_MMCD0_4, NULL);
1176 gpio_request(GPIO_FN_MMCD0_5, NULL);
1177 gpio_request(GPIO_FN_MMCD0_6, NULL);
1178 gpio_request(GPIO_FN_MMCD0_7, NULL);
1179 gpio_request(GPIO_FN_MMCCMD0, NULL);
1180 gpio_request(GPIO_FN_MMCCLK0, NULL);
1181
fb54d268
KM		 1182 /* USB enable */
1183 gpio_request(GPIO_FN_VBUS0_1, NULL);
1184 gpio_request(GPIO_FN_IDIN_1_18, NULL);
1185 gpio_request(GPIO_FN_PWEN_1_115, NULL);
1186 gpio_request(GPIO_FN_OVCN_1_114, NULL);
1187 gpio_request(GPIO_FN_EXTLP_1, NULL);
1188 gpio_request(GPIO_FN_OVCN2_1, NULL);
1189
1190 /* setup USB phy */
d0fb0c4b 1191 __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
fb54d268 1192
2669efec 1193 /* enable FSI2 port A (ak4643) */
cb9215e1
KM		 1194 gpio_request(GPIO_FN_FSIAIBT, NULL);
1195 gpio_request(GPIO_FN_FSIAILR, NULL);
1196 gpio_request(GPIO_FN_FSIAISLD, NULL);
1197 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1198 gpio_request(GPIO_PORT161, NULL);
1199 gpio_direction_output(GPIO_PORT161, 0); /* slave */
1200
1201 gpio_request(GPIO_PORT9, NULL);
1202 gpio_request(GPIO_PORT10, NULL);
1203 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1204 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1205
68accd73
AH		 1206 /* card detect pin for MMC slot (CN7) */
1207 gpio_request(GPIO_PORT41, NULL);
1208 gpio_direction_input(GPIO_PORT41);
1209
2669efec
KM		 1210 /* setup FSI2 port B (HDMI) */
1211 gpio_request(GPIO_FN_FSIBCK, NULL);
1212 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1213
cb9215e1
KM		 1214 /* set SPU2 clock to 119.6 MHz */
1215 clk = clk_get(NULL, "spu_clk");
2ae2b766 1216 if (!IS_ERR(clk)) {
cb9215e1
KM		 1217 clk_set_rate(clk, clk_round_rate(clk, 119600000));
1218 clk_put(clk);
1219 }
1220
cb9215e1
KM		 1221 /*
1222 * set irq priority, to avoid sound chopping
1223 * when NFS rootfs is used
1224 * FSI(3) > SMSC911X(2)
1225 */
1226 intc_set_priority(IRQ_FSI, 3);
1227
1228 i2c_register_board_info(0, i2c0_devices,
1229 ARRAY_SIZE(i2c0_devices));
1230
1231 i2c_register_board_info(1, i2c1_devices,
1232 ARRAY_SIZE(i2c1_devices));
1233
9fa1b7fe 1234#ifdef CONFIG_AP4EVB_QHD
dd8a61a7 1235
9fa1b7fe 1236 /*
dd8a61a7
MD		 1237 * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
1238 * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
9fa1b7fe
KM		 1239 */
1240
1241 /* enable KEYSC */
1242 gpio_request(GPIO_FN_KEYOUT0, NULL);
1243 gpio_request(GPIO_FN_KEYOUT1, NULL);
1244 gpio_request(GPIO_FN_KEYOUT2, NULL);
1245 gpio_request(GPIO_FN_KEYOUT3, NULL);
1246 gpio_request(GPIO_FN_KEYOUT4, NULL);
1247 gpio_request(GPIO_FN_KEYIN0_136, NULL);
1248 gpio_request(GPIO_FN_KEYIN1_135, NULL);
1249 gpio_request(GPIO_FN_KEYIN2_134, NULL);
1250 gpio_request(GPIO_FN_KEYIN3_133, NULL);
1251 gpio_request(GPIO_FN_KEYIN4, NULL);
1252
1253 /* enable TouchScreen */
9fa1b7fe
KM		 1254 set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
1255
1256 tsc_device.irq = IRQ28;
1257 i2c_register_board_info(1, &tsc_device, 1);
1258
1259 /* LCDC0 */
1260 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
1261 lcdc_info.ch[0].interface_type = RGB24;
1262 lcdc_info.ch[0].clock_divider = 1;
1263 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
9fa1b7fe
KM		 1264 lcdc_info.ch[0].lcd_size_cfg.width = 44;
1265 lcdc_info.ch[0].lcd_size_cfg.height = 79;
1266
1267 platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
1268
1269#else
1270 /*
dd8a61a7
MD		 1271 * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
1272 * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
9fa1b7fe 1273 */
dd8a61a7 1274
9fa1b7fe
KM		 1275 gpio_request(GPIO_FN_LCDD17, NULL);
1276 gpio_request(GPIO_FN_LCDD16, NULL);
1277 gpio_request(GPIO_FN_LCDD15, NULL);
1278 gpio_request(GPIO_FN_LCDD14, NULL);
1279 gpio_request(GPIO_FN_LCDD13, NULL);
1280 gpio_request(GPIO_FN_LCDD12, NULL);
1281 gpio_request(GPIO_FN_LCDD11, NULL);
1282 gpio_request(GPIO_FN_LCDD10, NULL);
1283 gpio_request(GPIO_FN_LCDD9, NULL);
1284 gpio_request(GPIO_FN_LCDD8, NULL);
1285 gpio_request(GPIO_FN_LCDD7, NULL);
1286 gpio_request(GPIO_FN_LCDD6, NULL);
1287 gpio_request(GPIO_FN_LCDD5, NULL);
1288 gpio_request(GPIO_FN_LCDD4, NULL);
1289 gpio_request(GPIO_FN_LCDD3, NULL);
1290 gpio_request(GPIO_FN_LCDD2, NULL);
1291 gpio_request(GPIO_FN_LCDD1, NULL);
1292 gpio_request(GPIO_FN_LCDD0, NULL);
1293 gpio_request(GPIO_FN_LCDDISP, NULL);
1294 gpio_request(GPIO_FN_LCDDCK, NULL);
1295
1296 gpio_request(GPIO_PORT189, NULL); /* backlight */
1297 gpio_direction_output(GPIO_PORT189, 1);
1298
1299 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1300 gpio_direction_output(GPIO_PORT151, 1);
1301
1302 lcdc_info.clock_source = LCDC_CLK_BUS;
1303 lcdc_info.ch[0].interface_type = RGB18;
1304 lcdc_info.ch[0].clock_divider = 2;
1305 lcdc_info.ch[0].flags = 0;
9fa1b7fe
KM		 1306 lcdc_info.ch[0].lcd_size_cfg.width = 152;
1307 lcdc_info.ch[0].lcd_size_cfg.height = 91;
1308
1309 /* enable TouchScreen */
9fa1b7fe
KM		 1310 set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
1311
1312 tsc_device.irq = IRQ7;
1313 i2c_register_board_info(0, &tsc_device, 1);
1314#endif /* CONFIG_AP4EVB_QHD */
341291a6 1315
1a0b1eac
GL		 1316 /* CEU */
1317
1318 /*
1319 * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
1320 * becomes available
1321 */
1322
1323 /* MIPI-CSI stuff */
1324 gpio_request(GPIO_FN_VIO_CKO, NULL);
1325
1326 clk = clk_get(NULL, "vck1_clk");
1327 if (!IS_ERR(clk)) {
1328 clk_set_rate(clk, clk_round_rate(clk, 13000000));
1329 clk_enable(clk);
1330 clk_put(clk);
1331 }
1332
2b7eda63
MD		 1333 sh7372_add_standard_devices();
1334
dfbcdf64
GL		 1335 /* HDMI */
1336 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1337 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1338
1339 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1340#define SRCR4 0xe61580bc
1341 srcr4 = __raw_readl(SRCR4);
1342 __raw_writel(srcr4 | (1 << 13), SRCR4);
1343 udelay(50);
1344 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1345
2b7eda63
MD		 1346 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1347}
1348
495b3cea
MD		 1349static void __init ap4evb_timer_init(void)
1350{
1351 sh7372_clock_init();
1352 shmobile_timer.init();
dfbcdf64
GL		 1353
1354 /* External clock source */
685e4080 1355 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
495b3cea
MD		 1356}
1357
1358static struct sys_timer ap4evb_timer = {
1359 .init = ap4evb_timer_init,
1360};
1361
2b7eda63 1362MACHINE_START(AP4EVB, "ap4evb")
2b7eda63
MD		 1363 .map_io = ap4evb_map_io,
1364 .init_irq = sh7372_init_irq,
863b1719 1365 .handle_irq = shmobile_handle_irq_intc,
2b7eda63 1366 .init_machine = ap4evb_init,
495b3cea 1367 .timer = &ap4evb_timer,
2b7eda63 1368MACHINE_END
Linux kernel - Deliverables
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