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ARM: shmobile: armadillo800eva: enable DMAEngine on FSI
[deliverable/linux.git] / arch / arm / mach-shmobile / board-armadillo800eva.c
CommitLineData
4d22e564
KM		 1/*
2 * armadillo 800 eva board support
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 */
21
22#include <linux/clk.h>
1c96293e 23#include <linux/delay.h>
4d22e564
KM		 24#include <linux/err.h>
25#include <linux/kernel.h>
f7e7d31a 26#include <linux/input.h>
1c96293e 27#include <linux/irq.h>
4d22e564
KM		 28#include <linux/platform_device.h>
29#include <linux/gpio.h>
f7e7d31a 30#include <linux/gpio_keys.h>
d8fed1e2 31#include <linux/sh_eth.h>
dad29d1c 32#include <linux/videodev2.h>
1c96293e 33#include <linux/usb/renesas_usbhs.h>
49c01112
KM		 34#include <linux/mfd/tmio.h>
35#include <linux/mmc/host.h>
0a4266bb 36#include <linux/mmc/sh_mmcif.h>
49c01112 37#include <linux/mmc/sh_mobile_sdhi.h>
4d22e564
KM		 38#include <mach/common.h>
39#include <mach/irqs.h>
3760e794
KM		 40#include <mach/r8a7740.h>
41#include <media/mt9t112.h>
42#include <media/sh_mobile_ceu.h>
43#include <media/soc_camera.h>
4d22e564
KM		 44#include <asm/page.h>
45#include <asm/mach-types.h>
46#include <asm/mach/arch.h>
47#include <asm/mach/map.h>
48#include <asm/mach/time.h>
49#include <asm/hardware/cache-l2x0.h>
dad29d1c 50#include <video/sh_mobile_lcdc.h>
910c14d0 51#include <video/sh_mobile_hdmi.h>
5389bf71
KM		 52#include <sound/sh_fsi.h>
53#include <sound/simple_card.h>
4d22e564
KM		 54
55/*
56 * CON1 Camera Module
57 * CON2 Extension Bus
58 * CON3 HDMI Output
59 * CON4 Composite Video Output
60 * CON5 H-UDI JTAG
61 * CON6 ARM JTAG
62 * CON7 SD1
63 * CON8 SD2
64 * CON9 RTC BackUp
65 * CON10 Monaural Mic Input
66 * CON11 Stereo Headphone Output
67 * CON12 Audio Line Output(L)
68 * CON13 Audio Line Output(R)
69 * CON14 AWL13 Module
70 * CON15 Extension
71 * CON16 LCD1
72 * CON17 LCD2
73 * CON19 Power Input
74 * CON20 USB1
75 * CON21 USB2
76 * CON22 Serial
77 * CON23 LAN
78 * CON24 USB3
79 * LED1 Camera LED(Yellow)
80 * LED2 Power LED (Green)
81 * ED3-LED6 User LED(Yellow)
82 * LED7 LAN link LED(Green)
83 * LED8 LAN activity LED(Yellow)
84 */
85
86/*
87 * DipSwitch
88 *
89 * SW1
90 *
91 * -12345678-+---------------+----------------------------
92 * 1 | boot | hermit
93 * 0 | boot | OS auto boot
94 * -12345678-+---------------+----------------------------
95 * 00 | boot device | eMMC
96 * 10 | boot device | SDHI0 (CON7)
97 * 01 | boot device | -
98 * 11 | boot device | Extension Buss (CS0)
99 * -12345678-+---------------+----------------------------
100 * 0 | Extension Bus | D8-D15 disable, eMMC enable
101 * 1 | Extension Bus | D8-D15 enable, eMMC disable
102 * -12345678-+---------------+----------------------------
2e3a5ef2 103 * 0 | SDHI1 | COM8 disable, COM14 enable
4d22e564
KM		 104 * 1 | SDHI1 | COM8 enable, COM14 disable
105 * -12345678-+---------------+----------------------------
1c96293e
KM		 106 * 0 | USB0 | COM20 enable, COM24 disable
107 * 1 | USB0 | COM20 disable, COM24 enable
108 * -12345678-+---------------+----------------------------
4d22e564
KM		 109 * 00 | JTAG | SH-X2
110 * 10 | JTAG | ARM
111 * 01 | JTAG | -
112 * 11 | JTAG | Boundary Scan
113 *-----------+---------------+----------------------------
114 */
115
5389bf71
KM		 116/*
117 * FSI-WM8978
118 *
119 * this command is required when playback.
120 *
121 * # amixer set "Headphone" 50
122 */
123
124/*
125 * FIXME !!
126 *
127 * gpio_no_direction
128 *
129 * current gpio frame work doesn't have
130 * the method to control only pull up/down/free.
131 * this function should be replaced by correct gpio function
132 */
133static void __init gpio_no_direction(u32 addr)
134{
135 __raw_writeb(0x00, addr);
136}
137
1c96293e
KM		 138/*
139 * USB function
140 *
141 * When you use USB Function,
142 * set SW1.6 ON, and connect cable to CN24.
143 *
144 * USBF needs workaround on R8A7740 chip.
145 * These are a little bit complex.
146 * see
147 * usbhsf_power_ctrl()
148 *
149 * CAUTION
150 *
151 * It uses autonomy mode for USB hotplug at this point
152 * (= usbhs_private.platform_callback.get_vbus is NULL),
153 * since we don't know what's happen on PM control
154 * on this workaround.
155 */
156#define USBCR1 0xe605810a
157#define USBH 0xC6700000
158#define USBH_USBCTR 0x10834
159
160struct usbhsf_private {
161 struct clk *phy;
162 struct clk *usb24;
163 struct clk *pci;
164 struct clk *func;
165 struct clk *host;
166 void __iomem *usbh_base;
167 struct renesas_usbhs_platform_info info;
168};
169
170#define usbhsf_get_priv(pdev) \
171 container_of(renesas_usbhs_get_info(pdev), \
172 struct usbhsf_private, info)
173
174static int usbhsf_get_id(struct platform_device *pdev)
175{
176 return USBHS_GADGET;
177}
178
179static void usbhsf_power_ctrl(struct platform_device *pdev,
180 void __iomem *base, int enable)
181{
182 struct usbhsf_private *priv = usbhsf_get_priv(pdev);
183
184 /*
185 * Work around for USB Function.
186 * It needs USB host clock, and settings
187 */
188 if (enable) {
189 /*
190 * enable all the related usb clocks
191 * for usb workaround
192 */
193 clk_enable(priv->usb24);
194 clk_enable(priv->pci);
195 clk_enable(priv->host);
196 clk_enable(priv->func);
197 clk_enable(priv->phy);
198
199 /*
200 * set USBCR1
201 *
202 * Port1 is driven by USB function,
203 * Port2 is driven by USB HOST
204 * One HOST (Port1 or Port2 is HOST)
205 * USB PLL input clock = 24MHz
206 */
207 __raw_writew(0xd750, USBCR1);
208 mdelay(1);
209
210 /*
211 * start USB Host
212 */
213 __raw_writel(0x0000000c, priv->usbh_base + USBH_USBCTR);
214 __raw_writel(0x00000008, priv->usbh_base + USBH_USBCTR);
215 mdelay(10);
216
217 /*
218 * USB PHY Power ON
219 */
220 __raw_writew(0xd770, USBCR1);
221 __raw_writew(0x4000, base + 0x102); /* USBF :: SUSPMODE */
222
223 } else {
224 __raw_writel(0x0000010f, priv->usbh_base + USBH_USBCTR);
225 __raw_writew(0xd7c0, USBCR1); /* GPIO */
226
227 clk_disable(priv->phy);
228 clk_disable(priv->func); /* usb work around */
229 clk_disable(priv->host); /* usb work around */
230 clk_disable(priv->pci); /* usb work around */
231 clk_disable(priv->usb24); /* usb work around */
232 }
233}
234
235static void usbhsf_hardware_exit(struct platform_device *pdev)
236{
237 struct usbhsf_private *priv = usbhsf_get_priv(pdev);
238
239 if (!IS_ERR(priv->phy))
240 clk_put(priv->phy);
241 if (!IS_ERR(priv->usb24))
242 clk_put(priv->usb24);
243 if (!IS_ERR(priv->pci))
244 clk_put(priv->pci);
245 if (!IS_ERR(priv->host))
246 clk_put(priv->host);
247 if (!IS_ERR(priv->func))
248 clk_put(priv->func);
249 if (priv->usbh_base)
250 iounmap(priv->usbh_base);
251
252 priv->phy = NULL;
253 priv->usb24 = NULL;
254 priv->pci = NULL;
255 priv->host = NULL;
256 priv->func = NULL;
257 priv->usbh_base = NULL;
258}
259
260static int usbhsf_hardware_init(struct platform_device *pdev)
261{
262 struct usbhsf_private *priv = usbhsf_get_priv(pdev);
263
264 priv->phy = clk_get(&pdev->dev, "phy");
265 priv->usb24 = clk_get(&pdev->dev, "usb24");
266 priv->pci = clk_get(&pdev->dev, "pci");
267 priv->func = clk_get(&pdev->dev, "func");
268 priv->host = clk_get(&pdev->dev, "host");
269 priv->usbh_base = ioremap_nocache(USBH, 0x20000);
270
271 if (IS_ERR(priv->phy) ||
272 IS_ERR(priv->usb24) ||
273 IS_ERR(priv->pci) ||
274 IS_ERR(priv->host) ||
275 IS_ERR(priv->func) ||
276 !priv->usbh_base) {
277 dev_err(&pdev->dev, "USB clock setting failed\n");
278 usbhsf_hardware_exit(pdev);
279 return -EIO;
280 }
281
282 /* usb24 use 1/1 of parent clock (= usb24s = 24MHz) */
283 clk_set_rate(priv->usb24,
284 clk_get_rate(clk_get_parent(priv->usb24)));
285
286 return 0;
287}
288
289static struct usbhsf_private usbhsf_private = {
290 .info = {
291 .platform_callback = {
292 .get_id = usbhsf_get_id,
293 .hardware_init = usbhsf_hardware_init,
294 .hardware_exit = usbhsf_hardware_exit,
295 .power_ctrl = usbhsf_power_ctrl,
296 },
297 .driver_param = {
298 .buswait_bwait = 5,
299 .detection_delay = 5,
300 },
301 }
302};
303
304static struct resource usbhsf_resources[] = {
305 {
306 .name = "USBHS",
307 .start = 0xe6890000,
308 .end = 0xe6890104 - 1,
309 .flags = IORESOURCE_MEM,
310 },
311 {
312 .start = evt2irq(0x0A20),
313 .flags = IORESOURCE_IRQ,
314 },
315};
316
317static struct platform_device usbhsf_device = {
318 .name = "renesas_usbhs",
319 .dev = {
320 .platform_data = &usbhsf_private.info,
321 },
322 .id = -1,
323 .num_resources = ARRAY_SIZE(usbhsf_resources),
324 .resource = usbhsf_resources,
325};
326
d8fed1e2
KM		 327/* Ether */
328static struct sh_eth_plat_data sh_eth_platdata = {
329 .phy = 0x00, /* LAN8710A */
330 .edmac_endian = EDMAC_LITTLE_ENDIAN,
331 .register_type = SH_ETH_REG_GIGABIT,
332 .phy_interface = PHY_INTERFACE_MODE_MII,
333};
334
335static struct resource sh_eth_resources[] = {
336 {
337 .start = 0xe9a00000,
338 .end = 0xe9a00800 - 1,
339 .flags = IORESOURCE_MEM,
340 }, {
341 .start = 0xe9a01800,
342 .end = 0xe9a02000 - 1,
343 .flags = IORESOURCE_MEM,
344 }, {
345 .start = evt2irq(0x0500),
346 .flags = IORESOURCE_IRQ,
347 },
348};
349
350static struct platform_device sh_eth_device = {
351 .name = "sh-eth",
9c18f238 352 .id = -1,
d8fed1e2
KM		 353 .dev = {
354 .platform_data = &sh_eth_platdata,
355 },
356 .resource = sh_eth_resources,
357 .num_resources = ARRAY_SIZE(sh_eth_resources),
358};
359
dad29d1c
KM		 360/* LCDC */
361static struct fb_videomode lcdc0_mode = {
362 .name = "AMPIER/AM-800480",
363 .xres = 800,
364 .yres = 480,
365 .left_margin = 88,
366 .right_margin = 40,
367 .hsync_len = 128,
368 .upper_margin = 20,
369 .lower_margin = 5,
370 .vsync_len = 5,
371 .sync = 0,
372};
373
374static struct sh_mobile_lcdc_info lcdc0_info = {
375 .clock_source = LCDC_CLK_BUS,
376 .ch[0] = {
377 .chan = LCDC_CHAN_MAINLCD,
378 .fourcc = V4L2_PIX_FMT_RGB565,
379 .interface_type = RGB24,
380 .clock_divider = 5,
381 .flags = 0,
382 .lcd_modes = &lcdc0_mode,
383 .num_modes = 1,
384 .panel_cfg = {
385 .width = 111,
386 .height = 68,
387 },
388 },
389};
390
391static struct resource lcdc0_resources[] = {
392 [0] = {
393 .name = "LCD0",
394 .start = 0xfe940000,
395 .end = 0xfe943fff,
396 .flags = IORESOURCE_MEM,
397 },
398 [1] = {
399 .start = intcs_evt2irq(0x580),
400 .flags = IORESOURCE_IRQ,
401 },
402};
403
404static struct platform_device lcdc0_device = {
405 .name = "sh_mobile_lcdc_fb",
406 .num_resources = ARRAY_SIZE(lcdc0_resources),
407 .resource = lcdc0_resources,
408 .id = 0,
409 .dev = {
410 .platform_data = &lcdc0_info,
411 .coherent_dma_mask = ~0,
412 },
413};
414
910c14d0
KM		 415/*
416 * LCDC1/HDMI
417 */
418static struct sh_mobile_hdmi_info hdmi_info = {
419 .flags = HDMI_OUTPUT_PUSH_PULL |
420 HDMI_OUTPUT_POLARITY_HI |
421 HDMI_32BIT_REG |
422 HDMI_HAS_HTOP1 |
423 HDMI_SND_SRC_SPDIF,
424};
425
426static struct resource hdmi_resources[] = {
427 [0] = {
428 .name = "HDMI",
429 .start = 0xe6be0000,
430 .end = 0xe6be03ff,
431 .flags = IORESOURCE_MEM,
432 },
433 [1] = {
434 .start = evt2irq(0x1700),
435 .flags = IORESOURCE_IRQ,
436 },
437 [2] = {
438 .name = "HDMI emma3pf",
439 .start = 0xe6be4000,
440 .end = 0xe6be43ff,
441 .flags = IORESOURCE_MEM,
442 },
443};
444
445static struct platform_device hdmi_device = {
446 .name = "sh-mobile-hdmi",
447 .num_resources = ARRAY_SIZE(hdmi_resources),
448 .resource = hdmi_resources,
449 .id = -1,
450 .dev = {
451 .platform_data = &hdmi_info,
452 },
453};
454
455static const struct fb_videomode lcdc1_mode = {
456 .name = "HDMI 720p",
457 .xres = 1280,
458 .yres = 720,
459 .pixclock = 13468,
460 .left_margin = 220,
461 .right_margin = 110,
462 .hsync_len = 40,
463 .upper_margin = 20,
464 .lower_margin = 5,
465 .vsync_len = 5,
466 .refresh = 60,
467 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
468};
469
470static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
471 .clock_source = LCDC_CLK_PERIPHERAL, /* HDMI clock */
472 .ch[0] = {
473 .chan = LCDC_CHAN_MAINLCD,
474 .fourcc = V4L2_PIX_FMT_RGB565,
475 .interface_type = RGB24,
476 .clock_divider = 1,
477 .flags = LCDC_FLAGS_DWPOL,
478 .lcd_modes = &lcdc1_mode,
479 .num_modes = 1,
480 .tx_dev = &hdmi_device,
481 .panel_cfg = {
482 .width = 1280,
483 .height = 720,
484 },
485 },
486};
487
488static struct resource hdmi_lcdc_resources[] = {
489 [0] = {
490 .name = "LCDC1",
491 .start = 0xfe944000,
492 .end = 0xfe948000 - 1,
493 .flags = IORESOURCE_MEM,
494 },
495 [1] = {
496 .start = intcs_evt2irq(0x1780),
497 .flags = IORESOURCE_IRQ,
498 },
499};
500
501static struct platform_device hdmi_lcdc_device = {
502 .name = "sh_mobile_lcdc_fb",
503 .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
504 .resource = hdmi_lcdc_resources,
505 .id = 1,
506 .dev = {
507 .platform_data = &hdmi_lcdc_info,
508 .coherent_dma_mask = ~0,
509 },
510};
511
f7e7d31a
KM		 512/* GPIO KEY */
513#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
514
515static struct gpio_keys_button gpio_buttons[] = {
516 GPIO_KEY(KEY_POWER, GPIO_PORT99, "SW1"),
517 GPIO_KEY(KEY_BACK, GPIO_PORT100, "SW2"),
518 GPIO_KEY(KEY_MENU, GPIO_PORT97, "SW3"),
519 GPIO_KEY(KEY_HOME, GPIO_PORT98, "SW4"),
520};
521
522static struct gpio_keys_platform_data gpio_key_info = {
523 .buttons = gpio_buttons,
524 .nbuttons = ARRAY_SIZE(gpio_buttons),
525};
526
527static struct platform_device gpio_keys_device = {
528 .name = "gpio-keys",
529 .id = -1,
530 .dev = {
531 .platform_data = &gpio_key_info,
532 },
533};
534
49c01112
KM		 535/* SDHI0 */
536/*
537 * FIXME
538 *
539 * It use polling mode here, since
540 * CD (= Card Detect) pin is not connected to SDHI0_CD.
541 * We can use IRQ31 as card detect irq,
542 * but it needs chattering removal operation
543 */
544#define IRQ31 evt2irq(0x33E0)
545static struct sh_mobile_sdhi_info sdhi0_info = {
546 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |\
547 MMC_CAP_NEEDS_POLL,
548 .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
549 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
550};
551
552static struct resource sdhi0_resources[] = {
553 {
554 .name = "SDHI0",
555 .start = 0xe6850000,
556 .end = 0xe6850100 - 1,
557 .flags = IORESOURCE_MEM,
558 },
559 /*
560 * no SH_MOBILE_SDHI_IRQ_CARD_DETECT here
561 */
562 {
563 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
564 .start = evt2irq(0x0E20),
565 .flags = IORESOURCE_IRQ,
566 },
567 {
568 .name = SH_MOBILE_SDHI_IRQ_SDIO,
569 .start = evt2irq(0x0E40),
570 .flags = IORESOURCE_IRQ,
571 },
572};
573
574static struct platform_device sdhi0_device = {
575 .name = "sh_mobile_sdhi",
576 .id = 0,
577 .dev = {
578 .platform_data = &sdhi0_info,
579 },
580 .num_resources = ARRAY_SIZE(sdhi0_resources),
581 .resource = sdhi0_resources,
582};
583
2e3a5ef2
KM		 584/* SDHI1 */
585static struct sh_mobile_sdhi_info sdhi1_info = {
586 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
587 .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
588 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
589};
590
591static struct resource sdhi1_resources[] = {
592 [0] = {
593 .name = "SDHI1",
594 .start = 0xe6860000,
595 .end = 0xe6860100 - 1,
596 .flags = IORESOURCE_MEM,
597 },
598 [1] = {
599 .start = evt2irq(0x0E80),
600 .flags = IORESOURCE_IRQ,
601 },
602 [2] = {
603 .start = evt2irq(0x0EA0),
604 .flags = IORESOURCE_IRQ,
605 },
606 [3] = {
607 .start = evt2irq(0x0EC0),
608 .flags = IORESOURCE_IRQ,
609 },
610};
611
612static struct platform_device sdhi1_device = {
613 .name = "sh_mobile_sdhi",
614 .id = 1,
615 .dev = {
616 .platform_data = &sdhi1_info,
617 },
618 .num_resources = ARRAY_SIZE(sdhi1_resources),
619 .resource = sdhi1_resources,
620};
621
0a4266bb
KM		 622/* MMCIF */
623static struct sh_mmcif_plat_data sh_mmcif_plat = {
624 .sup_pclk = 0,
625 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
626 .caps = MMC_CAP_4_BIT_DATA |
627 MMC_CAP_8_BIT_DATA |
628 MMC_CAP_NONREMOVABLE,
629};
630
631static struct resource sh_mmcif_resources[] = {
632 [0] = {
633 .name = "MMCIF",
634 .start = 0xe6bd0000,
635 .end = 0xe6bd0100 - 1,
636 .flags = IORESOURCE_MEM,
637 },
638 [1] = {
639 /* MMC ERR */
640 .start = evt2irq(0x1AC0),
641 .flags = IORESOURCE_IRQ,
642 },
643 [2] = {
644 /* MMC NOR */
645 .start = evt2irq(0x1AE0),
646 .flags = IORESOURCE_IRQ,
647 },
648};
649
650static struct platform_device sh_mmcif_device = {
651 .name = "sh_mmcif",
652 .id = -1,
653 .dev = {
654 .platform_data = &sh_mmcif_plat,
655 },
656 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
657 .resource = sh_mmcif_resources,
658};
659
3760e794
KM		 660/* Camera */
661static int mt9t111_power(struct device *dev, int mode)
662{
663 struct clk *mclk = clk_get(NULL, "video1");
664
665 if (IS_ERR(mclk)) {
666 dev_err(dev, "can't get video1 clock\n");
667 return -EINVAL;
668 }
669
670 if (mode) {
671 /* video1 (= CON1 camera) expect 24MHz */
672 clk_set_rate(mclk, clk_round_rate(mclk, 24000000));
673 clk_enable(mclk);
674 gpio_direction_output(GPIO_PORT158, 1);
675 } else {
676 gpio_direction_output(GPIO_PORT158, 0);
677 clk_disable(mclk);
678 }
679
680 clk_put(mclk);
681
682 return 0;
683}
684
685static struct i2c_board_info i2c_camera_mt9t111 = {
686 I2C_BOARD_INFO("mt9t112", 0x3d),
687};
688
689static struct mt9t112_camera_info mt9t111_info = {
690 .divider = { 16, 0, 0, 7, 0, 10, 14, 7, 7 },
691};
692
693static struct soc_camera_link mt9t111_link = {
694 .i2c_adapter_id = 0,
695 .bus_id = 0,
696 .board_info = &i2c_camera_mt9t111,
697 .power = mt9t111_power,
698 .priv = &mt9t111_info,
699};
700
701static struct platform_device camera_device = {
702 .name = "soc-camera-pdrv",
703 .id = 0,
704 .dev = {
705 .platform_data = &mt9t111_link,
706 },
707};
708
709/* CEU0 */
710static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
711 .flags = SH_CEU_FLAG_LOWER_8BIT,
712};
713
714static struct resource ceu0_resources[] = {
715 [0] = {
716 .name = "CEU",
717 .start = 0xfe910000,
718 .end = 0xfe91009f,
719 .flags = IORESOURCE_MEM,
720 },
721 [1] = {
722 .start = intcs_evt2irq(0x0500),
723 .flags = IORESOURCE_IRQ,
724 },
725 [2] = {
726 /* place holder for contiguous memory */
727 },
728};
729
730static struct platform_device ceu0_device = {
731 .name = "sh_mobile_ceu",
732 .id = 0,
733 .num_resources = ARRAY_SIZE(ceu0_resources),
734 .resource = ceu0_resources,
735 .dev = {
736 .platform_data = &sh_mobile_ceu0_info,
737 .coherent_dma_mask = 0xffffffff,
738 },
739};
740
5389bf71 741/* FSI */
0676c05e
KM		 742static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
743{
744 struct clk *fsib;
745 int ret;
746
747 /* it support 48KHz only */
748 if (48000 != rate)
749 return -EINVAL;
750
751 fsib = clk_get(dev, "ickb");
752 if (IS_ERR(fsib))
753 return -EINVAL;
754
755 if (enable) {
756 ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
757 clk_enable(fsib);
758 } else {
759 ret = 0;
760 clk_disable(fsib);
761 }
762
763 clk_put(fsib);
764
765 return ret;
766}
767
5389bf71
KM		 768static struct sh_fsi_platform_info fsi_info = {
769 /* FSI-WM8978 */
770 .port_a = {
dc7dd584 771 .tx_id = SHDMA_SLAVE_FSIA_TX,
5389bf71 772 },
0676c05e
KM		 773 /* FSI-HDMI */
774 .port_b = {
775 .flags = SH_FSI_FMT_SPDIF |
776 SH_FSI_ENABLE_STREAM_MODE,
777 .set_rate = fsi_hdmi_set_rate,
dc7dd584 778 .tx_id = SHDMA_SLAVE_FSIB_TX,
0676c05e 779 }
5389bf71
KM		 780};
781
782static struct resource fsi_resources[] = {
783 [0] = {
784 .name = "FSI",
785 .start = 0xfe1f0000,
786 .end = 0xfe1f8400 - 1,
787 .flags = IORESOURCE_MEM,
788 },
789 [1] = {
790 .start = evt2irq(0x1840),
791 .flags = IORESOURCE_IRQ,
792 },
793};
794
795static struct platform_device fsi_device = {
796 .name = "sh_fsi2",
797 .id = -1,
798 .num_resources = ARRAY_SIZE(fsi_resources),
799 .resource = fsi_resources,
800 .dev = {
801 .platform_data = &fsi_info,
802 },
803};
804
805/* FSI-WM8978 */
806static struct asoc_simple_dai_init_info fsi_wm8978_init_info = {
807 .fmt = SND_SOC_DAIFMT_I2S,
808 .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_NB_NF,
809 .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
810 .sysclk = 12288000,
811};
812
813static struct asoc_simple_card_info fsi_wm8978_info = {
814 .name = "wm8978",
815 .card = "FSI2A-WM8978",
816 .cpu_dai = "fsia-dai",
817 .codec = "wm8978.0-001a",
818 .platform = "sh_fsi2",
819 .codec_dai = "wm8978-hifi",
820 .init = &fsi_wm8978_init_info,
821};
822
823static struct platform_device fsi_wm8978_device = {
824 .name = "asoc-simple-card",
825 .id = 0,
826 .dev = {
827 .platform_data = &fsi_wm8978_info,
828 },
829};
830
0676c05e
KM		 831/* FSI-HDMI */
832static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
833 .cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
834};
835
836static struct asoc_simple_card_info fsi2_hdmi_info = {
837 .name = "HDMI",
838 .card = "FSI2B-HDMI",
839 .cpu_dai = "fsib-dai",
840 .codec = "sh-mobile-hdmi",
841 .platform = "sh_fsi2",
842 .codec_dai = "sh_mobile_hdmi-hifi",
843 .init = &fsi2_hdmi_init_info,
844};
845
846static struct platform_device fsi_hdmi_device = {
847 .name = "asoc-simple-card",
848 .id = 1,
849 .dev = {
850 .platform_data = &fsi2_hdmi_info,
851 },
852};
853
46cf6687
KM		 854/* I2C */
855static struct i2c_board_info i2c0_devices[] = {
856 {
857 I2C_BOARD_INFO("st1232-ts", 0x55),
858 .irq = evt2irq(0x0340),
859 },
5389bf71
KM		 860 {
861 I2C_BOARD_INFO("wm8978", 0x1a),
862 },
46cf6687
KM		 863};
864
4d22e564
KM		 865/*
866 * board devices
867 */
868static struct platform_device *eva_devices[] __initdata = {
dad29d1c 869 &lcdc0_device,
f7e7d31a 870 &gpio_keys_device,
d8fed1e2 871 &sh_eth_device,
49c01112 872 &sdhi0_device,
0a4266bb 873 &sh_mmcif_device,
910c14d0
KM		 874 &hdmi_device,
875 &hdmi_lcdc_device,
3760e794
KM		 876 &camera_device,
877 &ceu0_device,
5389bf71 878 &fsi_device,
0676c05e 879 &fsi_hdmi_device,
5389bf71 880 &fsi_wm8978_device,
4d22e564
KM		 881};
882
1c96293e
KM		 883static void __init eva_clock_init(void)
884{
885 struct clk *system = clk_get(NULL, "system_clk");
886 struct clk *xtal1 = clk_get(NULL, "extal1");
887 struct clk *usb24s = clk_get(NULL, "usb24s");
0676c05e
KM		 888 struct clk *fsibck = clk_get(NULL, "fsibck");
889 struct clk *fsib = clk_get(&fsi_device.dev, "ickb");
1c96293e
KM		 890
891 if (IS_ERR(system) ||
892 IS_ERR(xtal1) ||
0676c05e
KM		 893 IS_ERR(usb24s) ||
894 IS_ERR(fsibck) ||
895 IS_ERR(fsib)) {
1c96293e
KM		 896 pr_err("armadillo800eva board clock init failed\n");
897 goto clock_error;
898 }
899
900 /* armadillo 800 eva extal1 is 24MHz */
901 clk_set_rate(xtal1, 24000000);
902
903 /* usb24s use extal1 (= system) clock (= 24MHz) */
904 clk_set_parent(usb24s, system);
905
0676c05e
KM		 906 /* FSIBCK is 12.288MHz, and it is parent of FSI-B */
907 clk_set_parent(fsib, fsibck);
908 clk_set_rate(fsibck, 12288000);
909 clk_set_rate(fsib, 12288000);
910
1c96293e
KM		 911clock_error:
912 if (!IS_ERR(system))
913 clk_put(system);
914 if (!IS_ERR(xtal1))
915 clk_put(xtal1);
916 if (!IS_ERR(usb24s))
917 clk_put(usb24s);
0676c05e
KM		 918 if (!IS_ERR(fsibck))
919 clk_put(fsibck);
920 if (!IS_ERR(fsib))
921 clk_put(fsib);
1c96293e
KM		 922}
923
4d22e564
KM		 924/*
925 * board init
926 */
5389bf71
KM		 927#define GPIO_PORT7CR 0xe6050007
928#define GPIO_PORT8CR 0xe6050008
4d22e564
KM		 929static void __init eva_init(void)
930{
931 r8a7740_pinmux_init();
d49679e5 932 r8a7740_meram_workaround();
4d22e564
KM		 933
934 /* SCIFA1 */
935 gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
936 gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
937
dad29d1c
KM		 938 /* LCDC0 */
939 gpio_request(GPIO_FN_LCDC0_SELECT, NULL);
940 gpio_request(GPIO_FN_LCD0_D0, NULL);
941 gpio_request(GPIO_FN_LCD0_D1, NULL);
942 gpio_request(GPIO_FN_LCD0_D2, NULL);
943 gpio_request(GPIO_FN_LCD0_D3, NULL);
944 gpio_request(GPIO_FN_LCD0_D4, NULL);
945 gpio_request(GPIO_FN_LCD0_D5, NULL);
946 gpio_request(GPIO_FN_LCD0_D6, NULL);
947 gpio_request(GPIO_FN_LCD0_D7, NULL);
948 gpio_request(GPIO_FN_LCD0_D8, NULL);
949 gpio_request(GPIO_FN_LCD0_D9, NULL);
950 gpio_request(GPIO_FN_LCD0_D10, NULL);
951 gpio_request(GPIO_FN_LCD0_D11, NULL);
952 gpio_request(GPIO_FN_LCD0_D12, NULL);
953 gpio_request(GPIO_FN_LCD0_D13, NULL);
954 gpio_request(GPIO_FN_LCD0_D14, NULL);
955 gpio_request(GPIO_FN_LCD0_D15, NULL);
956 gpio_request(GPIO_FN_LCD0_D16, NULL);
957 gpio_request(GPIO_FN_LCD0_D17, NULL);
958 gpio_request(GPIO_FN_LCD0_D18_PORT40, NULL);
959 gpio_request(GPIO_FN_LCD0_D19_PORT4, NULL);
960 gpio_request(GPIO_FN_LCD0_D20_PORT3, NULL);
961 gpio_request(GPIO_FN_LCD0_D21_PORT2, NULL);
962 gpio_request(GPIO_FN_LCD0_D22_PORT0, NULL);
963 gpio_request(GPIO_FN_LCD0_D23_PORT1, NULL);
964 gpio_request(GPIO_FN_LCD0_DCK, NULL);
965 gpio_request(GPIO_FN_LCD0_VSYN, NULL);
966 gpio_request(GPIO_FN_LCD0_HSYN, NULL);
967 gpio_request(GPIO_FN_LCD0_DISP, NULL);
968 gpio_request(GPIO_FN_LCD0_LCLK_PORT165, NULL);
969
970 gpio_request(GPIO_PORT61, NULL); /* LCDDON */
971 gpio_direction_output(GPIO_PORT61, 1);
972
973 gpio_request(GPIO_PORT202, NULL); /* LCD0_LED_CONT */
974 gpio_direction_output(GPIO_PORT202, 0);
975
46cf6687
KM		 976 /* Touchscreen */
977 gpio_request(GPIO_FN_IRQ10, NULL); /* TP_INT */
978 gpio_request(GPIO_PORT166, NULL); /* TP_RST_B */
979 gpio_direction_output(GPIO_PORT166, 1);
980
d8fed1e2
KM		 981 /* GETHER */
982 gpio_request(GPIO_FN_ET_CRS, NULL);
983 gpio_request(GPIO_FN_ET_MDC, NULL);
984 gpio_request(GPIO_FN_ET_MDIO, NULL);
985 gpio_request(GPIO_FN_ET_TX_ER, NULL);
986 gpio_request(GPIO_FN_ET_RX_ER, NULL);
987 gpio_request(GPIO_FN_ET_ERXD0, NULL);
988 gpio_request(GPIO_FN_ET_ERXD1, NULL);
989 gpio_request(GPIO_FN_ET_ERXD2, NULL);
990 gpio_request(GPIO_FN_ET_ERXD3, NULL);
991 gpio_request(GPIO_FN_ET_TX_CLK, NULL);
992 gpio_request(GPIO_FN_ET_TX_EN, NULL);
993 gpio_request(GPIO_FN_ET_ETXD0, NULL);
994 gpio_request(GPIO_FN_ET_ETXD1, NULL);
995 gpio_request(GPIO_FN_ET_ETXD2, NULL);
996 gpio_request(GPIO_FN_ET_ETXD3, NULL);
997 gpio_request(GPIO_FN_ET_PHY_INT, NULL);
998 gpio_request(GPIO_FN_ET_COL, NULL);
999 gpio_request(GPIO_FN_ET_RX_DV, NULL);
1000 gpio_request(GPIO_FN_ET_RX_CLK, NULL);
1001
1002 gpio_request(GPIO_PORT18, NULL); /* PHY_RST */
1003 gpio_direction_output(GPIO_PORT18, 1);
1004
1c96293e
KM		 1005 /* USB */
1006 gpio_request(GPIO_PORT159, NULL); /* USB_DEVICE_MODE */
1007 gpio_direction_input(GPIO_PORT159);
1008
1009 if (gpio_get_value(GPIO_PORT159)) {
1010 /* USB Host */
1011 } else {
1012 /* USB Func */
1013 gpio_request(GPIO_FN_VBUS, NULL);
1014 platform_device_register(&usbhsf_device);
1015 }
1016
49c01112
KM		 1017 /* SDHI0 */
1018 gpio_request(GPIO_FN_SDHI0_CMD, NULL);
1019 gpio_request(GPIO_FN_SDHI0_CLK, NULL);
1020 gpio_request(GPIO_FN_SDHI0_D0, NULL);
1021 gpio_request(GPIO_FN_SDHI0_D1, NULL);
1022 gpio_request(GPIO_FN_SDHI0_D2, NULL);
1023 gpio_request(GPIO_FN_SDHI0_D3, NULL);
1024 gpio_request(GPIO_FN_SDHI0_WP, NULL);
1025
1026 gpio_request(GPIO_PORT17, NULL); /* SDHI0_18/33_B */
1027 gpio_request(GPIO_PORT74, NULL); /* SDHI0_PON */
1028 gpio_request(GPIO_PORT75, NULL); /* SDSLOT1_PON */
1029 gpio_direction_output(GPIO_PORT17, 0);
1030 gpio_direction_output(GPIO_PORT74, 1);
1031 gpio_direction_output(GPIO_PORT75, 1);
1032
1033 /* we can use GPIO_FN_IRQ31_PORT167 here for SDHI0 CD irq */
1034
0a4266bb
KM		 1035 /*
1036 * MMCIF
1037 *
1038 * Here doesn't care SW1.4 status,
1039 * since CON2 is not mounted.
1040 */
1041 gpio_request(GPIO_FN_MMC1_CLK_PORT103, NULL);
1042 gpio_request(GPIO_FN_MMC1_CMD_PORT104, NULL);
1043 gpio_request(GPIO_FN_MMC1_D0_PORT149, NULL);
1044 gpio_request(GPIO_FN_MMC1_D1_PORT148, NULL);
1045 gpio_request(GPIO_FN_MMC1_D2_PORT147, NULL);
1046 gpio_request(GPIO_FN_MMC1_D3_PORT146, NULL);
1047 gpio_request(GPIO_FN_MMC1_D4_PORT145, NULL);
1048 gpio_request(GPIO_FN_MMC1_D5_PORT144, NULL);
1049 gpio_request(GPIO_FN_MMC1_D6_PORT143, NULL);
1050 gpio_request(GPIO_FN_MMC1_D7_PORT142, NULL);
1051
3760e794
KM		 1052 /* CEU0 */
1053 gpio_request(GPIO_FN_VIO0_D7, NULL);
1054 gpio_request(GPIO_FN_VIO0_D6, NULL);
1055 gpio_request(GPIO_FN_VIO0_D5, NULL);
1056 gpio_request(GPIO_FN_VIO0_D4, NULL);
1057 gpio_request(GPIO_FN_VIO0_D3, NULL);
1058 gpio_request(GPIO_FN_VIO0_D2, NULL);
1059 gpio_request(GPIO_FN_VIO0_D1, NULL);
1060 gpio_request(GPIO_FN_VIO0_D0, NULL);
1061 gpio_request(GPIO_FN_VIO0_CLK, NULL);
1062 gpio_request(GPIO_FN_VIO0_HD, NULL);
1063 gpio_request(GPIO_FN_VIO0_VD, NULL);
1064 gpio_request(GPIO_FN_VIO0_FIELD, NULL);
1065 gpio_request(GPIO_FN_VIO_CKO, NULL);
1066
1067 /* CON1/CON15 Camera */
1068 gpio_request(GPIO_PORT173, NULL); /* STANDBY */
1069 gpio_request(GPIO_PORT172, NULL); /* RST */
1070 gpio_request(GPIO_PORT158, NULL); /* CAM_PON */
1071 gpio_direction_output(GPIO_PORT173, 0);
1072 gpio_direction_output(GPIO_PORT172, 1);
1073 gpio_direction_output(GPIO_PORT158, 0); /* see mt9t111_power() */
1074
5389bf71
KM		 1075 /* FSI-WM8978 */
1076 gpio_request(GPIO_FN_FSIAIBT, NULL);
1077 gpio_request(GPIO_FN_FSIAILR, NULL);
1078 gpio_request(GPIO_FN_FSIAOMC, NULL);
1079 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1080 gpio_request(GPIO_FN_FSIAISLD_PORT5, NULL);
1081
1082 gpio_request(GPIO_PORT7, NULL);
1083 gpio_request(GPIO_PORT8, NULL);
1084 gpio_no_direction(GPIO_PORT7CR); /* FSIAOBT needs no direction */
1085 gpio_no_direction(GPIO_PORT8CR); /* FSIAOLR needs no direction */
1086
0676c05e
KM		 1087 /* FSI-HDMI */
1088 gpio_request(GPIO_FN_FSIBCK, NULL);
1089
1090 /* HDMI */
1091 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1092 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1093
dad29d1c
KM		 1094 /*
1095 * CAUTION
1096 *
1097 * DBGMD/LCDC0/FSIA MUX
1098 * DBGMD_SELECT_B should be set after setting PFC Function.
1099 */
1100 gpio_request(GPIO_PORT176, NULL);
1101 gpio_direction_output(GPIO_PORT176, 1);
1102
2e3a5ef2
KM		 1103 /*
1104 * We can switch CON8/CON14 by SW1.5,
1105 * but it needs after DBGMD_SELECT_B
1106 */
1107 gpio_request(GPIO_PORT6, NULL);
1108 gpio_direction_input(GPIO_PORT6);
1109 if (gpio_get_value(GPIO_PORT6)) {
1110 /* CON14 enable */
1111 } else {
1112 /* CON8 (SDHI1) enable */
1113 gpio_request(GPIO_FN_SDHI1_CLK, NULL);
1114 gpio_request(GPIO_FN_SDHI1_CMD, NULL);
1115 gpio_request(GPIO_FN_SDHI1_D0, NULL);
1116 gpio_request(GPIO_FN_SDHI1_D1, NULL);
1117 gpio_request(GPIO_FN_SDHI1_D2, NULL);
1118 gpio_request(GPIO_FN_SDHI1_D3, NULL);
1119 gpio_request(GPIO_FN_SDHI1_CD, NULL);
1120 gpio_request(GPIO_FN_SDHI1_WP, NULL);
1121
1122 gpio_request(GPIO_PORT16, NULL); /* SDSLOT2_PON */
1123 gpio_direction_output(GPIO_PORT16, 1);
1124
1125 platform_device_register(&sdhi1_device);
1126 }
1127
1128
4d22e564
KM		 1129#ifdef CONFIG_CACHE_L2X0
1130 /* Early BRESP enable, Shared attribute override enable, 32K*8way */
1131 l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff);
1132#endif
1133
46cf6687
KM		 1134 i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
1135
4d22e564
KM		 1136 r8a7740_add_standard_devices();
1137
1138 platform_add_devices(eva_devices,
1139 ARRAY_SIZE(eva_devices));
0676c05e
KM		 1140
1141 eva_clock_init();
4d22e564
KM		 1142}
1143
1144static void __init eva_earlytimer_init(void)
1145{
4d22e564 1146 r8a7740_clock_init(MD_CK0 | MD_CK2);
4d22e564
KM		 1147 shmobile_earlytimer_init();
1148}
1149
1150static void __init eva_add_early_devices(void)
1151{
1152 r8a7740_add_early_devices();
1153
1154 /* override timer setup with board-specific code */
1155 shmobile_timer.init = eva_earlytimer_init;
1156}
1157
e6bf7059
MD		 1158static const char *eva_boards_compat_dt[] __initdata = {
1159 "renesas,armadillo800eva",
1160 NULL,
1161};
1162
1163DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
4d22e564
KM		 1164 .map_io = r8a7740_map_io,
1165 .init_early = eva_add_early_devices,
1166 .init_irq = r8a7740_init_irq,
1167 .handle_irq = shmobile_handle_irq_intc,
1168 .init_machine = eva_init,
1169 .timer = &shmobile_timer,
e6bf7059 1170 .dt_compat = eva_boards_compat_dt,
4d22e564 1171MACHINE_END
Linux kernel - Deliverables
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