ARM: mach-shmobile: sh7372 clock framework support V2
[deliverable/linux.git] / arch / arm / mach-shmobile / board-g3evm.c
CommitLineData
c793c1b0
MD
1/*
2 * G3EVM board support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/platform_device.h>
25#include <linux/delay.h>
26#include <linux/mtd/mtd.h>
27#include <linux/mtd/partitions.h>
28#include <linux/mtd/physmap.h>
143f3b83 29#include <linux/mtd/sh_flctl.h>
3a7b802d 30#include <linux/usb/r8a66597.h>
c793c1b0 31#include <linux/io.h>
7fdda678 32#include <linux/gpio.h>
03fb256d
MD
33#include <linux/input.h>
34#include <linux/input/sh_keysc.h>
7fdda678 35#include <mach/sh7367.h>
c793c1b0
MD
36#include <mach/common.h>
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40
41static struct mtd_partition nor_flash_partitions[] = {
42 {
43 .name = "loader",
44 .offset = 0x00000000,
45 .size = 512 * 1024,
46 },
47 {
48 .name = "bootenv",
49 .offset = MTDPART_OFS_APPEND,
50 .size = 512 * 1024,
51 },
52 {
53 .name = "kernel_ro",
54 .offset = MTDPART_OFS_APPEND,
55 .size = 8 * 1024 * 1024,
56 .mask_flags = MTD_WRITEABLE,
57 },
58 {
59 .name = "kernel",
60 .offset = MTDPART_OFS_APPEND,
61 .size = 8 * 1024 * 1024,
62 },
63 {
64 .name = "data",
65 .offset = MTDPART_OFS_APPEND,
66 .size = MTDPART_SIZ_FULL,
67 },
68};
69
70static struct physmap_flash_data nor_flash_data = {
71 .width = 2,
72 .parts = nor_flash_partitions,
73 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
74};
75
76static struct resource nor_flash_resources[] = {
77 [0] = {
78 .start = 0x00000000,
79 .end = 0x08000000 - 1,
80 .flags = IORESOURCE_MEM,
81 }
82};
83
84static struct platform_device nor_flash_device = {
85 .name = "physmap-flash",
86 .dev = {
87 .platform_data = &nor_flash_data,
88 },
89 .num_resources = ARRAY_SIZE(nor_flash_resources),
90 .resource = nor_flash_resources,
91};
92
3a7b802d
MD
93/* USBHS */
94void usb_host_port_power(int port, int power)
95{
96 if (!power) /* only power-on supported for now */
97 return;
98
99 /* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
100 __raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008);
101}
102
103static struct r8a66597_platdata usb_host_data = {
104 .on_chip = 1,
105 .port_power = usb_host_port_power,
106};
107
108static struct resource usb_host_resources[] = {
109 [0] = {
110 .name = "USBHS",
111 .start = 0xe6890000,
112 .end = 0xe68900e5,
113 .flags = IORESOURCE_MEM,
114 },
115 [1] = {
116 .start = 65,
117 .flags = IORESOURCE_IRQ,
118 },
119};
120
121static struct platform_device usb_host_device = {
122 .name = "r8a66597_hcd",
123 .id = 0,
124 .dev = {
125 .platform_data = &usb_host_data,
126 .dma_mask = NULL,
127 .coherent_dma_mask = 0xffffffff,
128 },
129 .num_resources = ARRAY_SIZE(usb_host_resources),
130 .resource = usb_host_resources,
131};
c793c1b0 132
03fb256d
MD
133/* KEYSC */
134static struct sh_keysc_info keysc_info = {
135 .mode = SH_KEYSC_MODE_5,
136 .scan_timing = 3,
137 .delay = 100,
138 .keycodes = {
139 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G,
140 KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N,
141 KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U,
142 KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP,
143 KEY_WAKEUP, KEY_COFFEE, KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
144 KEY_5, KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER,
145 },
146};
147
148static struct resource keysc_resources[] = {
149 [0] = {
150 .name = "KEYSC",
151 .start = 0xe61b0000,
152 .end = 0xe61b000f,
153 .flags = IORESOURCE_MEM,
154 },
155 [1] = {
156 .start = 79,
157 .flags = IORESOURCE_IRQ,
158 },
159};
160
161static struct platform_device keysc_device = {
162 .name = "sh_keysc",
163 .num_resources = ARRAY_SIZE(keysc_resources),
164 .resource = keysc_resources,
165 .dev = {
166 .platform_data = &keysc_info,
167 },
168};
169
143f3b83
MD
170static struct mtd_partition nand_partition_info[] = {
171 {
172 .name = "system",
173 .offset = 0,
174 .size = 64 * 1024 * 1024,
175 },
176 {
177 .name = "userdata",
178 .offset = MTDPART_OFS_APPEND,
179 .size = 128 * 1024 * 1024,
180 },
181 {
182 .name = "cache",
183 .offset = MTDPART_OFS_APPEND,
184 .size = 64 * 1024 * 1024,
185 },
186};
187
188static struct resource nand_flash_resources[] = {
189 [0] = {
190 .start = 0xe6a30000,
191 .end = 0xe6a3009b,
192 .flags = IORESOURCE_MEM,
193 }
194};
195
196static struct sh_flctl_platform_data nand_flash_data = {
197 .parts = nand_partition_info,
198 .nr_parts = ARRAY_SIZE(nand_partition_info),
199 .flcmncr_val = QTSEL_E | FCKSEL_E | TYPESEL_SET | NANWF_E
200 | SHBUSSEL | SEL_16BIT,
201};
202
203static struct platform_device nand_flash_device = {
204 .name = "sh_flctl",
205 .resource = nand_flash_resources,
206 .num_resources = ARRAY_SIZE(nand_flash_resources),
207 .dev = {
208 .platform_data = &nand_flash_data,
209 },
210};
211
c793c1b0
MD
212static struct platform_device *g3evm_devices[] __initdata = {
213 &nor_flash_device,
3a7b802d 214 &usb_host_device,
03fb256d 215 &keysc_device,
143f3b83 216 &nand_flash_device,
c793c1b0
MD
217};
218
219static struct map_desc g3evm_io_desc[] __initdata = {
220 /* create a 1:1 entity map for 0xe6xxxxxx
221 * used by CPGA, INTC and PFC.
222 */
223 {
224 .virtual = 0xe6000000,
225 .pfn = __phys_to_pfn(0xe6000000),
226 .length = 256 << 20,
227 .type = MT_DEVICE_NONSHARED
228 },
229};
230
231static void __init g3evm_map_io(void)
232{
233 iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
234
4ae04acb 235 /* setup early devices, clocks and console here as well */
c793c1b0
MD
236 sh7367_add_early_devices();
237 sh7367_clock_init();
4ae04acb 238 shmobile_setup_console();
c793c1b0
MD
239}
240
241static void __init g3evm_init(void)
242{
7fdda678
MD
243 sh7367_pinmux_init();
244
245 /* Lit DS4 LED */
246 gpio_request(GPIO_PORT22, NULL);
247 gpio_direction_output(GPIO_PORT22, 1);
248 gpio_export(GPIO_PORT22, 0);
249
250 /* Lit DS8 LED */
251 gpio_request(GPIO_PORT23, NULL);
252 gpio_direction_output(GPIO_PORT23, 1);
253 gpio_export(GPIO_PORT23, 0);
254
255 /* Lit DS3 LED */
256 gpio_request(GPIO_PORT24, NULL);
257 gpio_direction_output(GPIO_PORT24, 1);
258 gpio_export(GPIO_PORT24, 0);
259
260 /* SCIFA1 */
261 gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
262 gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
263 gpio_request(GPIO_FN_SCIFA1_CTS, NULL);
264 gpio_request(GPIO_FN_SCIFA1_RTS, NULL);
265
3a7b802d
MD
266 /* USBHS */
267 gpio_request(GPIO_FN_VBUS0, NULL);
268 gpio_request(GPIO_FN_PWEN, NULL);
269 gpio_request(GPIO_FN_OVCN, NULL);
270 gpio_request(GPIO_FN_OVCN2, NULL);
271 gpio_request(GPIO_FN_EXTLP, NULL);
272 gpio_request(GPIO_FN_IDIN, NULL);
273
274 /* enable clock in SYMSTPCR2 */
275 __raw_writel(__raw_readl(0xe6158048) & ~(1 << 22), 0xe6158048);
276
277 /* setup USB phy */
278 __raw_writew(0x0300, 0xe605810a); /* USBCR1 */
279 __raw_writew(0x00e0, 0xe60581c0); /* CPFCH */
280 __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */
281 __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */
282
03fb256d
MD
283 /* KEYSC @ CN7 */
284 gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL);
285 gpio_request(GPIO_FN_PORT43_KEYOUT1, NULL);
286 gpio_request(GPIO_FN_PORT44_KEYOUT2, NULL);
287 gpio_request(GPIO_FN_PORT45_KEYOUT3, NULL);
288 gpio_request(GPIO_FN_PORT46_KEYOUT4, NULL);
289 gpio_request(GPIO_FN_PORT47_KEYOUT5, NULL);
290 gpio_request(GPIO_FN_PORT48_KEYIN0_PU, NULL);
291 gpio_request(GPIO_FN_PORT49_KEYIN1_PU, NULL);
292 gpio_request(GPIO_FN_PORT50_KEYIN2_PU, NULL);
293 gpio_request(GPIO_FN_PORT55_KEYIN3_PU, NULL);
294 gpio_request(GPIO_FN_PORT56_KEYIN4_PU, NULL);
295 gpio_request(GPIO_FN_PORT57_KEYIN5_PU, NULL);
296 gpio_request(GPIO_FN_PORT58_KEYIN6_PU, NULL);
297
143f3b83
MD
298 /* FLCTL */
299 gpio_request(GPIO_FN_FCE0, NULL);
300 gpio_request(GPIO_FN_D0_ED0_NAF0, NULL);
301 gpio_request(GPIO_FN_D1_ED1_NAF1, NULL);
302 gpio_request(GPIO_FN_D2_ED2_NAF2, NULL);
303 gpio_request(GPIO_FN_D3_ED3_NAF3, NULL);
304 gpio_request(GPIO_FN_D4_ED4_NAF4, NULL);
305 gpio_request(GPIO_FN_D5_ED5_NAF5, NULL);
306 gpio_request(GPIO_FN_D6_ED6_NAF6, NULL);
307 gpio_request(GPIO_FN_D7_ED7_NAF7, NULL);
308 gpio_request(GPIO_FN_D8_ED8_NAF8, NULL);
309 gpio_request(GPIO_FN_D9_ED9_NAF9, NULL);
310 gpio_request(GPIO_FN_D10_ED10_NAF10, NULL);
311 gpio_request(GPIO_FN_D11_ED11_NAF11, NULL);
312 gpio_request(GPIO_FN_D12_ED12_NAF12, NULL);
313 gpio_request(GPIO_FN_D13_ED13_NAF13, NULL);
314 gpio_request(GPIO_FN_D14_ED14_NAF14, NULL);
315 gpio_request(GPIO_FN_D15_ED15_NAF15, NULL);
316 gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL);
317 gpio_request(GPIO_FN_FRB, NULL);
318 /* FOE, FCDE, FSC on dedicated pins */
319 __raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048);
320
c793c1b0
MD
321 sh7367_add_standard_devices();
322
323 platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices));
324}
325
326MACHINE_START(G3EVM, "g3evm")
327 .phys_io = 0xe6000000,
328 .io_pg_offst = ((0xe6000000) >> 18) & 0xfffc,
329 .map_io = g3evm_map_io,
330 .init_irq = sh7367_init_irq,
331 .init_machine = g3evm_init,
332 .timer = &shmobile_timer,
333MACHINE_END
This page took 0.042868 seconds and 5 git commands to generate.