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ARM: shmobile: Lager: set proper DMA masks for Ether device
[deliverable/linux.git] / arch / arm / mach-shmobile / board-lager.c
CommitLineData
3cc828fd
MD		 1/*
2 * Lager board support
3 *
5d5a87a5 4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
3cc828fd 5 * Copyright (C) 2013 Magnus Damm
5d5a87a5 6 * Copyright (C) 2014 Cogent Embedded, Inc.
3cc828fd
MD		 7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
c3842e4f
SH		 22#include <linux/gpio.h>
23#include <linux/gpio_keys.h>
d58922ce 24#include <linux/i2c.h>
c3842e4f 25#include <linux/input.h>
3cc828fd 26#include <linux/interrupt.h>
5812b8b2 27#include <linux/irq.h>
3cc828fd 28#include <linux/kernel.h>
1034f4ee 29#include <linux/leds.h>
40e6a51e 30#include <linux/mfd/tmio.h>
63d0539e
GL		 31#include <linux/mmc/host.h>
32#include <linux/mmc/sh_mmcif.h>
40e6a51e 33#include <linux/mmc/sh_mobile_sdhi.h>
e3a28ac2 34#include <linux/pinctrl/machine.h>
094a804a 35#include <linux/platform_data/camera-rcar.h>
1034f4ee 36#include <linux/platform_data/gpio-rcar.h>
c75a5afa 37#include <linux/platform_data/rcar-du.h>
1eabe028 38#include <linux/platform_data/usb-rcar-gen2-phy.h>
3cc828fd 39#include <linux/platform_device.h>
48c8b96f 40#include <linux/phy.h>
be0647d5 41#include <linux/regulator/driver.h>
63d0539e 42#include <linux/regulator/fixed.h>
be0647d5 43#include <linux/regulator/gpio-regulator.h>
63d0539e 44#include <linux/regulator/machine.h>
4901e136 45#include <linux/sh_eth.h>
1eabe028
VB		 46#include <linux/usb/phy.h>
47#include <linux/usb/renesas_usbhs.h>
3cc828fd 48#include <mach/common.h>
63d0539e 49#include <mach/irqs.h>
3cc828fd 50#include <mach/r8a7790.h>
094a804a 51#include <media/soc_camera.h>
3cc828fd
MD		 52#include <asm/mach-types.h>
53#include <asm/mach/arch.h>
24cf82f4
HCM		 54#include <linux/mtd/partitions.h>
55#include <linux/mtd/mtd.h>
56#include <linux/spi/flash.h>
57#include <linux/spi/rspi.h>
58#include <linux/spi/spi.h>
d58922ce
KM		 59#include <sound/rcar_snd.h>
60#include <sound/simple_card.h>
61
62/*
63 * SSI-AK4643
64 *
65 * SW1: 1: AK4643
66 * 2: CN22
67 * 3: ADV7511
68 *
69 * this command is required when playback.
70 *
71 * # amixer set "LINEOUT Mixer DACL" on
72 */
3cc828fd 73
40e6a51e
KM		 74/*
75 * SDHI0 (CN8)
76 *
77 * JP3: pin1
78 * SW20: pin1
79
80 * GP5_24: 1: VDD 3.3V (defult)
81 * 0: VDD 0.0V
82 * GP5_29: 1: VccQ 3.3V (defult)
83 * 0: VccQ 1.8V
84 *
85 */
86
c75a5afa
LP		 87/* DU */
88static struct rcar_du_encoder_data lager_du_encoders[] = {
89 {
90 .type = RCAR_DU_ENCODER_VGA,
91 .output = RCAR_DU_OUTPUT_DPAD0,
92 }, {
93 .type = RCAR_DU_ENCODER_NONE,
94 .output = RCAR_DU_OUTPUT_LVDS1,
95 .connector.lvds.panel = {
96 .width_mm = 210,
97 .height_mm = 158,
98 .mode = {
99 .clock = 65000,
100 .hdisplay = 1024,
101 .hsync_start = 1048,
102 .hsync_end = 1184,
103 .htotal = 1344,
104 .vdisplay = 768,
105 .vsync_start = 771,
106 .vsync_end = 777,
107 .vtotal = 806,
108 .flags = 0,
109 },
110 },
111 },
112};
113
114static const struct rcar_du_platform_data lager_du_pdata __initconst = {
115 .encoders = lager_du_encoders,
116 .num_encoders = ARRAY_SIZE(lager_du_encoders),
117};
118
119static const struct resource du_resources[] __initconst = {
120 DEFINE_RES_MEM(0xfeb00000, 0x70000),
121 DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
122 DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
123 DEFINE_RES_IRQ(gic_spi(256)),
124 DEFINE_RES_IRQ(gic_spi(268)),
125 DEFINE_RES_IRQ(gic_spi(269)),
126};
127
128static void __init lager_add_du_device(void)
129{
130 struct platform_device_info info = {
131 .name = "rcar-du-r8a7790",
132 .id = -1,
133 .res = du_resources,
134 .num_res = ARRAY_SIZE(du_resources),
37bf8103
LP		 135 .data = &lager_du_pdata,
136 .size_data = sizeof(lager_du_pdata),
c75a5afa
LP		 137 .dma_mask = DMA_BIT_MASK(32),
138 };
139
140 platform_device_register_full(&info);
141}
142
1034f4ee
SH		 143/* LEDS */
144static struct gpio_led lager_leds[] = {
145 {
146 .name = "led8",
147 .gpio = RCAR_GP_PIN(5, 17),
148 .default_state = LEDS_GPIO_DEFSTATE_ON,
149 }, {
150 .name = "led7",
151 .gpio = RCAR_GP_PIN(4, 23),
152 .default_state = LEDS_GPIO_DEFSTATE_ON,
153 }, {
154 .name = "led6",
155 .gpio = RCAR_GP_PIN(4, 22),
156 .default_state = LEDS_GPIO_DEFSTATE_ON,
157 },
158};
159
27113d63 160static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
1034f4ee
SH		 161 .leds = lager_leds,
162 .num_leds = ARRAY_SIZE(lager_leds),
163};
164
c3842e4f
SH		 165/* GPIO KEY */
166#define GPIO_KEY(c, g, d, ...) \
c9fd77d4 167 { .code = c, .gpio = g, .desc = d, .active_low = 1, \
e0554d90 168 .wakeup = 1, .debounce_interval = 20 }
c3842e4f 169
a6014693 170static struct gpio_keys_button gpio_buttons[] = {
c3842e4f
SH		 171 GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
172 GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
173 GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
174 GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
175};
176
27113d63 177static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
c3842e4f
SH		 178 .buttons = gpio_buttons,
179 .nbuttons = ARRAY_SIZE(gpio_buttons),
180};
181
63d0539e
GL		 182/* Fixed 3.3V regulator to be used by MMCIF */
183static struct regulator_consumer_supply fixed3v3_power_consumers[] =
184{
185 REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
186};
187
be0647d5
KM		 188/*
189 * SDHI regulator macro
190 *
191 ** FIXME**
192 * Lager board vqmmc is provided via DA9063 PMIC chip,
193 * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
194 * but, it doesn't have regulator support at this point.
195 * It uses gpio-regulator for vqmmc as quick-hack.
196 */
197#define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
198static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
199 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
200 \
201static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
202 .constraints = { \
203 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
204 }, \
205 .consumer_supplies = &vcc_sdhi##idx##_consumer, \
206 .num_consumer_supplies = 1, \
207}; \
208 \
209static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
210 .supply_name = "SDHI" #idx "Vcc", \
211 .microvolts = 3300000, \
212 .gpio = vdd_pin, \
213 .enable_high = 1, \
214 .init_data = &vcc_sdhi##idx##_init_data, \
215}; \
216 \
217static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
218 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
219 \
220static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
221 .constraints = { \
222 .input_uV = 3300000, \
223 .min_uV = 1800000, \
224 .max_uV = 3300000, \
225 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
226 REGULATOR_CHANGE_STATUS, \
227 }, \
228 .consumer_supplies = &vccq_sdhi##idx##_consumer, \
229 .num_consumer_supplies = 1, \
230}; \
231 \
232static struct gpio vccq_sdhi##idx##_gpio = \
233 { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
234 \
235static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
236 { .value = 1800000, .gpios = 0 }, \
237 { .value = 3300000, .gpios = 1 }, \
238}; \
239 \
240static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
241 .supply_name = "vqmmc", \
242 .gpios = &vccq_sdhi##idx##_gpio, \
243 .nr_gpios = 1, \
244 .states = vccq_sdhi##idx##_states, \
245 .nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
246 .type = REGULATOR_VOLTAGE, \
247 .init_data = &vccq_sdhi##idx##_init_data, \
248};
249
250SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
251SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
252
63d0539e 253/* MMCIF */
27113d63 254static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
63d0539e 255 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
b77c6bce
GL		 256 .clk_ctrl2_present = true,
257 .ccs_unsupported = true,
63d0539e
GL		 258};
259
27113d63 260static const struct resource mmcif1_resources[] __initconst = {
b7b42df6 261 DEFINE_RES_MEM(0xee220000, 0x80),
63d0539e
GL		 262 DEFINE_RES_IRQ(gic_spi(170)),
263};
264
4901e136 265/* Ether */
27113d63 266static const struct sh_eth_plat_data ether_pdata __initconst = {
4901e136 267 .phy = 0x1,
5812b8b2 268 .phy_irq = irq_pin(0),
4901e136 269 .edmac_endian = EDMAC_LITTLE_ENDIAN,
4901e136
SH		 270 .phy_interface = PHY_INTERFACE_MODE_RMII,
271 .ether_link_active_low = 1,
272};
273
27113d63 274static const struct resource ether_resources[] __initconst = {
4901e136
SH		 275 DEFINE_RES_MEM(0xee700000, 0x400),
276 DEFINE_RES_IRQ(gic_spi(162)),
277};
278
5d5a87a5
SS		 279static const struct platform_device_info ether_info __initconst = {
280 .parent = &platform_bus,
281 .name = "r8a7790-ether",
282 .id = -1,
283 .res = ether_resources,
284 .num_res = ARRAY_SIZE(ether_resources),
285 .data = &ether_pdata,
286 .size_data = sizeof(ether_pdata),
287 .dma_mask = DMA_BIT_MASK(32),
288};
289
24cf82f4
HCM		 290/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
291static struct mtd_partition spi_flash_part[] = {
292 /* Reserved for user loader program, read-only */
293 {
294 .name = "loader",
295 .offset = 0,
296 .size = SZ_256K,
297 .mask_flags = MTD_WRITEABLE,
298 },
299 /* Reserved for user program, read-only */
300 {
301 .name = "user",
302 .offset = MTDPART_OFS_APPEND,
303 .size = SZ_4M,
304 .mask_flags = MTD_WRITEABLE,
305 },
306 /* All else is writable (e.g. JFFS2) */
307 {
308 .name = "flash",
309 .offset = MTDPART_OFS_APPEND,
310 .size = MTDPART_SIZ_FULL,
311 .mask_flags = 0,
312 },
313};
314
d422c451 315static const struct flash_platform_data spi_flash_data = {
24cf82f4
HCM		 316 .name = "m25p80",
317 .parts = spi_flash_part,
318 .nr_parts = ARRAY_SIZE(spi_flash_part),
319 .type = "s25fl512s",
320};
321
322static const struct rspi_plat_data qspi_pdata __initconst = {
323 .num_chipselect = 1,
324};
325
326static const struct spi_board_info spi_info[] __initconst = {
327 {
328 .modalias = "m25p80",
329 .platform_data = &spi_flash_data,
330 .mode = SPI_MODE_0,
331 .max_speed_hz = 30000000,
332 .bus_num = 0,
333 .chip_select = 0,
334 },
335};
336
337/* QSPI resource */
338static const struct resource qspi_resources[] __initconst = {
339 DEFINE_RES_MEM(0xe6b10000, 0x1000),
a70eda7e 340 DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
24cf82f4
HCM		 341};
342
094a804a
VB		 343/* VIN */
344static const struct resource vin_resources[] __initconst = {
345 /* VIN0 */
346 DEFINE_RES_MEM(0xe6ef0000, 0x1000),
347 DEFINE_RES_IRQ(gic_spi(188)),
348 /* VIN1 */
349 DEFINE_RES_MEM(0xe6ef1000, 0x1000),
350 DEFINE_RES_IRQ(gic_spi(189)),
351};
352
353static void __init lager_add_vin_device(unsigned idx,
354 struct rcar_vin_platform_data *pdata)
355{
356 struct platform_device_info vin_info = {
357 .parent = &platform_bus,
358 .name = "r8a7790-vin",
359 .id = idx,
360 .res = &vin_resources[idx * 2],
361 .num_res = 2,
362 .dma_mask = DMA_BIT_MASK(32),
363 .data = pdata,
364 .size_data = sizeof(*pdata),
365 };
366
367 BUG_ON(idx > 1);
368
369 platform_device_register_full(&vin_info);
370}
371
372#define LAGER_CAMERA(idx, name, addr, pdata, flag) \
373static struct i2c_board_info i2c_cam##idx##_device = { \
374 I2C_BOARD_INFO(name, addr), \
375}; \
376 \
377static struct rcar_vin_platform_data vin##idx##_pdata = { \
378 .flags = flag, \
379}; \
380 \
381static struct soc_camera_link cam##idx##_link = { \
382 .bus_id = idx, \
383 .board_info = &i2c_cam##idx##_device, \
384 .i2c_adapter_id = 2, \
385 .module_name = name, \
386 .priv = pdata, \
387}
388
389/* Camera 0 is not currently supported due to adv7612 support missing */
390LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
391
392static void __init lager_add_camera1_device(void)
393{
394 platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
395 &cam1_link, sizeof(cam1_link));
396 lager_add_vin_device(1, &vin1_pdata);
397}
398
1e0d2c49
VB		 399/* SATA1 */
400static const struct resource sata1_resources[] __initconst = {
401 DEFINE_RES_MEM(0xee500000, 0x2000),
402 DEFINE_RES_IRQ(gic_spi(106)),
403};
404
405static const struct platform_device_info sata1_info __initconst = {
406 .parent = &platform_bus,
407 .name = "sata-r8a7790",
408 .id = 1,
409 .res = sata1_resources,
410 .num_res = ARRAY_SIZE(sata1_resources),
411 .dma_mask = DMA_BIT_MASK(32),
412};
413
1eabe028 414/* USBHS */
1eabe028
VB		 415static const struct resource usbhs_resources[] __initconst = {
416 DEFINE_RES_MEM(0xe6590000, 0x100),
417 DEFINE_RES_IRQ(gic_spi(107)),
418};
419
420struct usbhs_private {
421 struct renesas_usbhs_platform_info info;
422 struct usb_phy *phy;
423};
424
425#define usbhs_get_priv(pdev) \
426 container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
427
428static int usbhs_power_ctrl(struct platform_device *pdev,
429 void __iomem *base, int enable)
430{
431 struct usbhs_private *priv = usbhs_get_priv(pdev);
432
433 if (!priv->phy)
434 return -ENODEV;
435
436 if (enable) {
437 int retval = usb_phy_init(priv->phy);
438
439 if (!retval)
440 retval = usb_phy_set_suspend(priv->phy, 0);
441 return retval;
442 }
443
444 usb_phy_set_suspend(priv->phy, 1);
445 usb_phy_shutdown(priv->phy);
446 return 0;
447}
448
449static int usbhs_hardware_init(struct platform_device *pdev)
450{
451 struct usbhs_private *priv = usbhs_get_priv(pdev);
452 struct usb_phy *phy;
36be7686
MD		 453 int ret;
454
455 /* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5
456 * setting to avoid VBUS short circuit due to wrong cable.
457 * PWEN should be pulled up high if USB Function is selected by SW5
458 */
459 gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */
460 if (!gpio_get_value(RCAR_GP_PIN(5, 18))) {
461 pr_warn("Error: USB Function not selected - check SW5 + SW6\n");
462 ret = -ENOTSUPP;
463 goto error;
464 }
1eabe028
VB		 465
466 phy = usb_get_phy_dev(&pdev->dev, 0);
36be7686
MD		 467 if (IS_ERR(phy)) {
468 ret = PTR_ERR(phy);
469 goto error;
470 }
1eabe028
VB		 471
472 priv->phy = phy;
473 return 0;
36be7686
MD		 474 error:
475 gpio_free(RCAR_GP_PIN(5, 18));
476 return ret;
1eabe028
VB		 477}
478
479static int usbhs_hardware_exit(struct platform_device *pdev)
480{
481 struct usbhs_private *priv = usbhs_get_priv(pdev);
482
483 if (!priv->phy)
484 return 0;
485
486 usb_put_phy(priv->phy);
487 priv->phy = NULL;
36be7686
MD		 488
489 gpio_free(RCAR_GP_PIN(5, 18));
1eabe028
VB		 490 return 0;
491}
492
493static int usbhs_get_id(struct platform_device *pdev)
494{
495 return USBHS_GADGET;
496}
497
498static u32 lager_usbhs_pipe_type[] = {
499 USB_ENDPOINT_XFER_CONTROL,
500 USB_ENDPOINT_XFER_ISOC,
501 USB_ENDPOINT_XFER_ISOC,
502 USB_ENDPOINT_XFER_BULK,
503 USB_ENDPOINT_XFER_BULK,
504 USB_ENDPOINT_XFER_BULK,
505 USB_ENDPOINT_XFER_INT,
506 USB_ENDPOINT_XFER_INT,
507 USB_ENDPOINT_XFER_INT,
508 USB_ENDPOINT_XFER_BULK,
509 USB_ENDPOINT_XFER_BULK,
510 USB_ENDPOINT_XFER_BULK,
511 USB_ENDPOINT_XFER_BULK,
512 USB_ENDPOINT_XFER_BULK,
513 USB_ENDPOINT_XFER_BULK,
514 USB_ENDPOINT_XFER_BULK,
515};
516
517static struct usbhs_private usbhs_priv __initdata = {
518 .info = {
519 .platform_callback = {
520 .power_ctrl = usbhs_power_ctrl,
521 .hardware_init = usbhs_hardware_init,
522 .hardware_exit = usbhs_hardware_exit,
523 .get_id = usbhs_get_id,
524 },
525 .driver_param = {
526 .buswait_bwait = 4,
527 .pipe_type = lager_usbhs_pipe_type,
528 .pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type),
529 },
530 }
531};
532
533static void __init lager_register_usbhs(void)
534{
535 usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
536 platform_device_register_resndata(&platform_bus,
537 "renesas_usbhs", -1,
538 usbhs_resources,
539 ARRAY_SIZE(usbhs_resources),
540 &usbhs_priv.info,
541 sizeof(usbhs_priv.info));
542}
1eabe028
VB		 543
544/* USBHS PHY */
545static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
546 .chan0_pci = 0, /* Channel 0 is USBHS */
547 .chan2_pci = 1, /* Channel 2 is PCI USB */
548};
549
550static const struct resource usbhs_phy_resources[] __initconst = {
551 DEFINE_RES_MEM(0xe6590100, 0x100),
552};
553
d58922ce
KM		 554/* I2C */
555static struct i2c_board_info i2c2_devices[] = {
556 {
557 I2C_BOARD_INFO("ak4643", 0x12),
558 }
559};
560
561/* Sound */
562static struct resource rsnd_resources[] __initdata = {
563 [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
564 [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
565 [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
566 [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
567};
568
569static struct rsnd_ssi_platform_info rsnd_ssi[] = {
570 RSND_SSI_SET(0, 0, gic_spi(370), RSND_SSI_PLAY),
571 RSND_SSI_SET(0, 0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
572};
573
574static struct rsnd_scu_platform_info rsnd_scu[2] = {
575 /* no member at this point */
576};
577
578static struct rcar_snd_info rsnd_info = {
579 .flags = RSND_GEN2,
580 .ssi_info = rsnd_ssi,
581 .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
582 .scu_info = rsnd_scu,
583 .scu_info_nr = ARRAY_SIZE(rsnd_scu),
584};
585
586static struct asoc_simple_card_info rsnd_card_info = {
587 .name = "AK4643",
588 .card = "SSI01-AK4643",
589 .codec = "ak4642-codec.2-0012",
590 .platform = "rcar_sound",
591 .daifmt = SND_SOC_DAIFMT_LEFT_J,
592 .cpu_dai = {
593 .name = "rcar_sound",
594 .fmt = SND_SOC_DAIFMT_CBS_CFS,
595 },
596 .codec_dai = {
597 .name = "ak4642-hifi",
598 .fmt = SND_SOC_DAIFMT_CBM_CFM,
599 .sysclk = 11289600,
600 },
601};
602
603static void __init lager_add_rsnd_device(void)
604{
605 struct platform_device_info cardinfo = {
606 .parent = &platform_bus,
607 .name = "asoc-simple-card",
608 .id = -1,
609 .data = &rsnd_card_info,
610 .size_data = sizeof(struct asoc_simple_card_info),
611 .dma_mask = DMA_BIT_MASK(32),
612 };
613
614 i2c_register_board_info(2, i2c2_devices,
615 ARRAY_SIZE(i2c2_devices));
616
617 platform_device_register_resndata(
618 &platform_bus, "rcar_sound", -1,
619 rsnd_resources, ARRAY_SIZE(rsnd_resources),
620 &rsnd_info, sizeof(rsnd_info));
621
622 platform_device_register_full(&cardinfo);
623}
624
40e6a51e
KM		 625/* SDHI0 */
626static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
627 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
628 MMC_CAP_POWER_OFF_CARD,
629 .tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
630 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
631 TMIO_MMC_WRPROTECT_DISABLE,
632};
633
634static struct resource sdhi0_resources[] __initdata = {
635 DEFINE_RES_MEM(0xee100000, 0x200),
636 DEFINE_RES_IRQ(gic_spi(165)),
637};
638
639/* SDHI2 */
640static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
641 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
642 MMC_CAP_POWER_OFF_CARD,
643 .tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
644 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
645 TMIO_MMC_WRPROTECT_DISABLE,
646};
647
648static struct resource sdhi2_resources[] __initdata = {
649 DEFINE_RES_MEM(0xee140000, 0x100),
650 DEFINE_RES_IRQ(gic_spi(167)),
651};
652
849f7b6c
VB		 653/* Internal PCI1 */
654static const struct resource pci1_resources[] __initconst = {
655 DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */
656 DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */
657 DEFINE_RES_IRQ(gic_spi(112)),
658};
659
660static const struct platform_device_info pci1_info __initconst = {
661 .parent = &platform_bus,
662 .name = "pci-rcar-gen2",
663 .id = 1,
664 .res = pci1_resources,
665 .num_res = ARRAY_SIZE(pci1_resources),
666 .dma_mask = DMA_BIT_MASK(32),
667};
668
669static void __init lager_add_usb1_device(void)
670{
671 platform_device_register_full(&pci1_info);
672}
673
674/* Internal PCI2 */
675static const struct resource pci2_resources[] __initconst = {
676 DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
677 DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
678 DEFINE_RES_IRQ(gic_spi(113)),
679};
680
681static const struct platform_device_info pci2_info __initconst = {
682 .parent = &platform_bus,
683 .name = "pci-rcar-gen2",
684 .id = 2,
685 .res = pci2_resources,
686 .num_res = ARRAY_SIZE(pci2_resources),
687 .dma_mask = DMA_BIT_MASK(32),
688};
689
690static void __init lager_add_usb2_device(void)
691{
692 platform_device_register_full(&pci2_info);
693}
694
e3a28ac2 695static const struct pinctrl_map lager_pinctrl_map[] = {
c75a5afa
LP		 696 /* DU (CN10: ARGB0, CN13: LVDS) */
697 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
698 "du_rgb666", "du"),
699 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
700 "du_sync_1", "du"),
701 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
702 "du_clk_out_0", "du"),
d58922ce
KM		 703 /* I2C2 */
704 PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
705 "i2c2", "i2c2"),
248deabb
GU		 706 /* QSPI */
707 PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
708 "qspi_ctrl", "qspi"),
709 PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
710 "qspi_data4", "qspi"),
e3a28ac2
LP		 711 /* SCIF0 (CN19: DEBUG SERIAL0) */
712 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
713 "scif0_data", "scif0"),
714 /* SCIF1 (CN20: DEBUG SERIAL1) */
715 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
716 "scif1_data", "scif1"),
40e6a51e
KM		 717 /* SDHI0 */
718 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
719 "sdhi0_data4", "sdhi0"),
720 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
721 "sdhi0_ctrl", "sdhi0"),
722 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
723 "sdhi0_cd", "sdhi0"),
724 /* SDHI2 */
725 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
726 "sdhi2_data4", "sdhi2"),
727 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
728 "sdhi2_ctrl", "sdhi2"),
729 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
730 "sdhi2_cd", "sdhi2"),
d58922ce
KM		 731 /* SSI (CN17: sound) */
732 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
733 "ssi0129_ctrl", "ssi"),
734 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
735 "ssi0_data", "ssi"),
736 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
737 "ssi1_data", "ssi"),
738 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
739 "audio_clk_a", "audio_clk"),
63d0539e
GL		 740 /* MMCIF1 */
741 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
742 "mmc1_data8", "mmc1"),
743 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
744 "mmc1_ctrl", "mmc1"),
4901e136
SH		 745 /* Ether */
746 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
747 "eth_link", "eth"),
748 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
749 "eth_mdio", "eth"),
750 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
751 "eth_rmii", "eth"),
752 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
753 "intc_irq0", "intc"),
094a804a
VB		 754 /* VIN0 */
755 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
756 "vin0_data24", "vin0"),
757 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
758 "vin0_sync", "vin0"),
759 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
760 "vin0_field", "vin0"),
761 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
762 "vin0_clkenb", "vin0"),
763 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
764 "vin0_clk", "vin0"),
765 /* VIN1 */
766 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
767 "vin1_data8", "vin1"),
768 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
769 "vin1_clk", "vin1"),
1eabe028
VB		 770 /* USB0 */
771 PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790",
36be7686 772 "usb0_ovc_vbus", "usb0"),
849f7b6c
VB		 773 /* USB1 */
774 PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790",
775 "usb1", "usb1"),
776 /* USB2 */
777 PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790",
778 "usb2", "usb2"),
e3a28ac2
LP		 779};
780
3cc828fd
MD		 781static void __init lager_add_standard_devices(void)
782{
be0647d5
KM		 783 int fixed_regulator_idx = 0;
784 int gpio_regulator_idx = 0;
785
3cc828fd 786 r8a7790_clock_init();
e3a28ac2
LP		 787
788 pinctrl_register_mappings(lager_pinctrl_map,
789 ARRAY_SIZE(lager_pinctrl_map));
790 r8a7790_pinmux_init();
791
3cc828fd 792 r8a7790_add_standard_devices();
1034f4ee
SH		 793 platform_device_register_data(&platform_bus, "leds-gpio", -1,
794 &lager_leds_pdata,
795 sizeof(lager_leds_pdata));
c3842e4f
SH		 796 platform_device_register_data(&platform_bus, "gpio-keys", -1,
797 &lager_keys_pdata,
798 sizeof(lager_keys_pdata));
be0647d5
KM		 799 regulator_register_always_on(fixed_regulator_idx++,
800 "fixed-3.3V", fixed3v3_power_consumers,
63d0539e
GL		 801 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
802 platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
803 mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
804 &mmcif1_pdata, sizeof(mmcif1_pdata));
4901e136 805
5d5a87a5 806 platform_device_register_full(&ether_info);
c75a5afa
LP		 807
808 lager_add_du_device();
24cf82f4
HCM		 809
810 platform_device_register_resndata(&platform_bus, "qspi", 0,
811 qspi_resources,
812 ARRAY_SIZE(qspi_resources),
813 &qspi_pdata, sizeof(qspi_pdata));
814 spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
be0647d5
KM		 815
816 platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
817 &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
818 platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
819 &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
820
821 platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
822 &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
823 platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
824 &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
094a804a
VB		 825
826 lager_add_camera1_device();
1e0d2c49
VB		 827
828 platform_device_register_full(&sata1_info);
1eabe028
VB		 829
830 platform_device_register_resndata(&platform_bus, "usb_phy_rcar_gen2",
831 -1, usbhs_phy_resources,
832 ARRAY_SIZE(usbhs_phy_resources),
833 &usbhs_phy_pdata,
834 sizeof(usbhs_phy_pdata));
835 lager_register_usbhs();
849f7b6c
VB		 836 lager_add_usb1_device();
837 lager_add_usb2_device();
d58922ce
KM		 838
839 lager_add_rsnd_device();
40e6a51e
KM		 840
841 platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
842 sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
843 &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
844 platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 2,
845 sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
846 &sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
3cc828fd
MD		 847}
848
48c8b96f
SS		 849/*
850 * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
851 * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
852 * 14-15. We have to set them back to 01 from the default 00 value each time
853 * the PHY is reset. It's also important because the PHY's LED0 signal is
854 * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
855 * bounce on and off after each packet, which we apparently want to avoid.
856 */
857static int lager_ksz8041_fixup(struct phy_device *phydev)
858{
859 u16 phyctrl1 = phy_read(phydev, 0x1e);
860
861 phyctrl1 &= ~0xc000;
862 phyctrl1 |= 0x4000;
863 return phy_write(phydev, 0x1e, phyctrl1);
864}
865
866static void __init lager_init(void)
867{
868 lager_add_standard_devices();
869
5812b8b2
SS		 870 irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
871
6802cdc5
SH		 872 if (IS_ENABLED(CONFIG_PHYLIB))
873 phy_register_fixup_for_id("r8a7790-ether-ff:01",
874 lager_ksz8041_fixup);
48c8b96f
SS		 875}
876
27113d63 877static const char * const lager_boards_compat_dt[] __initconst = {
3cc828fd
MD		 878 "renesas,lager",
879 NULL,
880};
881
882DT_MACHINE_START(LAGER_DT, "lager")
ad09cb83 883 .smp = smp_ops(r8a7790_smp_ops),
0efd7faa 884 .init_early = r8a7790_init_early,
50c517d9 885 .init_time = rcar_gen2_timer_init,
48c8b96f 886 .init_machine = lager_init,
3fbbcbdf 887 .init_late = shmobile_init_late,
3cc828fd
MD		 888 .dt_compat = lager_boards_compat_dt,
889MACHINE_END
Linux kernel - Deliverables
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