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ARM: shmobile: use machine specific hook for late init
[deliverable/linux.git] / arch / arm / mach-shmobile / board-mackerel.c
CommitLineData
920adc75
KM		 1/*
2 * mackerel board support
3 *
4 * Copyright (C) 2010 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * based on ap4evb
8 * Copyright (C) 2010 Magnus Damm
9 * Copyright (C) 2008 Yoshihiro Shimoda
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 */
12c4309b 24#include <linux/delay.h>
920adc75
KM		 25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/platform_device.h>
30#include <linux/gpio.h>
31#include <linux/input.h>
32#include <linux/io.h>
1a44d72a 33#include <linux/i2c.h>
d44deb35 34#include <linux/leds.h>
6dff7da2
YG		 35#include <linux/mfd/tmio.h>
36#include <linux/mmc/host.h>
41491b9a 37#include <linux/mmc/sh_mmcif.h>
17e75d82 38#include <linux/mmc/sh_mobile_sdhi.h>
920adc75
KM		 39#include <linux/mtd/mtd.h>
40#include <linux/mtd/partitions.h>
41#include <linux/mtd/physmap.h>
2aab52e8 42#include <linux/mtd/sh_flctl.h>
b5e8d269 43#include <linux/pm_clock.h>
2264c151 44#include <linux/smsc911x.h>
1a44d72a 45#include <linux/sh_intc.h>
cd8ab004 46#include <linux/tca6416_keypad.h>
66ee3bef 47#include <linux/usb/renesas_usbhs.h>
9b742024 48#include <linux/dma-mapping.h>
920adc75 49
12c4309b 50#include <video/sh_mobile_hdmi.h>
11fee467 51#include <video/sh_mobile_lcdc.h>
ae37c8de
MD		 52#include <media/sh_mobile_ceu.h>
53#include <media/soc_camera.h>
54#include <media/soc_camera_platform.h>
1a44d72a
KM		 55#include <sound/sh_fsi.h>
56
920adc75 57#include <mach/common.h>
250a2723 58#include <mach/irqs.h>
920adc75
KM		 59#include <mach/sh7372.h>
60
61#include <asm/mach/arch.h>
920adc75
KM		 62#include <asm/mach-types.h>
63
64/*
65 * Address Interface BusWidth note
66 * ------------------------------------------------------------------
67 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
68 * 0x0800_0000 user area -
69 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
70 * 0x1400_0000 Ether (LAN9220) 16bit
71 * 0x1600_0000 user area - cannot use with NAND
72 * 0x1800_0000 user area -
73 * 0x1A00_0000 -
74 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
75 */
76
4b82b689
KM		 77/*
78 * CPU mode
79 *
80 * SW4 | Boot Area| Master | Remarks
81 * 1 | 2 | 3 | 4 | 5 | 6 | 8 | | Processor|
82 * ----+-----+-----+-----+-----+-----+-----+----------+----------+--------------
83 * ON | ON | OFF | ON | ON | OFF | OFF | External | System | External ROM
84 * ON | ON | ON | ON | ON | OFF | OFF | External | System | ROM Debug
85 * ON | ON | X | ON | OFF | OFF | OFF | Built-in | System | ROM Debug
86 * X | OFF | X | X | X | X | OFF | Built-in | System | MaskROM
87 * OFF | X | X | X | X | X | OFF | Built-in | System | MaskROM
88 * X | X | X | OFF | X | X | OFF | Built-in | System | MaskROM
89 * OFF | ON | OFF | X | X | OFF | ON | External | System | Standalone
90 * ON | OFF | OFF | X | X | OFF | ON | External | Realtime | Standalone
91*/
92
93/*
94 * NOR Flash ROM
95 *
96 * SW1 | SW2 | SW7 | NOR Flash ROM
97 * bit1 | bit1 bit2 | bit1 | Memory allocation
98 * ------+------------+------+------------------
99 * OFF | ON OFF | ON | Area 0
100 * OFF | ON OFF | OFF | Area 4
101 */
102
103/*
104 * SMSC 9220
105 *
106 * SW1 SMSC 9220
107 * -----------------------
108 * ON access disable
109 * OFF access enable
110 */
111
112/*
113 * NAND Flash ROM
114 *
115 * SW1 | SW2 | SW7 | NAND Flash ROM
116 * bit1 | bit1 bit2 | bit2 | Memory allocation
117 * ------+------------+------+------------------
118 * OFF | ON OFF | ON | FCE 0
119 * OFF | ON OFF | OFF | FCE 1
120 */
121
122/*
123 * External interrupt pin settings
124 *
125 * IRQX | pin setting | device | level
126 * ------+--------------------+--------------------+-------
127 * IRQ0 | ICR1A.IRQ0SA=0010 | SDHI2 card detect | Low
128 * IRQ6 | ICR1A.IRQ6SA=0011 | Ether(LAN9220) | High
e2a53b7c 129 * IRQ7 | ICR1A.IRQ7SA=0010 | LCD Touch Panel | Low
4b82b689
KM		 130 * IRQ8 | ICR2A.IRQ8SA=0010 | MMC/SD card detect | Low
131 * IRQ9 | ICR2A.IRQ9SA=0010 | KEY(TCA6408) | Low
132 * IRQ21 | ICR4A.IRQ21SA=0011 | Sensor(ADXL345) | High
133 * IRQ22 | ICR4A.IRQ22SA=0011 | Sensor(AK8975) | High
25338f2e 134 */
4b82b689 135
25338f2e
KM		 136/*
137 * USB
138 *
139 * USB0 : CN22 : Function
140 * USB1 : CN31 : Function/Host *1
141 *
142 * J30 (for CN31) *1
143 * ----------+---------------+-------------
144 * 1-2 short | VBUS 5V | Host
145 * open | external VBUS | Function
146 *
66ee3bef
KM		 147 * CAUTION
148 *
149 * renesas_usbhs driver can use external interrupt mode
150 * (which come from USB-PHY) or autonomy mode (it use own interrupt)
151 * for detecting connection/disconnection when Function.
152 * USB will be power OFF while it has been disconnecting
153 * if external interrupt mode, and it is always power ON if autonomy mode,
154 *
155 * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0",
156 * because Touchscreen is using IRQ7-PORT40.
157 * It is impossible to use IRQ7 demux on this board.
25338f2e 158 */
4b82b689 159
6dff7da2
YG		 160/*
161 * SDHI0 (CN12)
162 *
163 * SW56 : OFF
164 *
165 */
166
167/* MMC /SDHI1 (CN7)
168 *
169 * I/O voltage : 1.8v
170 *
171 * Power voltage : 1.8v or 3.3v
41491b9a 172 * J22 : select power voltage *1
6dff7da2
YG		 173 * 1-2 pin : 1.8v
174 * 2-3 pin : 3.3v
175 *
41491b9a
YG		 176 * *1
177 * Please change J22 depends the card to be used.
178 * MMC's OCR field set to support either voltage for the card inserted.
179 *
6dff7da2
YG		 180 * SW1 | SW33
181 * | bit1 | bit2 | bit3 | bit4
182 * -------------+------+------+------+-------
2150dace
SH		 183 * MMC0 OFF | OFF | X | ON | X (Use MMCIF)
184 * SDHI1 OFF | ON | X | OFF | X (Use MFD_SH_MOBILE_SDHI)
6dff7da2
YG		 185 *
186 */
187
188/*
189 * SDHI2 (CN23)
190 *
191 * microSD card sloct
192 *
193 */
194
6d9b7dd0
KM		 195/*
196 * FSI - AK4642
197 *
198 * it needs amixer settings for playing
199 *
200 * amixer set "Headphone" on
201 * amixer set "HPOUTL Mixer DACH" on
202 * amixer set "HPOUTR Mixer DACH" on
203 */
204
1a44d72a
KM		 205/*
206 * FIXME !!
207 *
208 * gpio_no_direction
66ee3bef 209 * gpio_pull_down
1a44d72a
KM		 210 * are quick_hack.
211 *
212 * current gpio frame work doesn't have
213 * the method to control only pull up/down/free.
214 * this function should be replaced by correct gpio function
215 */
216static void __init gpio_no_direction(u32 addr)
217{
218 __raw_writeb(0x00, addr);
219}
220
66ee3bef
KM		 221static void __init gpio_pull_down(u32 addr)
222{
223 u8 data = __raw_readb(addr);
224
225 data &= 0x0F;
226 data |= 0xA0;
227
228 __raw_writeb(data, addr);
229}
230
920adc75
KM		 231/* MTD */
232static struct mtd_partition nor_flash_partitions[] = {
233 {
234 .name = "loader",
235 .offset = 0x00000000,
236 .size = 512 * 1024,
237 .mask_flags = MTD_WRITEABLE,
238 },
239 {
240 .name = "bootenv",
241 .offset = MTDPART_OFS_APPEND,
242 .size = 512 * 1024,
243 .mask_flags = MTD_WRITEABLE,
244 },
245 {
246 .name = "kernel_ro",
247 .offset = MTDPART_OFS_APPEND,
248 .size = 8 * 1024 * 1024,
249 .mask_flags = MTD_WRITEABLE,
250 },
251 {
252 .name = "kernel",
253 .offset = MTDPART_OFS_APPEND,
254 .size = 8 * 1024 * 1024,
255 },
256 {
257 .name = "data",
258 .offset = MTDPART_OFS_APPEND,
259 .size = MTDPART_SIZ_FULL,
260 },
261};
262
263static struct physmap_flash_data nor_flash_data = {
264 .width = 2,
265 .parts = nor_flash_partitions,
266 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
267};
268
269static struct resource nor_flash_resources[] = {
270 [0] = {
487881c0
MD		 271 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
272 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
920adc75
KM		 273 .flags = IORESOURCE_MEM,
274 }
275};
276
277static struct platform_device nor_flash_device = {
278 .name = "physmap-flash",
279 .dev = {
280 .platform_data = &nor_flash_data,
281 },
282 .num_resources = ARRAY_SIZE(nor_flash_resources),
283 .resource = nor_flash_resources,
284};
285
2264c151
KM		 286/* SMSC */
287static struct resource smc911x_resources[] = {
288 {
289 .start = 0x14000000,
290 .end = 0x16000000 - 1,
291 .flags = IORESOURCE_MEM,
292 }, {
293 .start = evt2irq(0x02c0) /* IRQ6A */,
294 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
295 },
296};
297
298static struct smsc911x_platform_config smsc911x_info = {
299 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
300 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
301 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
302};
303
304static struct platform_device smc911x_device = {
305 .name = "smsc911x",
306 .id = -1,
307 .num_resources = ARRAY_SIZE(smc911x_resources),
308 .resource = smc911x_resources,
309 .dev = {
310 .platform_data = &smsc911x_info,
311 },
312};
313
1c7fcbed
D		 314/* MERAM */
315static struct sh_mobile_meram_info mackerel_meram_info = {
316 .addr_mode = SH_MOBILE_MERAM_MODE1,
317};
318
319static struct resource meram_resources[] = {
320 [0] = {
e71504d5 321 .name = "regs",
1c7fcbed 322 .start = 0xe8000000,
e71504d5
LP		 323 .end = 0xe807ffff,
324 .flags = IORESOURCE_MEM,
325 },
326 [1] = {
327 .name = "meram",
328 .start = 0xe8080000,
1c7fcbed
D		 329 .end = 0xe81fffff,
330 .flags = IORESOURCE_MEM,
331 },
332};
333
334static struct platform_device meram_device = {
335 .name = "sh_mobile_meram",
336 .id = 0,
337 .num_resources = ARRAY_SIZE(meram_resources),
338 .resource = meram_resources,
339 .dev = {
340 .platform_data = &mackerel_meram_info,
341 },
342};
343
11fee467
KM		 344/* LCDC */
345static struct fb_videomode mackerel_lcdc_modes[] = {
346 {
347 .name = "WVGA Panel",
348 .xres = 800,
349 .yres = 480,
350 .left_margin = 220,
351 .right_margin = 110,
352 .hsync_len = 70,
353 .upper_margin = 20,
354 .lower_margin = 5,
355 .vsync_len = 5,
356 .sync = 0,
357 },
358};
359
018882aa 360static int mackerel_set_brightness(int brightness)
1fbdfcde
MD		 361{
362 gpio_set_value(GPIO_PORT31, brightness);
363
364 return 0;
365}
366
018882aa 367static int mackerel_get_brightness(void)
1fbdfcde
MD		 368{
369 return gpio_get_value(GPIO_PORT31);
370}
371
c241a0e0 372static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
1c7fcbed 373 .icb[0] = {
1c7fcbed
D		 374 .meram_size = 0x40,
375 },
376 .icb[1] = {
1c7fcbed
D		 377 .meram_size = 0x40,
378 },
379};
380
11fee467 381static struct sh_mobile_lcdc_info lcdc_info = {
1c7fcbed 382 .meram_dev = &mackerel_meram_info,
11fee467
KM		 383 .clock_source = LCDC_CLK_BUS,
384 .ch[0] = {
385 .chan = LCDC_CHAN_MAINLCD,
edd153a3 386 .fourcc = V4L2_PIX_FMT_RGB565,
93ff2598
LP		 387 .lcd_modes = mackerel_lcdc_modes,
388 .num_modes = ARRAY_SIZE(mackerel_lcdc_modes),
11fee467 389 .interface_type = RGB24,
2c34e939 390 .clock_divider = 3,
11fee467 391 .flags = 0,
afaad83b
LP		 392 .panel_cfg = {
393 .width = 152,
394 .height = 91,
1fbdfcde
MD		 395 },
396 .bl_info = {
397 .name = "sh_mobile_lcdc_bl",
398 .max_brightness = 1,
43059b0f
LP		 399 .set_brightness = mackerel_set_brightness,
400 .get_brightness = mackerel_get_brightness,
1fbdfcde 401 },
1c7fcbed 402 .meram_cfg = &lcd_meram_cfg,
11fee467
KM		 403 }
404};
405
406static struct resource lcdc_resources[] = {
407 [0] = {
408 .name = "LCDC",
409 .start = 0xfe940000,
410 .end = 0xfe943fff,
411 .flags = IORESOURCE_MEM,
412 },
413 [1] = {
414 .start = intcs_evt2irq(0x580),
415 .flags = IORESOURCE_IRQ,
416 },
417};
418
419static struct platform_device lcdc_device = {
420 .name = "sh_mobile_lcdc_fb",
421 .num_resources = ARRAY_SIZE(lcdc_resources),
422 .resource = lcdc_resources,
423 .dev = {
424 .platform_data = &lcdc_info,
425 .coherent_dma_mask = ~0,
426 },
427};
428
a1022adb 429/* HDMI */
a1022adb 430static struct sh_mobile_hdmi_info hdmi_info = {
a1022adb
LP		 431 .flags = HDMI_SND_SRC_SPDIF,
432};
433
434static struct resource hdmi_resources[] = {
435 [0] = {
436 .name = "HDMI",
437 .start = 0xe6be0000,
438 .end = 0xe6be00ff,
439 .flags = IORESOURCE_MEM,
440 },
441 [1] = {
442 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
443 .start = evt2irq(0x17e0),
444 .flags = IORESOURCE_IRQ,
445 },
446};
447
448static struct platform_device hdmi_device = {
449 .name = "sh-mobile-hdmi",
450 .num_resources = ARRAY_SIZE(hdmi_resources),
451 .resource = hdmi_resources,
452 .id = -1,
453 .dev = {
454 .platform_data = &hdmi_info,
455 },
456};
457
c241a0e0 458static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
1c7fcbed 459 .icb[0] = {
1c7fcbed
D		 460 .meram_size = 0x100,
461 },
462 .icb[1] = {
1c7fcbed
D		 463 .meram_size = 0x100,
464 },
465};
a1022adb 466
12c4309b 467static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
1c7fcbed 468 .meram_dev = &mackerel_meram_info,
12c4309b
KM		 469 .clock_source = LCDC_CLK_EXTERNAL,
470 .ch[0] = {
471 .chan = LCDC_CHAN_MAINLCD,
edd153a3 472 .fourcc = V4L2_PIX_FMT_RGB565,
12c4309b
KM		 473 .interface_type = RGB24,
474 .clock_divider = 1,
475 .flags = LCDC_FLAGS_DWPOL,
1c7fcbed 476 .meram_cfg = &hdmi_meram_cfg,
a1022adb 477 .tx_dev = &hdmi_device,
12c4309b
KM		 478 }
479};
480
481static struct resource hdmi_lcdc_resources[] = {
482 [0] = {
483 .name = "LCDC1",
484 .start = 0xfe944000,
485 .end = 0xfe947fff,
486 .flags = IORESOURCE_MEM,
487 },
488 [1] = {
489 .start = intcs_evt2irq(0x1780),
490 .flags = IORESOURCE_IRQ,
491 },
492};
493
494static struct platform_device hdmi_lcdc_device = {
495 .name = "sh_mobile_lcdc_fb",
496 .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
497 .resource = hdmi_lcdc_resources,
498 .id = 1,
499 .dev = {
500 .platform_data = &hdmi_lcdc_info,
501 .coherent_dma_mask = ~0,
502 },
503};
504
3f25c9cc
KM		 505static struct platform_device fsi_hdmi_device = {
506 .name = "sh_fsi2_b_hdmi",
507};
508
2ce51f8b 509static void __init hdmi_init_pm_clock(void)
12c4309b
KM		 510{
511 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
512 int ret;
513 long rate;
514
515 if (IS_ERR(hdmi_ick)) {
516 ret = PTR_ERR(hdmi_ick);
517 pr_err("Cannot get HDMI ICK: %d\n", ret);
518 goto out;
519 }
520
521 ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
522 if (ret < 0) {
523 pr_err("Cannot set PLLC2 parent: %d, %d users\n",
524 ret, sh7372_pllc2_clk.usecount);
525 goto out;
526 }
527
528 pr_debug("PLLC2 initial frequency %lu\n",
529 clk_get_rate(&sh7372_pllc2_clk));
530
531 rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
532 if (rate < 0) {
533 pr_err("Cannot get suitable rate: %ld\n", rate);
534 ret = rate;
535 goto out;
536 }
537
538 ret = clk_set_rate(&sh7372_pllc2_clk, rate);
539 if (ret < 0) {
540 pr_err("Cannot set rate %ld: %d\n", rate, ret);
541 goto out;
542 }
543
12c4309b
KM		 544 pr_debug("PLLC2 set frequency %lu\n", rate);
545
546 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
2ce51f8b 547 if (ret < 0)
12c4309b 548 pr_err("Cannot set HDMI parent: %d\n", ret);
12c4309b
KM		 549
550out:
551 if (!IS_ERR(hdmi_ick))
552 clk_put(hdmi_ick);
12c4309b 553}
12c4309b 554
e2a53b7c
MD		 555/* USBHS0 is connected to CN22 which takes a USB Mini-B plug
556 *
557 * The sh7372 SoC has IRQ7 set aside for USBHS0 hotplug,
558 * but on this particular board IRQ7 is already used by
559 * the touch screen. This leaves us with software polling.
560 */
561#define USBHS0_POLL_INTERVAL (HZ * 5)
562
563struct usbhs_private {
564 unsigned int usbphyaddr;
565 unsigned int usbcrcaddr;
566 struct renesas_usbhs_platform_info info;
567 struct delayed_work work;
568 struct platform_device *pdev;
569};
570
571#define usbhs_get_priv(pdev) \
572 container_of(renesas_usbhs_get_info(pdev), \
573 struct usbhs_private, info)
574
575#define usbhs_is_connected(priv) \
576 (!((1 << 7) & __raw_readw(priv->usbcrcaddr)))
577
578static int usbhs_get_vbus(struct platform_device *pdev)
579{
580 return usbhs_is_connected(usbhs_get_priv(pdev));
581}
582
583static void usbhs_phy_reset(struct platform_device *pdev)
584{
585 struct usbhs_private *priv = usbhs_get_priv(pdev);
586
587 /* init phy */
588 __raw_writew(0x8a0a, priv->usbcrcaddr);
589}
590
591static int usbhs0_get_id(struct platform_device *pdev)
592{
593 return USBHS_GADGET;
594}
595
596static void usbhs0_work_function(struct work_struct *work)
597{
598 struct usbhs_private *priv = container_of(work, struct usbhs_private,
599 work.work);
600
601 renesas_usbhs_call_notify_hotplug(priv->pdev);
602 schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
603}
604
605static int usbhs0_hardware_init(struct platform_device *pdev)
606{
607 struct usbhs_private *priv = usbhs_get_priv(pdev);
608
609 priv->pdev = pdev;
610 INIT_DELAYED_WORK(&priv->work, usbhs0_work_function);
611 schedule_delayed_work(&priv->work, USBHS0_POLL_INTERVAL);
612 return 0;
613}
614
615static void usbhs0_hardware_exit(struct platform_device *pdev)
616{
617 struct usbhs_private *priv = usbhs_get_priv(pdev);
618
619 cancel_delayed_work_sync(&priv->work);
620}
621
e2a53b7c
MD		 622static struct usbhs_private usbhs0_private = {
623 .usbcrcaddr = 0xe605810c, /* USBCR2 */
624 .info = {
625 .platform_callback = {
626 .hardware_init = usbhs0_hardware_init,
627 .hardware_exit = usbhs0_hardware_exit,
628 .phy_reset = usbhs_phy_reset,
629 .get_id = usbhs0_get_id,
630 .get_vbus = usbhs_get_vbus,
631 },
632 .driver_param = {
633 .buswait_bwait = 4,
fe437561
KM		 634 .d0_tx_id = SHDMA_SLAVE_USB0_TX,
635 .d1_rx_id = SHDMA_SLAVE_USB0_RX,
e2a53b7c
MD		 636 },
637 },
638};
639
640static struct resource usbhs0_resources[] = {
641 [0] = {
642 .name = "USBHS0",
643 .start = 0xe6890000,
644 .end = 0xe68900e6 - 1,
645 .flags = IORESOURCE_MEM,
646 },
647 [1] = {
648 .start = evt2irq(0x1ca0) /* USB0_USB0I0 */,
649 .flags = IORESOURCE_IRQ,
650 },
651};
652
653static struct platform_device usbhs0_device = {
654 .name = "renesas_usbhs",
655 .id = 0,
656 .dev = {
657 .platform_data = &usbhs0_private.info,
658 },
659 .num_resources = ARRAY_SIZE(usbhs0_resources),
660 .resource = usbhs0_resources,
661};
662
663/* USBHS1 is connected to CN31 which takes a USB Mini-AB plug
664 *
665 * Use J30 to select between Host and Function. This setting
666 * can however not be detected by software. Hotplug of USBHS1
667 * is provided via IRQ8.
0ada2da5
KM		 668 *
669 * Current USB1 works as "USB Host".
670 * - set J30 "short"
671 *
672 * If you want to use it as "USB gadget",
673 * - J30 "open"
674 * - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
675 * - add .get_vbus = usbhs_get_vbus in usbhs1_private
e2a53b7c
MD		 676 */
677#define IRQ8 evt2irq(0x0300)
66ee3bef
KM		 678#define USB_PHY_MODE (1 << 4)
679#define USB_PHY_INT_EN ((1 << 3) | (1 << 2))
680#define USB_PHY_ON (1 << 1)
681#define USB_PHY_OFF (1 << 0)
682#define USB_PHY_INT_CLR (USB_PHY_ON | USB_PHY_OFF)
683
66ee3bef
KM		 684static irqreturn_t usbhs1_interrupt(int irq, void *data)
685{
686 struct platform_device *pdev = data;
687 struct usbhs_private *priv = usbhs_get_priv(pdev);
688
689 dev_dbg(&pdev->dev, "%s\n", __func__);
690
691 renesas_usbhs_call_notify_hotplug(pdev);
692
693 /* clear status */
694 __raw_writew(__raw_readw(priv->usbphyaddr) | USB_PHY_INT_CLR,
695 priv->usbphyaddr);
696
697 return IRQ_HANDLED;
698}
699
700static int usbhs1_hardware_init(struct platform_device *pdev)
701{
702 struct usbhs_private *priv = usbhs_get_priv(pdev);
703 int ret;
704
66ee3bef
KM		 705 /* clear interrupt status */
706 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
707
e2a53b7c 708 ret = request_irq(IRQ8, usbhs1_interrupt, IRQF_TRIGGER_HIGH,
66ee3bef
KM		 709 dev_name(&pdev->dev), pdev);
710 if (ret) {
711 dev_err(&pdev->dev, "request_irq err\n");
712 return ret;
713 }
714
715 /* enable USB phy interrupt */
716 __raw_writew(USB_PHY_MODE | USB_PHY_INT_EN, priv->usbphyaddr);
717
718 return 0;
719}
720
721static void usbhs1_hardware_exit(struct platform_device *pdev)
722{
723 struct usbhs_private *priv = usbhs_get_priv(pdev);
724
725 /* clear interrupt status */
726 __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
727
e2a53b7c 728 free_irq(IRQ8, pdev);
66ee3bef
KM		 729}
730
05a7929f
KM		 731static int usbhs1_get_id(struct platform_device *pdev)
732{
0ada2da5 733 return USBHS_HOST;
05a7929f
KM		 734}
735
66ee3bef
KM		 736static u32 usbhs1_pipe_cfg[] = {
737 USB_ENDPOINT_XFER_CONTROL,
738 USB_ENDPOINT_XFER_ISOC,
739 USB_ENDPOINT_XFER_ISOC,
740 USB_ENDPOINT_XFER_BULK,
741 USB_ENDPOINT_XFER_BULK,
742 USB_ENDPOINT_XFER_BULK,
743 USB_ENDPOINT_XFER_INT,
744 USB_ENDPOINT_XFER_INT,
745 USB_ENDPOINT_XFER_INT,
746 USB_ENDPOINT_XFER_BULK,
747 USB_ENDPOINT_XFER_BULK,
748 USB_ENDPOINT_XFER_BULK,
749 USB_ENDPOINT_XFER_BULK,
750 USB_ENDPOINT_XFER_BULK,
751 USB_ENDPOINT_XFER_BULK,
752 USB_ENDPOINT_XFER_BULK,
753};
754
755static struct usbhs_private usbhs1_private = {
e2a53b7c
MD		 756 .usbphyaddr = 0xe60581e2, /* USBPHY1INTAP */
757 .usbcrcaddr = 0xe6058130, /* USBCR4 */
66ee3bef
KM		 758 .info = {
759 .platform_callback = {
760 .hardware_init = usbhs1_hardware_init,
761 .hardware_exit = usbhs1_hardware_exit,
05a7929f 762 .get_id = usbhs1_get_id,
e2a53b7c 763 .phy_reset = usbhs_phy_reset,
66ee3bef
KM		 764 },
765 .driver_param = {
766 .buswait_bwait = 4,
f427eb64 767 .has_otg = 1,
66ee3bef
KM		 768 .pipe_type = usbhs1_pipe_cfg,
769 .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg),
fe437561
KM		 770 .d0_tx_id = SHDMA_SLAVE_USB1_TX,
771 .d1_rx_id = SHDMA_SLAVE_USB1_RX,
66ee3bef
KM		 772 },
773 },
774};
775
776static struct resource usbhs1_resources[] = {
777 [0] = {
e2a53b7c
MD		 778 .name = "USBHS1",
779 .start = 0xe68b0000,
780 .end = 0xe68b00e6 - 1,
66ee3bef
KM		 781 .flags = IORESOURCE_MEM,
782 },
783 [1] = {
784 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
785 .flags = IORESOURCE_IRQ,
786 },
787};
788
789static struct platform_device usbhs1_device = {
790 .name = "renesas_usbhs",
791 .id = 1,
792 .dev = {
793 .platform_data = &usbhs1_private.info,
794 },
795 .num_resources = ARRAY_SIZE(usbhs1_resources),
796 .resource = usbhs1_resources,
797};
798
d44deb35
KM		 799/* LED */
800static struct gpio_led mackerel_leds[] = {
801 {
802 .name = "led0",
803 .gpio = GPIO_PORT0,
804 .default_state = LEDS_GPIO_DEFSTATE_ON,
805 },
806 {
807 .name = "led1",
808 .gpio = GPIO_PORT1,
809 .default_state = LEDS_GPIO_DEFSTATE_ON,
810 },
811 {
812 .name = "led2",
813 .gpio = GPIO_PORT2,
814 .default_state = LEDS_GPIO_DEFSTATE_ON,
815 },
816 {
817 .name = "led3",
818 .gpio = GPIO_PORT159,
819 .default_state = LEDS_GPIO_DEFSTATE_ON,
820 }
821};
822
823static struct gpio_led_platform_data mackerel_leds_pdata = {
824 .leds = mackerel_leds,
825 .num_leds = ARRAY_SIZE(mackerel_leds),
826};
827
828static struct platform_device leds_device = {
829 .name = "leds-gpio",
830 .id = 0,
831 .dev = {
832 .platform_data = &mackerel_leds_pdata,
833 },
834};
835
1a44d72a
KM		 836/* FSI */
837#define IRQ_FSI evt2irq(0x1840)
98d27b8a
KM		 838static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
839{
840 int ret;
841
842 if (rate <= 0)
843 return 0;
844
845 if (!enable) {
846 clk_disable(clk);
847 return 0;
848 }
849
850 ret = clk_set_rate(clk, clk_round_rate(clk, rate));
851 if (ret < 0)
852 return ret;
853
854 return clk_enable(clk);
855}
856
fec691e7 857static int fsi_b_set_rate(struct device *dev, int rate, int enable)
98d27b8a
KM		 858{
859 struct clk *fsib_clk;
860 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
861 long fsib_rate = 0;
862 long fdiv_rate = 0;
863 int ackmd_bpfmd;
864 int ret;
865
98d27b8a
KM		 866 /* clock start */
867 switch (rate) {
868 case 44100:
869 fsib_rate = rate * 256;
870 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
871 break;
872 case 48000:
873 fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
874 fdiv_rate = rate * 256;
875 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
876 break;
877 default:
878 pr_err("unsupported rate in FSI2 port B\n");
879 return -EINVAL;
880 }
881
882 /* FSI B setting */
883 fsib_clk = clk_get(dev, "ickb");
884 if (IS_ERR(fsib_clk))
885 return -EIO;
886
887 /* fsib */
888 ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
889 if (ret < 0)
890 goto fsi_set_rate_end;
891
892 /* FSI DIV */
893 ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
894 if (ret < 0) {
895 /* disable FSI B */
896 if (enable)
897 __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
898 goto fsi_set_rate_end;
899 }
900
901 ret = ackmd_bpfmd;
902
903fsi_set_rate_end:
904 clk_put(fsib_clk);
905 return ret;
906}
907
1a44d72a 908static struct sh_fsi_platform_info fsi_info = {
fec691e7
KM		 909 .port_a = {
910 .flags = SH_FSI_BRS_INV,
911 },
912 .port_b = {
913 .flags = SH_FSI_BRS_INV |
98d27b8a
KM		 914 SH_FSI_BRM_INV |
915 SH_FSI_LRS_INV |
f17c13ca 916 SH_FSI_FMT_SPDIF,
fec691e7
KM		 917 .set_rate = fsi_b_set_rate,
918 }
1a44d72a
KM		 919};
920
921static struct resource fsi_resources[] = {
922 [0] = {
923 .name = "FSI",
924 .start = 0xFE3C0000,
925 .end = 0xFE3C0400 - 1,
926 .flags = IORESOURCE_MEM,
927 },
928 [1] = {
929 .start = IRQ_FSI,
930 .flags = IORESOURCE_IRQ,
931 },
932};
933
934static struct platform_device fsi_device = {
935 .name = "sh_fsi2",
936 .id = -1,
937 .num_resources = ARRAY_SIZE(fsi_resources),
938 .resource = fsi_resources,
939 .dev = {
940 .platform_data = &fsi_info,
941 },
942};
943
45f31216
KM		 944static struct fsi_ak4642_info fsi2_ak4643_info = {
945 .name = "AK4643",
946 .card = "FSI2A-AK4643",
947 .cpu_dai = "fsia-dai",
948 .codec = "ak4642-codec.0-0013",
949 .platform = "sh_fsi2",
950 .id = FSI_PORT_A,
951};
952
1a44d72a 953static struct platform_device fsi_ak4643_device = {
45f31216
KM		 954 .name = "fsi-ak4642-audio",
955 .dev = {
956 .platform_data = &fsi2_ak4643_info,
957 },
1a44d72a 958};
d44deb35 959
2aab52e8
BH		 960/* FLCTL */
961static struct mtd_partition nand_partition_info[] = {
962 {
963 .name = "system",
964 .offset = 0,
965 .size = 128 * 1024 * 1024,
966 },
967 {
968 .name = "userdata",
969 .offset = MTDPART_OFS_APPEND,
970 .size = 256 * 1024 * 1024,
971 },
972 {
973 .name = "cache",
974 .offset = MTDPART_OFS_APPEND,
975 .size = 128 * 1024 * 1024,
976 },
977};
978
979static struct resource nand_flash_resources[] = {
980 [0] = {
981 .start = 0xe6a30000,
982 .end = 0xe6a3009b,
983 .flags = IORESOURCE_MEM,
984 }
985};
986
987static struct sh_flctl_platform_data nand_flash_data = {
988 .parts = nand_partition_info,
989 .nr_parts = ARRAY_SIZE(nand_partition_info),
990 .flcmncr_val = CLK_16B_12L_4H | TYPESEL_SET
991 | SHBUSSEL | SEL_16BIT | SNAND_E,
992 .use_holden = 1,
993};
994
995static struct platform_device nand_flash_device = {
996 .name = "sh_flctl",
997 .resource = nand_flash_resources,
998 .num_resources = ARRAY_SIZE(nand_flash_resources),
999 .dev = {
1000 .platform_data = &nand_flash_data,
1001 },
1002};
1003
6dff7da2
YG		 1004/*
1005 * The card detect pin of the top SD/MMC slot (CN7) is active low and is
1006 * connected to GPIO A22 of SH7372 (GPIO_PORT41).
1007 */
1008static int slot_cn7_get_cd(struct platform_device *pdev)
1009{
ceb50f33 1010 return !gpio_get_value(GPIO_PORT41);
6dff7da2
YG		 1011}
1012
1013/* SDHI0 */
4bff4a7e
GL		 1014static irqreturn_t mackerel_sdhi0_gpio_cd(int irq, void *arg)
1015{
1016 struct device *dev = arg;
1017 struct sh_mobile_sdhi_info *info = dev->platform_data;
1018 struct tmio_mmc_data *pdata = info->pdata;
1019
1020 tmio_mmc_cd_wakeup(pdata);
1021
1022 return IRQ_HANDLED;
1023}
1024
6dff7da2
YG		 1025static struct sh_mobile_sdhi_info sdhi0_info = {
1026 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
1027 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
da97da73 1028 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
6dff7da2
YG		 1029};
1030
1031static struct resource sdhi0_resources[] = {
1032 [0] = {
1033 .name = "SDHI0",
1034 .start = 0xe6850000,
31d31fe7 1035 .end = 0xe68500ff,
6dff7da2
YG		 1036 .flags = IORESOURCE_MEM,
1037 },
1038 [1] = {
2007aea1
SH		 1039 .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
1040 .flags = IORESOURCE_IRQ,
1041 },
1042 [2] = {
1043 .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
1044 .flags = IORESOURCE_IRQ,
1045 },
1046 [3] = {
1047 .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
6dff7da2
YG		 1048 .flags = IORESOURCE_IRQ,
1049 },
1050};
1051
1052static struct platform_device sdhi0_device = {
1053 .name = "sh_mobile_sdhi",
1054 .num_resources = ARRAY_SIZE(sdhi0_resources),
1055 .resource = sdhi0_resources,
1056 .id = 0,
1057 .dev = {
1058 .platform_data = &sdhi0_info,
1059 },
1060};
1061
5bcd7517 1062#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2
YG		 1063/* SDHI1 */
1064static struct sh_mobile_sdhi_info sdhi1_info = {
1065 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
1066 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
1067 .tmio_ocr_mask = MMC_VDD_165_195,
1068 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
da97da73 1069 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
6dff7da2
YG		 1070 MMC_CAP_NEEDS_POLL,
1071 .get_cd = slot_cn7_get_cd,
1072};
1073
1074static struct resource sdhi1_resources[] = {
1075 [0] = {
1076 .name = "SDHI1",
1077 .start = 0xe6860000,
31d31fe7 1078 .end = 0xe68600ff,
6dff7da2
YG		 1079 .flags = IORESOURCE_MEM,
1080 },
1081 [1] = {
cb2ccc32 1082 .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
2007aea1
SH		 1083 .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
1084 .flags = IORESOURCE_IRQ,
1085 },
1086 [2] = {
cb2ccc32 1087 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
2007aea1
SH		 1088 .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
1089 .flags = IORESOURCE_IRQ,
1090 },
1091 [3] = {
cb2ccc32 1092 .name = SH_MOBILE_SDHI_IRQ_SDIO,
2007aea1 1093 .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
6dff7da2
YG		 1094 .flags = IORESOURCE_IRQ,
1095 },
1096};
1097
1098static struct platform_device sdhi1_device = {
1099 .name = "sh_mobile_sdhi",
1100 .num_resources = ARRAY_SIZE(sdhi1_resources),
1101 .resource = sdhi1_resources,
1102 .id = 1,
1103 .dev = {
1104 .platform_data = &sdhi1_info,
1105 },
1106};
41491b9a 1107#endif
6dff7da2 1108
da5d1f4c
YG		 1109/*
1110 * The card detect pin of the top SD/MMC slot (CN23) is active low and is
1111 * connected to GPIO SCIFB_SCK of SH7372 (GPIO_PORT162).
1112 */
1113static int slot_cn23_get_cd(struct platform_device *pdev)
1114{
1115 return !gpio_get_value(GPIO_PORT162);
1116}
1117
6dff7da2
YG		 1118/* SDHI2 */
1119static struct sh_mobile_sdhi_info sdhi2_info = {
1120 .dma_slave_tx = SHDMA_SLAVE_SDHI2_TX,
1121 .dma_slave_rx = SHDMA_SLAVE_SDHI2_RX,
1122 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
da97da73 1123 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
6dff7da2 1124 MMC_CAP_NEEDS_POLL,
da5d1f4c 1125 .get_cd = slot_cn23_get_cd,
6dff7da2
YG		 1126};
1127
1128static struct resource sdhi2_resources[] = {
1129 [0] = {
1130 .name = "SDHI2",
1131 .start = 0xe6870000,
31d31fe7 1132 .end = 0xe68700ff,
6dff7da2
YG		 1133 .flags = IORESOURCE_MEM,
1134 },
1135 [1] = {
cb2ccc32 1136 .name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
2007aea1
SH		 1137 .start = evt2irq(0x1200), /* SDHI2_SDHI2I0 */
1138 .flags = IORESOURCE_IRQ,
1139 },
1140 [2] = {
cb2ccc32 1141 .name = SH_MOBILE_SDHI_IRQ_SDCARD,
2007aea1
SH		 1142 .start = evt2irq(0x1220), /* SDHI2_SDHI2I1 */
1143 .flags = IORESOURCE_IRQ,
1144 },
1145 [3] = {
cb2ccc32 1146 .name = SH_MOBILE_SDHI_IRQ_SDIO,
2007aea1 1147 .start = evt2irq(0x1240), /* SDHI2_SDHI2I2 */
6dff7da2
YG		 1148 .flags = IORESOURCE_IRQ,
1149 },
1150};
1151
1152static struct platform_device sdhi2_device = {
1153 .name = "sh_mobile_sdhi",
1154 .num_resources = ARRAY_SIZE(sdhi2_resources),
1155 .resource = sdhi2_resources,
1156 .id = 2,
1157 .dev = {
1158 .platform_data = &sdhi2_info,
1159 },
1160};
1161
41491b9a
YG		 1162/* SH_MMCIF */
1163static struct resource sh_mmcif_resources[] = {
1164 [0] = {
1165 .name = "MMCIF",
1166 .start = 0xE6BD0000,
1167 .end = 0xE6BD00FF,
1168 .flags = IORESOURCE_MEM,
1169 },
1170 [1] = {
1171 /* MMC ERR */
1172 .start = evt2irq(0x1ac0),
1173 .flags = IORESOURCE_IRQ,
1174 },
1175 [2] = {
1176 /* MMC NOR */
1177 .start = evt2irq(0x1ae0),
1178 .flags = IORESOURCE_IRQ,
1179 },
1180};
1181
1182static struct sh_mmcif_plat_data sh_mmcif_plat = {
1183 .sup_pclk = 0,
1184 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
1185 .caps = MMC_CAP_4_BIT_DATA |
1186 MMC_CAP_8_BIT_DATA |
1187 MMC_CAP_NEEDS_POLL,
1188 .get_cd = slot_cn7_get_cd,
d5bb386d
GL		 1189 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
1190 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
41491b9a
YG		 1191};
1192
1193static struct platform_device sh_mmcif_device = {
1194 .name = "sh_mmcif",
1195 .id = 0,
1196 .dev = {
1197 .dma_mask = NULL,
1198 .coherent_dma_mask = 0xffffffff,
1199 .platform_data = &sh_mmcif_plat,
1200 },
1201 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
1202 .resource = sh_mmcif_resources,
1203};
1204
ae37c8de 1205
7dfff953
GL		 1206static int mackerel_camera_add(struct soc_camera_device *icd);
1207static void mackerel_camera_del(struct soc_camera_device *icd);
ae37c8de
MD		 1208
1209static int camera_set_capture(struct soc_camera_platform_info *info,
1210 int enable)
1211{
1212 return 0; /* camera sensor always enabled */
1213}
1214
1215static struct soc_camera_platform_info camera_info = {
1216 .format_name = "UYVY",
1217 .format_depth = 16,
1218 .format = {
1219 .code = V4L2_MBUS_FMT_UYVY8_2X8,
1220 .colorspace = V4L2_COLORSPACE_SMPTE170M,
1221 .field = V4L2_FIELD_NONE,
1222 .width = 640,
1223 .height = 480,
1224 },
d1e87ed7
GL		 1225 .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
1226 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
1227 V4L2_MBUS_DATA_ACTIVE_HIGH,
1228 .mbus_type = V4L2_MBUS_PARALLEL,
ae37c8de
MD		 1229 .set_capture = camera_set_capture,
1230};
1231
1232static struct soc_camera_link camera_link = {
1233 .bus_id = 0,
1234 .add_device = mackerel_camera_add,
1235 .del_device = mackerel_camera_del,
1236 .module_name = "soc_camera_platform",
1237 .priv = &camera_info,
1238};
1239
86a73144
GL		 1240static struct platform_device *camera_device;
1241
1242static void mackerel_camera_release(struct device *dev)
ae37c8de 1243{
86a73144 1244 soc_camera_platform_release(&camera_device);
ae37c8de
MD		 1245}
1246
7dfff953 1247static int mackerel_camera_add(struct soc_camera_device *icd)
ae37c8de 1248{
7dfff953 1249 return soc_camera_platform_add(icd, &camera_device, &camera_link,
86a73144 1250 mackerel_camera_release, 0);
ae37c8de
MD		 1251}
1252
7dfff953 1253static void mackerel_camera_del(struct soc_camera_device *icd)
ae37c8de 1254{
7dfff953 1255 soc_camera_platform_del(icd, camera_device, &camera_link);
ae37c8de
MD		 1256}
1257
1258static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
1259 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
1260};
1261
1262static struct resource ceu_resources[] = {
1263 [0] = {
1264 .name = "CEU",
1265 .start = 0xfe910000,
1266 .end = 0xfe91009f,
1267 .flags = IORESOURCE_MEM,
1268 },
1269 [1] = {
1270 .start = intcs_evt2irq(0x880),
1271 .flags = IORESOURCE_IRQ,
1272 },
1273 [2] = {
1274 /* place holder for contiguous memory */
1275 },
1276};
1277
1278static struct platform_device ceu_device = {
1279 .name = "sh_mobile_ceu",
1280 .id = 0, /* "ceu0" clock */
1281 .num_resources = ARRAY_SIZE(ceu_resources),
1282 .resource = ceu_resources,
1283 .dev = {
05a5f01c
GL		 1284 .platform_data = &sh_mobile_ceu_info,
1285 .coherent_dma_mask = 0xffffffff,
ae37c8de
MD		 1286 },
1287};
1288
1289static struct platform_device mackerel_camera = {
1290 .name = "soc-camera-pdrv",
1291 .id = 0,
1292 .dev = {
1293 .platform_data = &camera_link,
1294 },
1295};
1296
920adc75
KM		 1297static struct platform_device *mackerel_devices[] __initdata = {
1298 &nor_flash_device,
2264c151 1299 &smc911x_device,
11fee467 1300 &lcdc_device,
66ee3bef 1301 &usbhs1_device,
5a568552 1302 &usbhs0_device,
d44deb35 1303 &leds_device,
1a44d72a
KM		 1304 &fsi_device,
1305 &fsi_ak4643_device,
3f25c9cc 1306 &fsi_hdmi_device,
2aab52e8 1307 &nand_flash_device,
6dff7da2 1308 &sdhi0_device,
5bcd7517 1309#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2 1310 &sdhi1_device,
41491b9a 1311#endif
6dff7da2 1312 &sdhi2_device,
41491b9a 1313 &sh_mmcif_device,
ae37c8de
MD		 1314 &ceu_device,
1315 &mackerel_camera,
12c4309b 1316 &hdmi_device,
a1022adb 1317 &hdmi_lcdc_device,
1c7fcbed 1318 &meram_device,
1a44d72a
KM		 1319};
1320
cd8ab004
TS		 1321/* Keypad Initialization */
1322#define KEYPAD_BUTTON(ev_type, ev_code, act_low) \
1323{ \
1324 .type = ev_type, \
1325 .code = ev_code, \
1326 .active_low = act_low, \
1327}
1328
1329#define KEYPAD_BUTTON_LOW(event_code) KEYPAD_BUTTON(EV_KEY, event_code, 1)
1330
1331static struct tca6416_button mackerel_gpio_keys[] = {
1332 KEYPAD_BUTTON_LOW(KEY_HOME),
1333 KEYPAD_BUTTON_LOW(KEY_MENU),
1334 KEYPAD_BUTTON_LOW(KEY_BACK),
1335 KEYPAD_BUTTON_LOW(KEY_POWER),
1336};
1337
1338static struct tca6416_keys_platform_data mackerel_tca6416_keys_info = {
1339 .buttons = mackerel_gpio_keys,
1340 .nbuttons = ARRAY_SIZE(mackerel_gpio_keys),
1341 .rep = 1,
1342 .use_polling = 0,
1343 .pinmask = 0x000F,
1344};
1345
1a44d72a 1346/* I2C */
6ae1e19d 1347#define IRQ7 evt2irq(0x02e0)
cd8ab004
TS		 1348#define IRQ9 evt2irq(0x0320)
1349
1a44d72a
KM		 1350static struct i2c_board_info i2c0_devices[] = {
1351 {
1352 I2C_BOARD_INFO("ak4643", 0x13),
1353 },
cd8ab004
TS		 1354 /* Keypad */
1355 {
1356 I2C_BOARD_INFO("tca6408-keys", 0x20),
1357 .platform_data = &mackerel_tca6416_keys_info,
1358 .irq = IRQ9,
1359 },
6ae1e19d
TS		 1360 /* Touchscreen */
1361 {
1362 I2C_BOARD_INFO("st1232-ts", 0x55),
1363 .irq = IRQ7,
1364 },
920adc75
KM		 1365};
1366
80f1dc7c
TS		 1367#define IRQ21 evt2irq(0x32a0)
1368
1369static struct i2c_board_info i2c1_devices[] = {
1370 /* Accelerometer */
1371 {
1372 I2C_BOARD_INFO("adxl34x", 0x53),
1373 .irq = IRQ21,
1374 },
1375};
1376
1a44d72a
KM		 1377#define GPIO_PORT9CR 0xE6051009
1378#define GPIO_PORT10CR 0xE605100A
e2a53b7c 1379#define GPIO_PORT167CR 0xE60520A7
66ee3bef 1380#define GPIO_PORT168CR 0xE60520A8
12c4309b 1381#define SRCR4 0xe61580bc
98d27b8a 1382#define USCCR1 0xE6058144
920adc75
KM		 1383static void __init mackerel_init(void)
1384{
12c4309b 1385 u32 srcr4;
98d27b8a 1386 struct clk *clk;
4bff4a7e 1387 int ret;
12c4309b 1388
12bb16d2
MD		 1389 /* External clock source */
1390 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1391
920adc75
KM		 1392 sh7372_pinmux_init();
1393
1394 /* enable SCIFA0 */
1395 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1396 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1397
2264c151
KM		 1398 /* enable SMSC911X */
1399 gpio_request(GPIO_FN_CS5A, NULL);
1400 gpio_request(GPIO_FN_IRQ6_39, NULL);
1401
11fee467 1402 /* LCDC */
eb87e677
KM		 1403 gpio_request(GPIO_FN_LCDD23, NULL);
1404 gpio_request(GPIO_FN_LCDD22, NULL);
1405 gpio_request(GPIO_FN_LCDD21, NULL);
1406 gpio_request(GPIO_FN_LCDD20, NULL);
1407 gpio_request(GPIO_FN_LCDD19, NULL);
1408 gpio_request(GPIO_FN_LCDD18, NULL);
11fee467
KM		 1409 gpio_request(GPIO_FN_LCDD17, NULL);
1410 gpio_request(GPIO_FN_LCDD16, NULL);
1411 gpio_request(GPIO_FN_LCDD15, NULL);
1412 gpio_request(GPIO_FN_LCDD14, NULL);
1413 gpio_request(GPIO_FN_LCDD13, NULL);
1414 gpio_request(GPIO_FN_LCDD12, NULL);
1415 gpio_request(GPIO_FN_LCDD11, NULL);
1416 gpio_request(GPIO_FN_LCDD10, NULL);
1417 gpio_request(GPIO_FN_LCDD9, NULL);
1418 gpio_request(GPIO_FN_LCDD8, NULL);
1419 gpio_request(GPIO_FN_LCDD7, NULL);
1420 gpio_request(GPIO_FN_LCDD6, NULL);
1421 gpio_request(GPIO_FN_LCDD5, NULL);
1422 gpio_request(GPIO_FN_LCDD4, NULL);
1423 gpio_request(GPIO_FN_LCDD3, NULL);
1424 gpio_request(GPIO_FN_LCDD2, NULL);
1425 gpio_request(GPIO_FN_LCDD1, NULL);
1426 gpio_request(GPIO_FN_LCDD0, NULL);
1427 gpio_request(GPIO_FN_LCDDISP, NULL);
1428 gpio_request(GPIO_FN_LCDDCK, NULL);
1429
1430 gpio_request(GPIO_PORT31, NULL); /* backlight */
1fbdfcde 1431 gpio_direction_output(GPIO_PORT31, 0); /* off by default */
11fee467
KM		 1432
1433 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1434 gpio_direction_output(GPIO_PORT151, 1);
1435
e2a53b7c
MD		 1436 /* USBHS0 */
1437 gpio_request(GPIO_FN_VBUS0_0, NULL);
1438 gpio_pull_down(GPIO_PORT168CR); /* VBUS0_0 pull down */
1439
1440 /* USBHS1 */
1441 gpio_request(GPIO_FN_VBUS0_1, NULL);
1442 gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */
1443 gpio_request(GPIO_FN_IDIN_1_113, NULL);
1444
1a44d72a
KM		 1445 /* enable FSI2 port A (ak4643) */
1446 gpio_request(GPIO_FN_FSIAIBT, NULL);
1447 gpio_request(GPIO_FN_FSIAILR, NULL);
1448 gpio_request(GPIO_FN_FSIAISLD, NULL);
1449 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1450 gpio_request(GPIO_PORT161, NULL);
1451 gpio_direction_output(GPIO_PORT161, 0); /* slave */
1452
1453 gpio_request(GPIO_PORT9, NULL);
1454 gpio_request(GPIO_PORT10, NULL);
1455 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1456 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1457
1458 intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
1459
98d27b8a
KM		 1460 /* setup FSI2 port B (HDMI) */
1461 gpio_request(GPIO_FN_FSIBCK, NULL);
1462 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1463
1464 /* set SPU2 clock to 119.6 MHz */
1465 clk = clk_get(NULL, "spu_clk");
1466 if (!IS_ERR(clk)) {
1467 clk_set_rate(clk, clk_round_rate(clk, 119600000));
1468 clk_put(clk);
1469 }
1470
cd8ab004
TS		 1471 /* enable Keypad */
1472 gpio_request(GPIO_FN_IRQ9_42, NULL);
6845664a 1473 irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
cd8ab004 1474
6ae1e19d
TS		 1475 /* enable Touchscreen */
1476 gpio_request(GPIO_FN_IRQ7_40, NULL);
6845664a 1477 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
6ae1e19d 1478
80f1dc7c
TS		 1479 /* enable Accelerometer */
1480 gpio_request(GPIO_FN_IRQ21, NULL);
6845664a 1481 irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
1a44d72a 1482
6dff7da2
YG		 1483 /* enable SDHI0 */
1484 gpio_request(GPIO_FN_SDHICD0, NULL);
1485 gpio_request(GPIO_FN_SDHIWP0, NULL);
1486 gpio_request(GPIO_FN_SDHICMD0, NULL);
1487 gpio_request(GPIO_FN_SDHICLK0, NULL);
1488 gpio_request(GPIO_FN_SDHID0_3, NULL);
1489 gpio_request(GPIO_FN_SDHID0_2, NULL);
1490 gpio_request(GPIO_FN_SDHID0_1, NULL);
1491 gpio_request(GPIO_FN_SDHID0_0, NULL);
1492
4bff4a7e
GL		 1493 ret = request_irq(evt2irq(0x3340), mackerel_sdhi0_gpio_cd,
1494 IRQF_TRIGGER_FALLING, "sdhi0 cd", &sdhi0_device.dev);
1495 if (!ret)
1496 sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
1497 else
1498 pr_err("Cannot get IRQ #%d: %d\n", evt2irq(0x3340), ret);
1499
5bcd7517 1500#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
6dff7da2
YG		 1501 /* enable SDHI1 */
1502 gpio_request(GPIO_FN_SDHICMD1, NULL);
1503 gpio_request(GPIO_FN_SDHICLK1, NULL);
1504 gpio_request(GPIO_FN_SDHID1_3, NULL);
1505 gpio_request(GPIO_FN_SDHID1_2, NULL);
1506 gpio_request(GPIO_FN_SDHID1_1, NULL);
1507 gpio_request(GPIO_FN_SDHID1_0, NULL);
41491b9a 1508#endif
6dff7da2
YG		 1509 /* card detect pin for MMC slot (CN7) */
1510 gpio_request(GPIO_PORT41, NULL);
1511 gpio_direction_input(GPIO_PORT41);
1512
1513 /* enable SDHI2 */
1514 gpio_request(GPIO_FN_SDHICMD2, NULL);
1515 gpio_request(GPIO_FN_SDHICLK2, NULL);
1516 gpio_request(GPIO_FN_SDHID2_3, NULL);
1517 gpio_request(GPIO_FN_SDHID2_2, NULL);
1518 gpio_request(GPIO_FN_SDHID2_1, NULL);
1519 gpio_request(GPIO_FN_SDHID2_0, NULL);
1520
da5d1f4c
YG		 1521 /* card detect pin for microSD slot (CN23) */
1522 gpio_request(GPIO_PORT162, NULL);
1523 gpio_direction_input(GPIO_PORT162);
1524
41491b9a
YG		 1525 /* MMCIF */
1526 gpio_request(GPIO_FN_MMCD0_0, NULL);
1527 gpio_request(GPIO_FN_MMCD0_1, NULL);
1528 gpio_request(GPIO_FN_MMCD0_2, NULL);
1529 gpio_request(GPIO_FN_MMCD0_3, NULL);
1530 gpio_request(GPIO_FN_MMCD0_4, NULL);
1531 gpio_request(GPIO_FN_MMCD0_5, NULL);
1532 gpio_request(GPIO_FN_MMCD0_6, NULL);
1533 gpio_request(GPIO_FN_MMCD0_7, NULL);
1534 gpio_request(GPIO_FN_MMCCMD0, NULL);
1535 gpio_request(GPIO_FN_MMCCLK0, NULL);
1536
2aab52e8
BH		 1537 /* FLCTL */
1538 gpio_request(GPIO_FN_D0_NAF0, NULL);
1539 gpio_request(GPIO_FN_D1_NAF1, NULL);
1540 gpio_request(GPIO_FN_D2_NAF2, NULL);
1541 gpio_request(GPIO_FN_D3_NAF3, NULL);
1542 gpio_request(GPIO_FN_D4_NAF4, NULL);
1543 gpio_request(GPIO_FN_D5_NAF5, NULL);
1544 gpio_request(GPIO_FN_D6_NAF6, NULL);
1545 gpio_request(GPIO_FN_D7_NAF7, NULL);
1546 gpio_request(GPIO_FN_D8_NAF8, NULL);
1547 gpio_request(GPIO_FN_D9_NAF9, NULL);
1548 gpio_request(GPIO_FN_D10_NAF10, NULL);
1549 gpio_request(GPIO_FN_D11_NAF11, NULL);
1550 gpio_request(GPIO_FN_D12_NAF12, NULL);
1551 gpio_request(GPIO_FN_D13_NAF13, NULL);
1552 gpio_request(GPIO_FN_D14_NAF14, NULL);
1553 gpio_request(GPIO_FN_D15_NAF15, NULL);
1554 gpio_request(GPIO_FN_FCE0, NULL);
1555 gpio_request(GPIO_FN_WE0_FWE, NULL);
1556 gpio_request(GPIO_FN_FRB, NULL);
1557 gpio_request(GPIO_FN_A4_FOE, NULL);
1558 gpio_request(GPIO_FN_A5_FCDE, NULL);
1559 gpio_request(GPIO_FN_RD_FSC, NULL);
1560
56e78daf
YG		 1561 /* enable GPS module (GT-720F) */
1562 gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
1563 gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
1564
ae37c8de
MD		 1565 /* CEU */
1566 gpio_request(GPIO_FN_VIO_CLK, NULL);
1567 gpio_request(GPIO_FN_VIO_VD, NULL);
1568 gpio_request(GPIO_FN_VIO_HD, NULL);
1569 gpio_request(GPIO_FN_VIO_FIELD, NULL);
1570 gpio_request(GPIO_FN_VIO_CKO, NULL);
1571 gpio_request(GPIO_FN_VIO_D7, NULL);
1572 gpio_request(GPIO_FN_VIO_D6, NULL);
1573 gpio_request(GPIO_FN_VIO_D5, NULL);
1574 gpio_request(GPIO_FN_VIO_D4, NULL);
1575 gpio_request(GPIO_FN_VIO_D3, NULL);
1576 gpio_request(GPIO_FN_VIO_D2, NULL);
1577 gpio_request(GPIO_FN_VIO_D1, NULL);
1578 gpio_request(GPIO_FN_VIO_D0, NULL);
1579
12c4309b
KM		 1580 /* HDMI */
1581 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1582 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1583
1584 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1585 srcr4 = __raw_readl(SRCR4);
1586 __raw_writel(srcr4 | (1 << 13), SRCR4);
1587 udelay(50);
1588 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1589
1a44d72a
KM		 1590 i2c_register_board_info(0, i2c0_devices,
1591 ARRAY_SIZE(i2c0_devices));
80f1dc7c
TS		 1592 i2c_register_board_info(1, i2c1_devices,
1593 ARRAY_SIZE(i2c1_devices));
11fee467 1594
920adc75
KM		 1595 sh7372_add_standard_devices();
1596
1597 platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
2ce51f8b 1598
e3e01091
RW		 1599 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
1600 sh7372_add_device_to_domain(&sh7372_a4lc, &hdmi_lcdc_device);
91142bfe 1601 sh7372_add_device_to_domain(&sh7372_a4lc, &meram_device);
c1ba5bb5 1602 sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
d93f5cde
MD		 1603 sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs0_device);
1604 sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs1_device);
2aab52e8 1605 sh7372_add_device_to_domain(&sh7372_a3sp, &nand_flash_device);
d93f5cde
MD		 1606 sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
1607 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
1608#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1609 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
1610#endif
1611 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi2_device);
382414b9 1612 sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
e3e01091 1613
2ce51f8b 1614 hdmi_init_pm_clock();
97991657 1615 sh7372_pm_init();
a41b6466 1616 pm_clk_add(&fsi_device.dev, "spu2");
5c3f96b2 1617 pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
920adc75
KM		 1618}
1619
920adc75 1620MACHINE_START(MACKEREL, "mackerel")
426f1af9 1621 .map_io = sh7372_map_io,
5d7220ec 1622 .init_early = sh7372_add_early_devices,
920adc75 1623 .init_irq = sh7372_init_irq,
863b1719 1624 .handle_irq = shmobile_handle_irq_intc,
920adc75 1625 .init_machine = mackerel_init,
21cc1b7e 1626 .init_late = shmobile_init_late,
17254bff 1627 .timer = &shmobile_timer,
920adc75 1628MACHINE_END
Linux kernel - Deliverables
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