projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| bd5a875d MD |
1 | /* |
| 2 | * SMP support for Emma Mobile EV2 | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Renesas Solutions Corp. | |
| 5 | * Copyright (C) 2012 Magnus Damm | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify | |
| 8 | * it under the terms of the GNU General Public License as published by | |
| 9 | * the Free Software Foundation; version 2 of the License. | |
| 10 | * | |
| 11 | * This program is distributed in the hope that it will be useful, | |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | * GNU General Public License for more details. | |
| 15 | * | |
| 16 | * You should have received a copy of the GNU General Public License | |
| 17 | * along with this program; if not, write to the Free Software | |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
| 19 | */ | |
| 20 | #include <linux/kernel.h> | |
| 21 | #include <linux/init.h> | |
| 22 | #include <linux/smp.h> | |
| 23 | #include <linux/spinlock.h> | |
| 24 | #include <linux/io.h> | |
| 25 | #include <linux/delay.h> | |
| 26 | #include <mach/common.h> | |
| 27 | #include <mach/emev2.h> | |
| 28 | #include <asm/smp_plat.h> | |
| 29 | #include <asm/smp_scu.h> | |
| bd5a875d MD |
30 | |
| 31 | #define EMEV2_SCU_BASE 0x1e000000 | |
| 32 | ||
| a62580e5 | 33 | static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle) |
| bd5a875d | 34 | { |
| 1af4b3fa | 35 | arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu))); |
| bd5a875d MD |
36 | return 0; |
| 37 | } | |
| 38 | ||
| a62580e5 | 39 | static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) |
| bd5a875d | 40 | { |
| d8a28ed1 | 41 | scu_enable(shmobile_scu_base); |
| bd5a875d | 42 | |
| 1af4b3fa MD |
43 | /* Tell ROM loader about our vector (in headsmp-scu.S) */ |
| 44 | emev2_set_boot_vector(__pa(shmobile_secondary_vector_scu)); | |
| da252b8e | 45 | |
| 1af4b3fa MD |
46 | /* enable cache coherency on booting CPU */ |
| 47 | scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL); | |
| bd5a875d | 48 | } |
| a62580e5 MZ |
49 | |
| 50 | static void __init emev2_smp_init_cpus(void) | |
| 51 | { | |
| 2f747dba MD |
52 | unsigned int ncores; |
| 53 | ||
| 1af4b3fa MD |
54 | /* setup EMEV2 specific SCU base */ |
| 55 | shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE); | |
| 56 | emev2_clock_init(); /* need ioremapped SMU */ | |
| 2f747dba | 57 | |
| d8a28ed1 | 58 | ncores = shmobile_scu_base ? scu_get_core_count(shmobile_scu_base) : 1; |
| a62580e5 MZ |
59 | |
| 60 | shmobile_smp_init_cpus(ncores); | |
| 61 | } | |
| 62 | ||
| 63 | struct smp_operations emev2_smp_ops __initdata = { | |
| 64 | .smp_init_cpus = emev2_smp_init_cpus, | |
| 65 | .smp_prepare_cpus = emev2_smp_prepare_cpus, | |
| a62580e5 | 66 | .smp_boot_secondary = emev2_boot_secondary, |
| a62580e5 | 67 | }; |