ARM: shmobile: r8a7779: Cleanup header file
[deliverable/linux.git] / arch / arm / mach-shmobile / timer.c
CommitLineData
c793c1b0
MD
1/*
2 * SH-Mobile Timer
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2002 - 2009 Paul Mundt
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
c793c1b0
MD
15 */
16#include <linux/platform_device.h>
0583fe47 17#include <linux/clocksource.h>
0f2c9f20 18#include <linux/delay.h>
c39dae38 19#include <linux/of_address.h>
c793c1b0 20
7dd4cfd7
MD
21static void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
22 unsigned int mult, unsigned int div)
f492b817
SH
23{
24 /* calculate a worst-case loops-per-jiffy value
25 * based on maximum cpu core hz setting and the
26 * __delay() implementation in arch/arm/lib/delay.S
27 *
28 * this will result in a longer delay than expected
29 * when the cpu core runs on lower frequencies.
30 */
31
32 unsigned int value = HZ * div / mult;
33
34 if (!preset_lpj)
35 preset_lpj = max_cpu_core_hz / value;
36}
37
c39dae38
MD
38void __init shmobile_init_delay(void)
39{
edc8fb1d 40 struct device_node *np, *cpus;
0dc50fd3 41 bool is_a7_a8_a9 = false;
edc8fb1d 42 bool is_a15 = false;
27f3c708 43 bool has_arch_timer = false;
edc8fb1d
LP
44 u32 max_freq = 0;
45
46 cpus = of_find_node_by_path("/cpus");
47 if (!cpus)
48 return;
49
50 for_each_child_of_node(cpus, np) {
51 u32 freq;
52
53 if (!of_property_read_u32(np, "clock-frequency", &freq))
54 max_freq = max(max_freq, freq);
c39dae38 55
27f3c708
MD
56 if (of_device_is_compatible(np, "arm,cortex-a8") ||
57 of_device_is_compatible(np, "arm,cortex-a9")) {
0dc50fd3 58 is_a7_a8_a9 = true;
27f3c708
MD
59 } else if (of_device_is_compatible(np, "arm,cortex-a7")) {
60 is_a7_a8_a9 = true;
61 has_arch_timer = true;
62 } else if (of_device_is_compatible(np, "arm,cortex-a15")) {
edc8fb1d 63 is_a15 = true;
27f3c708
MD
64 has_arch_timer = true;
65 }
c39dae38 66 }
edc8fb1d
LP
67
68 of_node_put(cpus);
69
70 if (!max_freq)
71 return;
72
974b072f
MD
73#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
74 /* Non-multiplatform r8a73a4 SoC cannot use arch timer due
75 * to GIC being initialized from C and arch timer via DT */
76 if (of_machine_is_compatible("renesas,r8a73a4"))
77 has_arch_timer = false;
77cf5166
MD
78
79 /* Non-multiplatform r8a7790 SoC cannot use arch timer due
80 * to GIC being initialized from C and arch timer via DT */
81 if (of_machine_is_compatible("renesas,r8a7790"))
82 has_arch_timer = false;
974b072f
MD
83#endif
84
27f3c708
MD
85 if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
86 if (is_a7_a8_a9)
87 shmobile_setup_delay_hz(max_freq, 1, 3);
88 else if (is_a15)
89 shmobile_setup_delay_hz(max_freq, 2, 4);
90 }
c39dae38
MD
91}
92
c793c1b0
MD
93static void __init shmobile_late_time_init(void)
94{
95 /*
96 * Make sure all compiled-in early timers register themselves.
97 *
98 * Run probe() for two "earlytimer" devices, these will be the
99 * clockevents and clocksource devices respectively. In the event
100 * that only a clockevents device is available, we -ENODEV on the
101 * clocksource and the jiffies clocksource is used transparently
102 * instead. No error handling is necessary here.
103 */
104 early_platform_driver_register_all("earlytimer");
105 early_platform_driver_probe("earlytimer", 2, 0);
106}
107
08ad42fb 108void __init shmobile_earlytimer_init(void)
c793c1b0
MD
109{
110 late_time_init = shmobile_late_time_init;
111}
112
This page took 0.270578 seconds and 5 git commands to generate.