[deliverable/linux.git] / arch / arm / mach-spear / spear13xx.c

/*
 * arch/arm/mach-spear13xx/spear13xx.c
 *
 * SPEAr13XX machines common source file
 *
 * Copyright (C) 2012 ST Microelectronics
 * Viresh Kumar <viresh.linux@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#define pr_fmt(fmt) "SPEAr13xx: " fmt

#include <linux/amba/pl022.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/of.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/map.h>
#include <asm/smp_twd.h>
#include "generic.h"
#include <mach/spear.h>

void __init spear13xx_l2x0_init(void)
{
	/*
	 * 512KB (64KB/way), 8-way associativity, parity supported
	 *
	 * FIXME: 9th bit, of Auxillary Controller register must be set
	 * for some spear13xx devices for stable L2 operation.
	 *
	 * Enable Early BRESP, L2 prefetch for Instruction and Data,
	 * write alloc and 'Full line of zero' options
	 *
	 */

	writel_relaxed(0x06, VA_L2CC_BASE + L2X0_PREFETCH_CTRL);

	/*
	 * Program following latencies in order to make
	 * SPEAr1340 work at 600 MHz
	 */
	writel_relaxed(0x221, VA_L2CC_BASE + L2X0_TAG_LATENCY_CTRL);
	writel_relaxed(0x441, VA_L2CC_BASE + L2X0_DATA_LATENCY_CTRL);
	l2x0_init(VA_L2CC_BASE, 0x70A60001, 0xfe00ffff);
}

/*
 * Following will create 16MB static virtual/physical mappings
 * PHYSICAL		VIRTUAL
 * 0xB3000000		0xFE000000
 * 0xE0000000		0xFD000000
 * 0xEC000000		0xFC000000
 * 0xED000000		0xFB000000
 */
struct map_desc spear13xx_io_desc[] __initdata = {
	{
		.virtual	= (unsigned long)VA_PERIP_GRP2_BASE,
		.pfn		= __phys_to_pfn(PERIP_GRP2_BASE),
		.length		= SZ_16M,
		.type		= MT_DEVICE
	}, {
		.virtual	= (unsigned long)VA_PERIP_GRP1_BASE,
		.pfn		= __phys_to_pfn(PERIP_GRP1_BASE),
		.length		= SZ_16M,
		.type		= MT_DEVICE
	}, {
		.virtual	= (unsigned long)VA_A9SM_AND_MPMC_BASE,
		.pfn		= __phys_to_pfn(A9SM_AND_MPMC_BASE),
		.length		= SZ_16M,
		.type		= MT_DEVICE
	}, {
		.virtual	= (unsigned long)VA_L2CC_BASE,
		.pfn		= __phys_to_pfn(L2CC_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE
	},
};

/* This will create static memory mapping for selected devices */
void __init spear13xx_map_io(void)
{
	iotable_init(spear13xx_io_desc, ARRAY_SIZE(spear13xx_io_desc));
}

static void __init spear13xx_clk_init(void)
{
	if (of_machine_is_compatible("st,spear1310"))
		spear1310_clk_init(VA_MISC_BASE, VA_SPEAR1310_RAS_BASE);
	else if (of_machine_is_compatible("st,spear1340"))
		spear1340_clk_init(VA_MISC_BASE);
	else
		pr_err("%s: Unknown machine\n", __func__);
}

void __init spear13xx_timer_init(void)
{
	char pclk_name[] = "osc_24m_clk";
	struct clk *gpt_clk, *pclk;

	spear13xx_clk_init();

	/* get the system timer clock */
	gpt_clk = clk_get_sys("gpt0", NULL);
	if (IS_ERR(gpt_clk)) {
		pr_err("%s:couldn't get clk for gpt\n", __func__);
		BUG();
	}

	/* get the suitable parent clock for timer*/
	pclk = clk_get(NULL, pclk_name);
	if (IS_ERR(pclk)) {
		pr_err("%s:couldn't get %s as parent for gpt\n", __func__,
				pclk_name);
		BUG();
	}

	clk_set_parent(gpt_clk, pclk);
	clk_put(gpt_clk);
	clk_put(pclk);

	spear_setup_of_timer();
	twd_local_timer_of_register();
}
Commit	Line	Data
e3978dc7 VK	1	/*
	2	* arch/arm/mach-spear13xx/spear13xx.c
	3	*
	4	* SPEAr13XX machines common source file
	5	*
	6	* Copyright (C) 2012 ST Microelectronics
10d8935f	7	* Viresh Kumar <viresh.linux@gmail.com>
e3978dc7 VK	8	*
	9	* This file is licensed under the terms of the GNU General Public
	10	* License version 2. This program is licensed "as is" without any
	11	* warranty of any kind, whether express or implied.
	12	*/
	13
	14	#define pr_fmt(fmt) "SPEAr13xx: " fmt
	15
	16	#include <linux/amba/pl022.h>
	17	#include <linux/clk.h>
e3978dc7	18	#include <linux/err.h>
0529e315	19	#include <linux/of.h>
e3978dc7	20	#include <asm/hardware/cache-l2x0.h>
e3978dc7 VK	21	#include <asm/mach/map.h>
e3978dc7 VK	22	#include <asm/smp_twd.h>
2b9c613c	23	#include "generic.h"
e3978dc7 VK	24	#include <mach/spear.h>
e3978dc7 VK	25
e3978dc7 VK	26	void __init spear13xx_l2x0_init(void)
	27	{
	28	/*
	29	* 512KB (64KB/way), 8-way associativity, parity supported
	30	*
	31	* FIXME: 9th bit, of Auxillary Controller register must be set
	32	* for some spear13xx devices for stable L2 operation.
	33	*
	34	* Enable Early BRESP, L2 prefetch for Instruction and Data,
	35	* write alloc and 'Full line of zero' options
	36	*
	37	*/
	38
	39	writel_relaxed(0x06, VA_L2CC_BASE + L2X0_PREFETCH_CTRL);
	40
	41	/*
	42	* Program following latencies in order to make
	43	* SPEAr1340 work at 600 MHz
	44	*/
	45	writel_relaxed(0x221, VA_L2CC_BASE + L2X0_TAG_LATENCY_CTRL);
	46	writel_relaxed(0x441, VA_L2CC_BASE + L2X0_DATA_LATENCY_CTRL);
	47	l2x0_init(VA_L2CC_BASE, 0x70A60001, 0xfe00ffff);
	48	}
	49
	50	/*
	51	* Following will create 16MB static virtual/physical mappings
	52	* PHYSICAL VIRTUAL
	53	* 0xB3000000 0xFE000000
	54	* 0xE0000000 0xFD000000
	55	* 0xEC000000 0xFC000000
	56	* 0xED000000 0xFB000000
	57	*/
	58	struct map_desc spear13xx_io_desc[] __initdata = {
	59	{
009a01e3	60	.virtual = (unsigned long)VA_PERIP_GRP2_BASE,
e3978dc7 VK	61	.pfn = __phys_to_pfn(PERIP_GRP2_BASE),
	62	.length = SZ_16M,
	63	.type = MT_DEVICE
	64	}, {
009a01e3	65	.virtual = (unsigned long)VA_PERIP_GRP1_BASE,
e3978dc7 VK	66	.pfn = __phys_to_pfn(PERIP_GRP1_BASE),
	67	.length = SZ_16M,
	68	.type = MT_DEVICE
	69	}, {
009a01e3	70	.virtual = (unsigned long)VA_A9SM_AND_MPMC_BASE,
e3978dc7 VK	71	.pfn = __phys_to_pfn(A9SM_AND_MPMC_BASE),
	72	.length = SZ_16M,
	73	.type = MT_DEVICE
	74	}, {
	75	.virtual = (unsigned long)VA_L2CC_BASE,
	76	.pfn = __phys_to_pfn(L2CC_BASE),
	77	.length = SZ_4K,
	78	.type = MT_DEVICE
	79	},
	80	};
	81
	82	/* This will create static memory mapping for selected devices */
	83	void __init spear13xx_map_io(void)
	84	{
	85	iotable_init(spear13xx_io_desc, ARRAY_SIZE(spear13xx_io_desc));
	86	}
	87
	88	static void __init spear13xx_clk_init(void)
	89	{
	90	if (of_machine_is_compatible("st,spear1310"))
d9909ebe	91	spear1310_clk_init(VA_MISC_BASE, VA_SPEAR1310_RAS_BASE);
e3978dc7	92	else if (of_machine_is_compatible("st,spear1340"))
d9909ebe	93	spear1340_clk_init(VA_MISC_BASE);
e3978dc7 VK	94	else
	95	pr_err("%s: Unknown machine\n", __func__);
	96	}
	97
6bb27d73	98	void __init spear13xx_timer_init(void)
e3978dc7 VK	99	{
	100	char pclk_name[] = "osc_24m_clk";
	101	struct clk gpt_clk, pclk;
	102
	103	spear13xx_clk_init();
	104
	105	/* get the system timer clock */
	106	gpt_clk = clk_get_sys("gpt0", NULL);
	107	if (IS_ERR(gpt_clk)) {
	108	pr_err("%s:couldn't get clk for gpt\n", __func__);
	109	BUG();
	110	}
	111
	112	/* get the suitable parent clock for timer*/
	113	pclk = clk_get(NULL, pclk_name);
	114	if (IS_ERR(pclk)) {
	115	pr_err("%s:couldn't get %s as parent for gpt\n", __func__,
	116	pclk_name);
	117	BUG();
	118	}
	119
	120	clk_set_parent(gpt_clk, pclk);
	121	clk_put(gpt_clk);
	122	clk_put(pclk);
	123
	124	spear_setup_of_timer();
	125	twd_local_timer_of_register();
	126	}