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e3978dc7 VK |
1 | /* |
2 | * arch/arm/mach-spear13xx/spear13xx.c | |
3 | * | |
4 | * SPEAr13XX machines common source file | |
5 | * | |
6 | * Copyright (C) 2012 ST Microelectronics | |
da89947b | 7 | * Viresh Kumar <vireshk@kernel.org> |
e3978dc7 VK |
8 | * |
9 | * This file is licensed under the terms of the GNU General Public | |
10 | * License version 2. This program is licensed "as is" without any | |
11 | * warranty of any kind, whether express or implied. | |
12 | */ | |
13 | ||
14 | #define pr_fmt(fmt) "SPEAr13xx: " fmt | |
15 | ||
16 | #include <linux/amba/pl022.h> | |
17 | #include <linux/clk.h> | |
da4a686a | 18 | #include <linux/clocksource.h> |
e3978dc7 | 19 | #include <linux/err.h> |
0529e315 | 20 | #include <linux/of.h> |
e3978dc7 | 21 | #include <asm/hardware/cache-l2x0.h> |
e3978dc7 | 22 | #include <asm/mach/map.h> |
e3978dc7 | 23 | #include <mach/spear.h> |
442a33eb | 24 | #include "generic.h" |
e3978dc7 | 25 | |
e3978dc7 VK |
26 | void __init spear13xx_l2x0_init(void) |
27 | { | |
28 | /* | |
29 | * 512KB (64KB/way), 8-way associativity, parity supported | |
30 | * | |
31 | * FIXME: 9th bit, of Auxillary Controller register must be set | |
32 | * for some spear13xx devices for stable L2 operation. | |
33 | * | |
34 | * Enable Early BRESP, L2 prefetch for Instruction and Data, | |
35 | * write alloc and 'Full line of zero' options | |
36 | * | |
37 | */ | |
6343b05f AB |
38 | if (!IS_ENABLED(CONFIG_CACHE_L2X0)) |
39 | return; | |
e3978dc7 | 40 | |
1a5a954c | 41 | writel_relaxed(0x06, VA_L2CC_BASE + L310_PREFETCH_CTRL); |
e3978dc7 VK |
42 | |
43 | /* | |
44 | * Program following latencies in order to make | |
45 | * SPEAr1340 work at 600 MHz | |
46 | */ | |
1a5a954c RK |
47 | writel_relaxed(0x221, VA_L2CC_BASE + L310_TAG_LATENCY_CTRL); |
48 | writel_relaxed(0x441, VA_L2CC_BASE + L310_DATA_LATENCY_CTRL); | |
adf4b00e | 49 | l2x0_init(VA_L2CC_BASE, 0x30a00001, 0xfe0fffff); |
e3978dc7 VK |
50 | } |
51 | ||
52 | /* | |
53 | * Following will create 16MB static virtual/physical mappings | |
54 | * PHYSICAL VIRTUAL | |
36c5c90d | 55 | * 0xB3000000 0xF9000000 |
e3978dc7 VK |
56 | * 0xE0000000 0xFD000000 |
57 | * 0xEC000000 0xFC000000 | |
58 | * 0xED000000 0xFB000000 | |
59 | */ | |
3da1d7b1 | 60 | static struct map_desc spear13xx_io_desc[] __initdata = { |
e3978dc7 | 61 | { |
009a01e3 | 62 | .virtual = (unsigned long)VA_PERIP_GRP2_BASE, |
e3978dc7 VK |
63 | .pfn = __phys_to_pfn(PERIP_GRP2_BASE), |
64 | .length = SZ_16M, | |
65 | .type = MT_DEVICE | |
66 | }, { | |
009a01e3 | 67 | .virtual = (unsigned long)VA_PERIP_GRP1_BASE, |
e3978dc7 VK |
68 | .pfn = __phys_to_pfn(PERIP_GRP1_BASE), |
69 | .length = SZ_16M, | |
70 | .type = MT_DEVICE | |
71 | }, { | |
009a01e3 | 72 | .virtual = (unsigned long)VA_A9SM_AND_MPMC_BASE, |
e3978dc7 VK |
73 | .pfn = __phys_to_pfn(A9SM_AND_MPMC_BASE), |
74 | .length = SZ_16M, | |
75 | .type = MT_DEVICE | |
76 | }, { | |
77 | .virtual = (unsigned long)VA_L2CC_BASE, | |
78 | .pfn = __phys_to_pfn(L2CC_BASE), | |
79 | .length = SZ_4K, | |
80 | .type = MT_DEVICE | |
81 | }, | |
82 | }; | |
83 | ||
84 | /* This will create static memory mapping for selected devices */ | |
85 | void __init spear13xx_map_io(void) | |
86 | { | |
87 | iotable_init(spear13xx_io_desc, ARRAY_SIZE(spear13xx_io_desc)); | |
88 | } | |
89 | ||
90 | static void __init spear13xx_clk_init(void) | |
91 | { | |
92 | if (of_machine_is_compatible("st,spear1310")) | |
d9909ebe | 93 | spear1310_clk_init(VA_MISC_BASE, VA_SPEAR1310_RAS_BASE); |
e3978dc7 | 94 | else if (of_machine_is_compatible("st,spear1340")) |
d9909ebe | 95 | spear1340_clk_init(VA_MISC_BASE); |
e3978dc7 VK |
96 | else |
97 | pr_err("%s: Unknown machine\n", __func__); | |
98 | } | |
99 | ||
6bb27d73 | 100 | void __init spear13xx_timer_init(void) |
e3978dc7 VK |
101 | { |
102 | char pclk_name[] = "osc_24m_clk"; | |
103 | struct clk *gpt_clk, *pclk; | |
104 | ||
105 | spear13xx_clk_init(); | |
106 | ||
107 | /* get the system timer clock */ | |
108 | gpt_clk = clk_get_sys("gpt0", NULL); | |
109 | if (IS_ERR(gpt_clk)) { | |
110 | pr_err("%s:couldn't get clk for gpt\n", __func__); | |
111 | BUG(); | |
112 | } | |
113 | ||
114 | /* get the suitable parent clock for timer*/ | |
115 | pclk = clk_get(NULL, pclk_name); | |
116 | if (IS_ERR(pclk)) { | |
117 | pr_err("%s:couldn't get %s as parent for gpt\n", __func__, | |
118 | pclk_name); | |
119 | BUG(); | |
120 | } | |
121 | ||
122 | clk_set_parent(gpt_clk, pclk); | |
123 | clk_put(gpt_clk); | |
124 | clk_put(pclk); | |
125 | ||
126 | spear_setup_of_timer(); | |
da4a686a | 127 | clocksource_of_init(); |
e3978dc7 | 128 | } |