ARM: SPEAr3xx: Add device-tree support to SPEAr3xx architecture
[deliverable/linux.git] / arch / arm / mach-spear3xx / spear300.c
CommitLineData
bc4e814e 1/*
2 * arch/arm/mach-spear3xx/spear300.c
3 *
4 * SPEAr300 machine source file
5 *
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6 * Copyright (C) 2009-2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com>
bc4e814e 8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
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14#define pr_fmt(fmt) "SPEAr300: " fmt
15
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16#include <linux/of_platform.h>
17#include <asm/hardware/vic.h>
18#include <asm/mach/arch.h>
410782be 19#include <plat/shirq.h>
bc4e814e 20#include <mach/generic.h>
02aa06bc 21#include <mach/hardware.h>
bc4e814e 22
70f4c0bf 23/* pad multiplexing support */
24/* muxing registers */
25#define PAD_MUX_CONFIG_REG 0x00
26#define MODE_CONFIG_REG 0x04
27
28/* modes */
29#define NAND_MODE (1 << 0)
30#define NOR_MODE (1 << 1)
31#define PHOTO_FRAME_MODE (1 << 2)
32#define LEND_IP_PHONE_MODE (1 << 3)
33#define HEND_IP_PHONE_MODE (1 << 4)
34#define LEND_WIFI_PHONE_MODE (1 << 5)
35#define HEND_WIFI_PHONE_MODE (1 << 6)
36#define ATA_PABX_WI2S_MODE (1 << 7)
37#define ATA_PABX_I2S_MODE (1 << 8)
38#define CAML_LCDW_MODE (1 << 9)
39#define CAMU_LCD_MODE (1 << 10)
40#define CAMU_WLCD_MODE (1 << 11)
41#define CAML_LCD_MODE (1 << 12)
42#define ALL_MODES 0x1FFF
43
6618c3ad 44struct pmx_mode spear300_nand_mode = {
70f4c0bf 45 .id = NAND_MODE,
46 .name = "nand mode",
47 .mask = 0x00,
48};
49
6618c3ad 50struct pmx_mode spear300_nor_mode = {
70f4c0bf 51 .id = NOR_MODE,
52 .name = "nor mode",
53 .mask = 0x01,
54};
55
6618c3ad 56struct pmx_mode spear300_photo_frame_mode = {
70f4c0bf 57 .id = PHOTO_FRAME_MODE,
58 .name = "photo frame mode",
59 .mask = 0x02,
60};
61
6618c3ad 62struct pmx_mode spear300_lend_ip_phone_mode = {
70f4c0bf 63 .id = LEND_IP_PHONE_MODE,
64 .name = "lend ip phone mode",
65 .mask = 0x03,
66};
67
6618c3ad 68struct pmx_mode spear300_hend_ip_phone_mode = {
70f4c0bf 69 .id = HEND_IP_PHONE_MODE,
70 .name = "hend ip phone mode",
71 .mask = 0x04,
72};
73
6618c3ad 74struct pmx_mode spear300_lend_wifi_phone_mode = {
70f4c0bf 75 .id = LEND_WIFI_PHONE_MODE,
76 .name = "lend wifi phone mode",
77 .mask = 0x05,
78};
79
6618c3ad 80struct pmx_mode spear300_hend_wifi_phone_mode = {
70f4c0bf 81 .id = HEND_WIFI_PHONE_MODE,
82 .name = "hend wifi phone mode",
83 .mask = 0x06,
84};
85
6618c3ad 86struct pmx_mode spear300_ata_pabx_wi2s_mode = {
70f4c0bf 87 .id = ATA_PABX_WI2S_MODE,
88 .name = "ata pabx wi2s mode",
89 .mask = 0x07,
90};
91
6618c3ad 92struct pmx_mode spear300_ata_pabx_i2s_mode = {
70f4c0bf 93 .id = ATA_PABX_I2S_MODE,
94 .name = "ata pabx i2s mode",
95 .mask = 0x08,
96};
97
6618c3ad 98struct pmx_mode spear300_caml_lcdw_mode = {
70f4c0bf 99 .id = CAML_LCDW_MODE,
100 .name = "caml lcdw mode",
101 .mask = 0x0C,
102};
103
6618c3ad 104struct pmx_mode spear300_camu_lcd_mode = {
70f4c0bf 105 .id = CAMU_LCD_MODE,
106 .name = "camu lcd mode",
107 .mask = 0x0D,
108};
109
6618c3ad 110struct pmx_mode spear300_camu_wlcd_mode = {
70f4c0bf 111 .id = CAMU_WLCD_MODE,
112 .name = "camu wlcd mode",
113 .mask = 0x0E,
114};
115
6618c3ad 116struct pmx_mode spear300_caml_lcd_mode = {
70f4c0bf 117 .id = CAML_LCD_MODE,
118 .name = "caml lcd mode",
119 .mask = 0x0F,
120};
121
122/* devices */
6618c3ad 123static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
70f4c0bf 124 {
125 .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
126 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
127 .mask = PMX_FIRDA_MASK,
128 },
129};
130
6618c3ad 131struct pmx_dev spear300_pmx_fsmc_2_chips = {
70f4c0bf 132 .name = "fsmc_2_chips",
133 .modes = pmx_fsmc_2_chips_modes,
134 .mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),
135 .enb_on_reset = 1,
136};
137
6618c3ad 138static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
70f4c0bf 139 {
140 .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
141 ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
142 .mask = PMX_FIRDA_MASK | PMX_UART0_MASK,
143 },
144};
145
6618c3ad 146struct pmx_dev spear300_pmx_fsmc_4_chips = {
70f4c0bf 147 .name = "fsmc_4_chips",
148 .modes = pmx_fsmc_4_chips_modes,
149 .mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),
150 .enb_on_reset = 1,
151};
152
6618c3ad 153static struct pmx_dev_mode pmx_keyboard_modes[] = {
70f4c0bf 154 {
155 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
156 LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
157 CAML_LCDW_MODE | CAMU_LCD_MODE | CAMU_WLCD_MODE |
158 CAML_LCD_MODE,
159 .mask = 0x0,
160 },
161};
162
6618c3ad 163struct pmx_dev spear300_pmx_keyboard = {
70f4c0bf 164 .name = "keyboard",
165 .modes = pmx_keyboard_modes,
166 .mode_count = ARRAY_SIZE(pmx_keyboard_modes),
167 .enb_on_reset = 1,
168};
169
6618c3ad 170static struct pmx_dev_mode pmx_clcd_modes[] = {
70f4c0bf 171 {
172 .ids = PHOTO_FRAME_MODE,
173 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK ,
174 }, {
175 .ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE |
176 CAMU_LCD_MODE | CAML_LCD_MODE,
177 .mask = PMX_TIMER_3_4_MASK,
178 },
179};
180
6618c3ad 181struct pmx_dev spear300_pmx_clcd = {
70f4c0bf 182 .name = "clcd",
183 .modes = pmx_clcd_modes,
184 .mode_count = ARRAY_SIZE(pmx_clcd_modes),
185 .enb_on_reset = 1,
186};
187
6618c3ad 188static struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
70f4c0bf 189 {
190 .ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,
191 .mask = PMX_MII_MASK,
192 }, {
193 .ids = LEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE,
194 .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
195 }, {
196 .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_WLCD_MODE,
197 .mask = PMX_MII_MASK | PMX_TIMER_3_4_MASK,
198 }, {
199 .ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE,
200 .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK,
201 }, {
202 .ids = ATA_PABX_WI2S_MODE,
203 .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK
204 | PMX_UART0_MODEM_MASK,
205 },
206};
207
6618c3ad 208struct pmx_dev spear300_pmx_telecom_gpio = {
70f4c0bf 209 .name = "telecom_gpio",
210 .modes = pmx_telecom_gpio_modes,
211 .mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),
212 .enb_on_reset = 1,
213};
214
6618c3ad 215static struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
70f4c0bf 216 {
217 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
218 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE
219 | HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE
220 | ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
221 | CAMU_WLCD_MODE | CAML_LCD_MODE,
222 .mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,
223 },
224};
225
6618c3ad 226struct pmx_dev spear300_pmx_telecom_tdm = {
70f4c0bf 227 .name = "telecom_tdm",
228 .modes = pmx_telecom_tdm_modes,
229 .mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),
230 .enb_on_reset = 1,
231};
232
6618c3ad 233static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
70f4c0bf 234 {
235 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
236 LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE
237 | ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE |
238 CAML_LCDW_MODE | CAML_LCD_MODE,
239 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
240 },
241};
242
6618c3ad 243struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk = {
70f4c0bf 244 .name = "telecom_spi_cs_i2c_clk",
245 .modes = pmx_telecom_spi_cs_i2c_clk_modes,
246 .mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),
247 .enb_on_reset = 1,
248};
249
6618c3ad 250static struct pmx_dev_mode pmx_telecom_camera_modes[] = {
70f4c0bf 251 {
252 .ids = CAML_LCDW_MODE | CAML_LCD_MODE,
253 .mask = PMX_MII_MASK,
254 }, {
255 .ids = CAMU_LCD_MODE | CAMU_WLCD_MODE,
256 .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | PMX_MII_MASK,
257 },
258};
259
6618c3ad 260struct pmx_dev spear300_pmx_telecom_camera = {
70f4c0bf 261 .name = "telecom_camera",
262 .modes = pmx_telecom_camera_modes,
263 .mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),
264 .enb_on_reset = 1,
265};
266
6618c3ad 267static struct pmx_dev_mode pmx_telecom_dac_modes[] = {
70f4c0bf 268 {
269 .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
270 | CAMU_WLCD_MODE | CAML_LCD_MODE,
271 .mask = PMX_TIMER_1_2_MASK,
272 },
273};
274
6618c3ad 275struct pmx_dev spear300_pmx_telecom_dac = {
70f4c0bf 276 .name = "telecom_dac",
277 .modes = pmx_telecom_dac_modes,
278 .mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),
279 .enb_on_reset = 1,
280};
281
6618c3ad 282static struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
70f4c0bf 283 {
284 .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
285 | LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
286 ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
287 | CAMU_WLCD_MODE | CAML_LCD_MODE,
288 .mask = PMX_UART0_MODEM_MASK,
289 },
290};
291
6618c3ad 292struct pmx_dev spear300_pmx_telecom_i2s = {
70f4c0bf 293 .name = "telecom_i2s",
294 .modes = pmx_telecom_i2s_modes,
295 .mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),
296 .enb_on_reset = 1,
297};
298
6618c3ad 299static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
70f4c0bf 300 {
301 .ids = NAND_MODE | NOR_MODE,
302 .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
303 PMX_TIMER_3_4_MASK,
304 },
305};
306
6618c3ad 307struct pmx_dev spear300_pmx_telecom_boot_pins = {
70f4c0bf 308 .name = "telecom_boot_pins",
309 .modes = pmx_telecom_boot_pins_modes,
310 .mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),
311 .enb_on_reset = 1,
312};
313
6618c3ad 314static struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
70f4c0bf 315 {
316 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
317 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
318 HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
319 CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE |
320 ATA_PABX_I2S_MODE,
321 .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
322 PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
323 PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
324 },
325};
326
6618c3ad 327struct pmx_dev spear300_pmx_telecom_sdhci_4bit = {
069580b8 328 .name = "telecom_sdhci_4bit",
329 .modes = pmx_telecom_sdhci_4bit_modes,
330 .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes),
70f4c0bf 331 .enb_on_reset = 1,
332};
333
6618c3ad 334static struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
70f4c0bf 335 {
336 .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
337 HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
338 HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
339 CAMU_WLCD_MODE | CAML_LCD_MODE,
340 .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
341 PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
342 PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,
343 },
344};
345
6618c3ad 346struct pmx_dev spear300_pmx_telecom_sdhci_8bit = {
069580b8 347 .name = "telecom_sdhci_8bit",
348 .modes = pmx_telecom_sdhci_8bit_modes,
349 .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes),
70f4c0bf 350 .enb_on_reset = 1,
351};
352
6618c3ad 353static struct pmx_dev_mode pmx_gpio1_modes[] = {
70f4c0bf 354 {
355 .ids = PHOTO_FRAME_MODE,
356 .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
357 PMX_TIMER_3_4_MASK,
358 },
359};
360
6618c3ad 361struct pmx_dev spear300_pmx_gpio1 = {
70f4c0bf 362 .name = "arm gpio1",
363 .modes = pmx_gpio1_modes,
364 .mode_count = ARRAY_SIZE(pmx_gpio1_modes),
365 .enb_on_reset = 1,
366};
367
368/* pmx driver structure */
6618c3ad 369static struct pmx_driver pmx_driver = {
70f4c0bf 370 .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f},
371 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
372};
373
4c18e77f 374/* spear3xx shared irq */
f6558bf9 375static struct shirq_dev_config shirq_ras1_config[] = {
4c18e77f 376 {
61e72bca
RM
377 .virq = SPEAR300_VIRQ_IT_PERS_S,
378 .enb_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
379 .status_mask = SPEAR300_IT_PERS_S_IRQ_MASK,
4c18e77f 380 }, {
61e72bca
RM
381 .virq = SPEAR300_VIRQ_IT_CHANGE_S,
382 .enb_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
383 .status_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK,
4c18e77f 384 }, {
61e72bca
RM
385 .virq = SPEAR300_VIRQ_I2S,
386 .enb_mask = SPEAR300_I2S_IRQ_MASK,
387 .status_mask = SPEAR300_I2S_IRQ_MASK,
4c18e77f 388 }, {
61e72bca
RM
389 .virq = SPEAR300_VIRQ_TDM,
390 .enb_mask = SPEAR300_TDM_IRQ_MASK,
391 .status_mask = SPEAR300_TDM_IRQ_MASK,
4c18e77f 392 }, {
61e72bca
RM
393 .virq = SPEAR300_VIRQ_CAMERA_L,
394 .enb_mask = SPEAR300_CAMERA_L_IRQ_MASK,
395 .status_mask = SPEAR300_CAMERA_L_IRQ_MASK,
4c18e77f 396 }, {
61e72bca
RM
397 .virq = SPEAR300_VIRQ_CAMERA_F,
398 .enb_mask = SPEAR300_CAMERA_F_IRQ_MASK,
399 .status_mask = SPEAR300_CAMERA_F_IRQ_MASK,
4c18e77f 400 }, {
61e72bca
RM
401 .virq = SPEAR300_VIRQ_CAMERA_V,
402 .enb_mask = SPEAR300_CAMERA_V_IRQ_MASK,
403 .status_mask = SPEAR300_CAMERA_V_IRQ_MASK,
4c18e77f 404 }, {
61e72bca
RM
405 .virq = SPEAR300_VIRQ_KEYBOARD,
406 .enb_mask = SPEAR300_KEYBOARD_IRQ_MASK,
407 .status_mask = SPEAR300_KEYBOARD_IRQ_MASK,
4c18e77f 408 }, {
61e72bca
RM
409 .virq = SPEAR300_VIRQ_GPIO1,
410 .enb_mask = SPEAR300_GPIO1_IRQ_MASK,
411 .status_mask = SPEAR300_GPIO1_IRQ_MASK,
4c18e77f 412 },
413};
414
f6558bf9 415static struct spear_shirq shirq_ras1 = {
61e72bca 416 .irq = SPEAR3XX_IRQ_GEN_RAS_1,
4c18e77f 417 .dev_config = shirq_ras1_config,
418 .dev_count = ARRAY_SIZE(shirq_ras1_config),
419 .regs = {
61e72bca
RM
420 .enb_reg = SPEAR300_INT_ENB_MASK_REG,
421 .status_reg = SPEAR300_INT_STS_MASK_REG,
422 .status_reg_mask = SPEAR300_SHIRQ_RAS1_MASK,
4c18e77f 423 .clear_reg = -1,
424 },
bc4e814e 425};
426
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427/* padmux devices to enable */
428static struct pmx_dev *spear300_evb_pmx_devs[] = {
429 /* spear3xx specific devices */
430 &spear3xx_pmx_i2c,
431 &spear3xx_pmx_ssp_cs,
432 &spear3xx_pmx_ssp,
433 &spear3xx_pmx_mii,
434 &spear3xx_pmx_uart0,
435
436 /* spear300 specific devices */
437 &spear300_pmx_fsmc_2_chips,
438 &spear300_pmx_clcd,
439 &spear300_pmx_telecom_sdhci_4bit,
440 &spear300_pmx_gpio1,
c2c07831 441};
442
c5fa4fdc
VK
443/* Add SPEAr300 auxdata to pass platform data */
444static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
445 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
446 &pl022_plat_data),
447 {}
448};
c2c07831 449
c5fa4fdc 450static void __init spear300_dt_init(void)
bc4e814e 451{
c5fa4fdc 452 int ret = -EINVAL;
4c18e77f 453
c5fa4fdc
VK
454 of_platform_populate(NULL, of_default_bus_match_table,
455 spear300_auxdata_lookup, NULL);
4c18e77f 456
b595076a 457 /* shared irq registration */
53821162 458 shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K);
4c18e77f 459 if (shirq_ras1.regs.base) {
460 ret = spear_shirq_register(&shirq_ras1);
461 if (ret)
5fb00f96 462 pr_err("Error registering Shared IRQ\n");
4c18e77f 463 }
70f4c0bf 464
c5fa4fdc
VK
465 if (of_machine_is_compatible("st,spear300-evb")) {
466 /* pmx initialization */
467 pmx_driver.mode = &spear300_photo_frame_mode;
468 pmx_driver.devs = spear300_evb_pmx_devs;
469 pmx_driver.devs_count = ARRAY_SIZE(spear300_evb_pmx_devs);
470
471 pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K);
472 if (pmx_driver.base) {
473 ret = pmx_register(&pmx_driver);
474 if (ret)
475 pr_err("padmux: registration failed. err no: %d\n",
476 ret);
477 /* Free Mapping, device selection already done */
478 iounmap(pmx_driver.base);
479 }
6618c3ad 480
53688c51 481 if (ret)
c5fa4fdc 482 pr_err("Initialization Failed");
53688c51 483 }
70f4c0bf 484}
c5fa4fdc
VK
485
486static const char * const spear300_dt_board_compat[] = {
487 "st,spear300",
488 "st,spear300-evb",
489 NULL,
490};
491
492static void __init spear300_map_io(void)
493{
494 spear3xx_map_io();
495 spear300_clk_init();
496}
497
498DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
499 .map_io = spear300_map_io,
500 .init_irq = spear3xx_dt_init_irq,
501 .handle_irq = vic_handle_irq,
502 .timer = &spear3xx_timer,
503 .init_machine = spear300_dt_init,
504 .restart = spear_restart,
505 .dt_compat = spear300_dt_board_compat,
506MACHINE_END
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