[deliverable/linux.git] / arch / arm / mach-spear6xx / spear6xx.c

/*
 * arch/arm/mach-spear6xx/spear6xx.c
 *
 * SPEAr6XX machines common source file
 *
 * Copyright (C) 2009 ST Microelectronics
 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/types.h>
#include <linux/amba/pl061.h>
#include <linux/types.h>
#include <linux/ptrace.h>
#include <linux/io.h>
#include <asm/hardware/vic.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <mach/irqs.h>
#include <mach/generic.h>
#include <mach/spear.h>

/* Add spear6xx machines common devices here */
/* uart device registeration */
struct amba_device uart_device[] = {
	{
		.dev = {
			.init_name = "uart0",
		},
		.res = {
			.start = SPEAR6XX_ICM1_UART0_BASE,
			.end = SPEAR6XX_ICM1_UART0_BASE +
				SPEAR6XX_ICM1_UART0_SIZE - 1,
			.flags = IORESOURCE_MEM,
		},
		.irq = {IRQ_UART_0, NO_IRQ},
	}, {
		.dev = {
			.init_name = "uart1",
		},
		.res = {
			.start = SPEAR6XX_ICM1_UART1_BASE,
			.end = SPEAR6XX_ICM1_UART1_BASE +
				SPEAR6XX_ICM1_UART1_SIZE - 1,
			.flags = IORESOURCE_MEM,
		},
		.irq = {IRQ_UART_1, NO_IRQ},
	}
};

/* gpio device registeration */
static struct pl061_platform_data gpio_plat_data[] = {
	{
		.gpio_base	= 0,
		.irq_base	= SPEAR_GPIO0_INT_BASE,
	}, {
		.gpio_base	= 8,
		.irq_base	= SPEAR_GPIO1_INT_BASE,
	}, {
		.gpio_base	= 16,
		.irq_base	= SPEAR_GPIO2_INT_BASE,
	},
};

struct amba_device gpio_device[] = {
	{
		.dev = {
			.init_name = "gpio0",
			.platform_data = &gpio_plat_data[0],
		},
		.res = {
			.start = SPEAR6XX_CPU_GPIO_BASE,
			.end = SPEAR6XX_CPU_GPIO_BASE +
				SPEAR6XX_CPU_GPIO_SIZE - 1,
			.flags = IORESOURCE_MEM,
		},
		.irq = {IRQ_LOCAL_GPIO, NO_IRQ},
	}, {
		.dev = {
			.init_name = "gpio1",
			.platform_data = &gpio_plat_data[1],
		},
		.res = {
			.start = SPEAR6XX_ICM3_GPIO_BASE,
			.end = SPEAR6XX_ICM3_GPIO_BASE +
				SPEAR6XX_ICM3_GPIO_SIZE - 1,
			.flags = IORESOURCE_MEM,
		},
		.irq = {IRQ_BASIC_GPIO, NO_IRQ},
	}, {
		.dev = {
			.init_name = "gpio2",
			.platform_data = &gpio_plat_data[2],
		},
		.res = {
			.start = SPEAR6XX_ICM2_GPIO_BASE,
			.end = SPEAR6XX_ICM2_GPIO_BASE +
				SPEAR6XX_ICM2_GPIO_SIZE - 1,
			.flags = IORESOURCE_MEM,
		},
		.irq = {IRQ_APPL_GPIO, NO_IRQ},
	}
};

/* This will add devices, and do machine specific tasks */
void __init spear6xx_init(void)
{
	/* nothing to do for now */
}

/* This will initialize vic */
void __init spear6xx_init_irq(void)
{
	vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_PRI_BASE, 0, ~0, 0);
	vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_SEC_BASE, 32, ~0, 0);
}

/* Following will create static virtual/physical mappings */
static struct map_desc spear6xx_io_desc[] __initdata = {
	{
		.virtual	= VA_SPEAR6XX_ICM1_UART0_BASE,
		.pfn		= __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
		.length		= SPEAR6XX_ICM1_UART0_SIZE,
		.type		= MT_DEVICE
	}, {
		.virtual	= VA_SPEAR6XX_CPU_VIC_PRI_BASE,
		.pfn		= __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
		.length		= SPEAR6XX_CPU_VIC_PRI_SIZE,
		.type		= MT_DEVICE
	}, {
		.virtual	= VA_SPEAR6XX_CPU_VIC_SEC_BASE,
		.pfn		= __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
		.length		= SPEAR6XX_CPU_VIC_SEC_SIZE,
		.type		= MT_DEVICE
	}, {
		.virtual	= VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
		.pfn		= __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
		.length		= SPEAR6XX_ICM3_MISC_REG_BASE,
		.type		= MT_DEVICE
	}, {
		.virtual	= VA_SPEAR6XX_ICM3_MISC_REG_BASE,
		.pfn		= __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
		.length		= SPEAR6XX_ICM3_MISC_REG_SIZE,
		.type		= MT_DEVICE
	},
};

/* This will create static memory mapping for selected devices */
void __init spear6xx_map_io(void)
{
	iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));

	/* This will initialize clock framework */
	clk_init();
}
Commit	Line	Data
8f590d45	1	/*
	2	* arch/arm/mach-spear6xx/spear6xx.c
	3	*
	4	* SPEAr6XX machines common source file
	5	*
	6	* Copyright (C) 2009 ST Microelectronics
	7	* Rajeev Kumar<rajeev-dlh.kumar@st.com>
	8	*
	9	* This file is licensed under the terms of the GNU General Public
	10	* License version 2. This program is licensed "as is" without any
	11	* warranty of any kind, whether express or implied.
	12	*/
	13
	14	#include <linux/types.h>
	15	#include <linux/amba/pl061.h>
	16	#include <linux/types.h>
	17	#include <linux/ptrace.h>
	18	#include <linux/io.h>
	19	#include <asm/hardware/vic.h>
	20	#include <asm/irq.h>
	21	#include <asm/mach/arch.h>
	22	#include <mach/irqs.h>
	23	#include <mach/generic.h>
	24	#include <mach/spear.h>
	25
	26	/* Add spear6xx machines common devices here */
	27	/* uart device registeration */
	28	struct amba_device uart_device[] = {
	29	{
	30	.dev = {
	31	.init_name = "uart0",
	32	},
	33	.res = {
	34	.start = SPEAR6XX_ICM1_UART0_BASE,
	35	.end = SPEAR6XX_ICM1_UART0_BASE +
	36	SPEAR6XX_ICM1_UART0_SIZE - 1,
	37	.flags = IORESOURCE_MEM,
	38	},
	39	.irq = {IRQ_UART_0, NO_IRQ},
	40	}, {
	41	.dev = {
	42	.init_name = "uart1",
	43	},
	44	.res = {
	45	.start = SPEAR6XX_ICM1_UART1_BASE,
	46	.end = SPEAR6XX_ICM1_UART1_BASE +
	47	SPEAR6XX_ICM1_UART1_SIZE - 1,
	48	.flags = IORESOURCE_MEM,
	49	},
	50	.irq = {IRQ_UART_1, NO_IRQ},
	51	}
	52	};
	53
	54	/* gpio device registeration */
	55	static struct pl061_platform_data gpio_plat_data[] = {
	56	{
	57	.gpio_base = 0,
	58	.irq_base = SPEAR_GPIO0_INT_BASE,
	59	}, {
	60	.gpio_base = 8,
	61	.irq_base = SPEAR_GPIO1_INT_BASE,
	62	}, {
	63	.gpio_base = 16,
	64	.irq_base = SPEAR_GPIO2_INT_BASE,
65	},
66	};
67
68	struct amba_device gpio_device[] = {
69	{
70	.dev = {
71	.init_name = "gpio0",
72	.platform_data = &gpio_plat_data[0],
73	},
74	.res = {
75	.start = SPEAR6XX_CPU_GPIO_BASE,
76	.end = SPEAR6XX_CPU_GPIO_BASE +
77	SPEAR6XX_CPU_GPIO_SIZE - 1,
78	.flags = IORESOURCE_MEM,
79	},
80	.irq = {IRQ_LOCAL_GPIO, NO_IRQ},
81	}, {
82	.dev = {
83	.init_name = "gpio1",
84	.platform_data = &gpio_plat_data[1],
85	},
86	.res = {
87	.start = SPEAR6XX_ICM3_GPIO_BASE,
88	.end = SPEAR6XX_ICM3_GPIO_BASE +
89	SPEAR6XX_ICM3_GPIO_SIZE - 1,
90	.flags = IORESOURCE_MEM,
91	},
92	.irq = {IRQ_BASIC_GPIO, NO_IRQ},
93	}, {
94	.dev = {
95	.init_name = "gpio2",
96	.platform_data = &gpio_plat_data[2],
97	},
98	.res = {
99	.start = SPEAR6XX_ICM2_GPIO_BASE,
100	.end = SPEAR6XX_ICM2_GPIO_BASE +
101	SPEAR6XX_ICM2_GPIO_SIZE - 1,
102	.flags = IORESOURCE_MEM,
103	},
104	.irq = {IRQ_APPL_GPIO, NO_IRQ},
105	}
106	};
107
108	/* This will add devices, and do machine specific tasks */
109	void __init spear6xx_init(void)
110	{
111	/* nothing to do for now */
112	}
113
114	/* This will initialize vic */
115	void __init spear6xx_init_irq(void)
116	{
117	vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_PRI_BASE, 0, ~0, 0);
118	vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_SEC_BASE, 32, ~0, 0);
119	}
120
121	/* Following will create static virtual/physical mappings */
122	static struct map_desc spear6xx_io_desc[] __initdata = {
123	{
124	.virtual = VA_SPEAR6XX_ICM1_UART0_BASE,
125	.pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
126	.length = SPEAR6XX_ICM1_UART0_SIZE,
127	.type = MT_DEVICE
128	}, {
129	.virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE,
130	.pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
131	.length = SPEAR6XX_CPU_VIC_PRI_SIZE,
132	.type = MT_DEVICE
133	}, {
134	.virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE,
135	.pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
136	.length = SPEAR6XX_CPU_VIC_SEC_SIZE,
137	.type = MT_DEVICE
138	}, {
139	.virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
140	.pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
141	.length = SPEAR6XX_ICM3_MISC_REG_BASE,
142	.type = MT_DEVICE
143	}, {
144	.virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE,
145	.pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
146	.length = SPEAR6XX_ICM3_MISC_REG_SIZE,
147	.type = MT_DEVICE
148	},
149	};
150
151	/* This will create static memory mapping for selected devices */
152	void __init spear6xx_map_io(void)
153	{
154	iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));
155
156	/* This will initialize clock framework */
157	clk_init();
158	}