[deliverable/linux.git] / arch / arm / mach-sunxi / sunxi.c

/*
 * Device Tree support for Allwinner A1X SoCs
 *
 * Copyright (C) 2012 Maxime Ripard
 *
 * Maxime Ripard <maxime.ripard@free-electrons.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/clocksource.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irqchip.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/io.h>

#include <linux/clk/sunxi.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/system_misc.h>

#include "sunxi.h"

#define SUN4I_WATCHDOG_CTRL_REG		0x00
#define SUN4I_WATCHDOG_CTRL_RESTART		(1 << 0)
#define SUN4I_WATCHDOG_MODE_REG		0x04
#define SUN4I_WATCHDOG_MODE_ENABLE		(1 << 0)
#define SUN4I_WATCHDOG_MODE_RESET_ENABLE	(1 << 1)

static void __iomem *wdt_base;

static void sun4i_restart(char mode, const char *cmd)
{
	if (!wdt_base)
		return;

	/* Enable timer and set reset bit in the watchdog */
	writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
	       wdt_base + SUN4I_WATCHDOG_MODE_REG);

	/*
	 * Restart the watchdog. The default (and lowest) interval
	 * value for the watchdog is 0.5s.
	 */
	writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);

	while (1) {
		mdelay(5);
		writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
		       wdt_base + SUN4I_WATCHDOG_MODE_REG);
	}
}

static struct of_device_id sunxi_restart_ids[] = {
	{ .compatible = "allwinner,sun4i-wdt", .data = sun4i_restart },
	{ /*sentinel*/ }
};

static void sunxi_setup_restart(void)
{
	const struct of_device_id *of_id;
	struct device_node *np;

	np = of_find_matching_node(NULL, sunxi_restart_ids);
	if (WARN(!np, "unable to setup watchdog restart"))
		return;

	wdt_base = of_iomap(np, 0);
	WARN(!wdt_base, "failed to map watchdog base address");

	of_id = of_match_node(sunxi_restart_ids, np);
	WARN(!of_id, "restart function not available");

	arm_pm_restart = of_id->data;
}

static struct map_desc sunxi_io_desc[] __initdata = {
	{
		.virtual	= (unsigned long) SUNXI_REGS_VIRT_BASE,
		.pfn		= __phys_to_pfn(SUNXI_REGS_PHYS_BASE),
		.length		= SUNXI_REGS_SIZE,
		.type		= MT_DEVICE,
	},
};

void __init sunxi_map_io(void)
{
	iotable_init(sunxi_io_desc, ARRAY_SIZE(sunxi_io_desc));
}

static void __init sunxi_timer_init(void)
{
	sunxi_init_clocks();
	clocksource_of_init();
}

static void __init sunxi_dt_init(void)
{
	sunxi_setup_restart();

	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}

static const char * const sunxi_board_dt_compat[] = {
	"allwinner,sun4i-a10",
	"allwinner,sun5i-a13",
	NULL,
};

DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
	.init_machine	= sunxi_dt_init,
	.map_io		= sunxi_map_io,
	.init_irq	= irqchip_init,
	.init_time	= sunxi_timer_init,
	.dt_compat	= sunxi_board_dt_compat,
MACHINE_END
Commit	Line	Data
3b52634f MR	1	/*
	2	* Device Tree support for Allwinner A1X SoCs
	3	*
	4	* Copyright (C) 2012 Maxime Ripard
	5	*
	6	* Maxime Ripard <maxime.ripard@free-electrons.com>
	7	*
	8	* This file is licensed under the terms of the GNU General Public
	9	* License version 2. This program is licensed "as is" without any
	10	* warranty of any kind, whether express or implied.
	11	*/
	12
ea71d9a6	13	#include <linux/clocksource.h>
5e51651d	14	#include <linux/delay.h>
3b52634f MR	15	#include <linux/kernel.h>
3b52634f MR	16	#include <linux/init.h>
f1dc6c4f	17	#include <linux/irqchip.h>
67bea88d	18	#include <linux/of_address.h>
3b52634f MR	19	#include <linux/of_irq.h>
	20	#include <linux/of_platform.h>
	21	#include <linux/io.h>
3b52634f	22
ea71d9a6	23	#include <linux/clk/sunxi.h>
3b52634f	24
3b52634f MR	25	#include <asm/mach/arch.h>
3b52634f MR	26	#include <asm/mach/map.h>
bc34b5f2	27	#include <asm/system_misc.h>
3b52634f MR	28
	29	#include "sunxi.h"
	30
bc34b5f2 MR	31	#define SUN4I_WATCHDOG_CTRL_REG 0x00
	32	#define SUN4I_WATCHDOG_CTRL_RESTART (1 << 0)
	33	#define SUN4I_WATCHDOG_MODE_REG 0x04
	34	#define SUN4I_WATCHDOG_MODE_ENABLE (1 << 0)
	35	#define SUN4I_WATCHDOG_MODE_RESET_ENABLE (1 << 1)
67bea88d MR	36
	37	static void __iomem *wdt_base;
	38
bc34b5f2	39	static void sun4i_restart(char mode, const char *cmd)
67bea88d MR	40	{
	41	if (!wdt_base)
	42	return;
	43
	44	/* Enable timer and set reset bit in the watchdog */
bc34b5f2 MR	45	writel(SUN4I_WATCHDOG_MODE_ENABLE \| SUN4I_WATCHDOG_MODE_RESET_ENABLE,
bc34b5f2 MR	46	wdt_base + SUN4I_WATCHDOG_MODE_REG);
b60decad MR	47
	48	/*
	49	* Restart the watchdog. The default (and lowest) interval
	50	* value for the watchdog is 0.5s.
	51	*/
bc34b5f2	52	writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
b60decad MR	53
b60decad MR	54	while (1) {
67bea88d	55	mdelay(5);
bc34b5f2 MR	56	writel(SUN4I_WATCHDOG_MODE_ENABLE \| SUN4I_WATCHDOG_MODE_RESET_ENABLE,
bc34b5f2 MR	57	wdt_base + SUN4I_WATCHDOG_MODE_REG);
67bea88d MR	58	}
	59	}
	60
bc34b5f2 MR	61	static struct of_device_id sunxi_restart_ids[] = {
	62	{ .compatible = "allwinner,sun4i-wdt", .data = sun4i_restart },
	63	{ /sentinel/ }
	64	};
	65
	66	static void sunxi_setup_restart(void)
	67	{
	68	const struct of_device_id *of_id;
	69	struct device_node *np;
	70
	71	np = of_find_matching_node(NULL, sunxi_restart_ids);
	72	if (WARN(!np, "unable to setup watchdog restart"))
	73	return;
	74
	75	wdt_base = of_iomap(np, 0);
	76	WARN(!wdt_base, "failed to map watchdog base address");
	77
	78	of_id = of_match_node(sunxi_restart_ids, np);
	79	WARN(!of_id, "restart function not available");
	80
	81	arm_pm_restart = of_id->data;
	82	}
	83
3b52634f MR	84	static struct map_desc sunxi_io_desc[] __initdata = {
	85	{
	86	.virtual = (unsigned long) SUNXI_REGS_VIRT_BASE,
	87	.pfn = __phys_to_pfn(SUNXI_REGS_PHYS_BASE),
	88	.length = SUNXI_REGS_SIZE,
	89	.type = MT_DEVICE,
	90	},
	91	};
	92
	93	void __init sunxi_map_io(void)
	94	{
	95	iotable_init(sunxi_io_desc, ARRAY_SIZE(sunxi_io_desc));
	96	}
	97
ea71d9a6 MR	98	static void __init sunxi_timer_init(void)
	99	{
	100	sunxi_init_clocks();
	101	clocksource_of_init();
	102	}
	103
3b52634f MR	104	static void __init sunxi_dt_init(void)
3b52634f MR	105	{
67bea88d MR	106	sunxi_setup_restart();
67bea88d MR	107
3b52634f MR	108	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
	109	}
	110
	111	static const char * const sunxi_board_dt_compat[] = {
43880f70 MR	112	"allwinner,sun4i-a10",
43880f70 MR	113	"allwinner,sun5i-a13",
3b52634f MR	114	NULL,
	115	};
	116
	117	DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
	118	.init_machine = sunxi_dt_init,
	119	.map_io = sunxi_map_io,
f1dc6c4f	120	.init_irq = irqchip_init,
ea71d9a6	121	.init_time = sunxi_timer_init,
3b52634f MR	122	.dt_compat = sunxi_board_dt_compat,
3b52634f MR	123	MACHINE_END