projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 3b52634f MR |
1 | /* |
| 2 | * Device Tree support for Allwinner A1X SoCs | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Maxime Ripard | |
| 5 | * | |
| 6 | * Maxime Ripard <maxime.ripard@free-electrons.com> | |
| 7 | * | |
| 8 | * This file is licensed under the terms of the GNU General Public | |
| 9 | * License version 2. This program is licensed "as is" without any | |
| 10 | * warranty of any kind, whether express or implied. | |
| 11 | */ | |
| 12 | ||
| 5e51651d | 13 | #include <linux/delay.h> |
| 3b52634f MR |
14 | #include <linux/kernel.h> |
| 15 | #include <linux/init.h> | |
| 67bea88d | 16 | #include <linux/of_address.h> |
| 3b52634f MR |
17 | #include <linux/of_irq.h> |
| 18 | #include <linux/of_platform.h> | |
| 19 | #include <linux/io.h> | |
| 20 | #include <linux/sunxi_timer.h> | |
| 21 | ||
| 22 | #include <linux/irqchip/sunxi.h> | |
| 23 | ||
| 24 | #include <asm/hardware/vic.h> | |
| 25 | ||
| 26 | #include <asm/mach/arch.h> | |
| 27 | #include <asm/mach/map.h> | |
| 28 | ||
| 29 | #include "sunxi.h" | |
| 30 | ||
| 67bea88d MR |
31 | #define WATCHDOG_CTRL_REG 0x00 |
| 32 | #define WATCHDOG_MODE_REG 0x04 | |
| 33 | ||
| 34 | static void __iomem *wdt_base; | |
| 35 | ||
| 36 | static void sunxi_setup_restart(void) | |
| 37 | { | |
| 38 | struct device_node *np = of_find_compatible_node(NULL, NULL, | |
| 39 | "allwinner,sunxi-wdt"); | |
| 40 | if (WARN(!np, "unable to setup watchdog restart")) | |
| 41 | return; | |
| 42 | ||
| 43 | wdt_base = of_iomap(np, 0); | |
| 44 | WARN(!wdt_base, "failed to map watchdog base address"); | |
| 45 | } | |
| 46 | ||
| 47 | static void sunxi_restart(char mode, const char *cmd) | |
| 48 | { | |
| 49 | if (!wdt_base) | |
| 50 | return; | |
| 51 | ||
| 52 | /* Enable timer and set reset bit in the watchdog */ | |
| 53 | writel(3, wdt_base + WATCHDOG_MODE_REG); | |
| 54 | writel(0xa57 << 1 | 1, wdt_base + WATCHDOG_CTRL_REG); | |
| 55 | while(1) { | |
| 56 | mdelay(5); | |
| 57 | writel(3, wdt_base + WATCHDOG_MODE_REG); | |
| 58 | } | |
| 59 | } | |
| 60 | ||
| 3b52634f MR |
61 | static struct map_desc sunxi_io_desc[] __initdata = { |
| 62 | { | |
| 63 | .virtual = (unsigned long) SUNXI_REGS_VIRT_BASE, | |
| 64 | .pfn = __phys_to_pfn(SUNXI_REGS_PHYS_BASE), | |
| 65 | .length = SUNXI_REGS_SIZE, | |
| 66 | .type = MT_DEVICE, | |
| 67 | }, | |
| 68 | }; | |
| 69 | ||
| 70 | void __init sunxi_map_io(void) | |
| 71 | { | |
| 72 | iotable_init(sunxi_io_desc, ARRAY_SIZE(sunxi_io_desc)); | |
| 73 | } | |
| 74 | ||
| 75 | static void __init sunxi_dt_init(void) | |
| 76 | { | |
| 67bea88d MR |
77 | sunxi_setup_restart(); |
| 78 | ||
| 3b52634f MR |
79 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
| 80 | } | |
| 81 | ||
| 82 | static const char * const sunxi_board_dt_compat[] = { | |
| f055f1f6 | 83 | "allwinner,sun4i", |
| 3b52634f MR |
84 | "allwinner,sun5i", |
| 85 | NULL, | |
| 86 | }; | |
| 87 | ||
| 88 | DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)") | |
| 89 | .init_machine = sunxi_dt_init, | |
| 90 | .map_io = sunxi_map_io, | |
| 91 | .init_irq = sunxi_init_irq, | |
| 92 | .handle_irq = sunxi_handle_irq, | |
| 67bea88d | 93 | .restart = sunxi_restart, |
| 3b52634f MR |
94 | .timer = &sunxi_timer, |
| 95 | .dt_compat = sunxi_board_dt_compat, | |
| 96 | MACHINE_END |