projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 90027225 SW |
1 | config ARCH_TEGRA |
| 2 | bool "NVIDIA Tegra" if ARCH_MULTI_V7 | |
| 3 | select ARCH_HAS_CPUFREQ | |
| 4 | select ARCH_REQUIRE_GPIOLIB | |
| 20984c44 | 5 | select ARM_GIC |
| 90027225 SW |
6 | select CLKSRC_MMIO |
| 7 | select CLKSRC_OF | |
| 8 | select COMMON_CLK | |
| 20984c44 | 9 | select CPU_V7 |
| 90027225 | 10 | select GENERIC_CLOCKEVENTS |
| 4c3ffffd | 11 | select HAVE_ARM_SCU if SMP |
| a894fcc2 | 12 | select HAVE_ARM_TWD if SMP |
| 90027225 SW |
13 | select HAVE_SMP |
| 14 | select MIGHT_HAVE_CACHE_L2X0 | |
| e8a72e2a | 15 | select MIGHT_HAVE_PCI |
| 20984c44 | 16 | select PINCTRL |
| 90027225 SW |
17 | select SOC_BUS |
| 18 | select SPARSE_IRQ | |
| 20984c44 SW |
19 | select USB_ARCH_HAS_EHCI if USB_SUPPORT |
| 20 | select USB_ULPI if USB_PHY | |
| 21 | select USB_ULPI_VIEWPORT if USB_PHY | |
| 90027225 SW |
22 | select USE_OF |
| 23 | help | |
| 24 | This enables support for NVIDIA Tegra based systems. | |
| c5f80065 | 25 | |
| 90027225 SW |
26 | menu "NVIDIA Tegra options" |
| 27 | depends on ARCH_TEGRA | |
| c5f80065 | 28 | |
| c5f80065 | 29 | config ARCH_TEGRA_2x_SOC |
| 44107d8b | 30 | bool "Enable support for Tegra20 family" |
| 1d328606 | 31 | select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP |
| f35b431d | 32 | select ARM_ERRATA_720789 |
| 45c9e592 | 33 | select ARM_ERRATA_754327 if SMP |
| 8f90cce5 | 34 | select ARM_ERRATA_764369 if SMP |
| b1b3f49c | 35 | select PINCTRL_TEGRA20 |
| f35b431d SW |
36 | select PL310_ERRATA_727915 if CACHE_L2X0 |
| 37 | select PL310_ERRATA_769419 if CACHE_L2X0 | |
| c5f80065 EG |
38 | help |
| 39 | Support for NVIDIA Tegra AP20 and T20 processors, based on the | |
| 40 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller | |
| 41 | ||
| 44107d8b PDS |
42 | config ARCH_TEGRA_3x_SOC |
| 43 | bool "Enable support for Tegra30 family" | |
| f35b431d | 44 | select ARM_ERRATA_754322 |
| 8f90cce5 | 45 | select ARM_ERRATA_764369 if SMP |
| b1b3f49c RK |
46 | select PINCTRL_TEGRA30 |
| 47 | select PL310_ERRATA_769419 if CACHE_L2X0 | |
| 44107d8b PDS |
48 | help |
| 49 | Support for NVIDIA Tegra T30 processor family, based on the | |
| 50 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller | |
| c5f80065 | 51 | |
| 5c541b88 HD |
52 | config ARCH_TEGRA_114_SOC |
| 53 | bool "Enable support for Tegra114 family" | |
| 59fd3033 | 54 | select ARM_ERRATA_798181 if SMP |
| 5c541b88 | 55 | select ARM_L1_CACHE_SHIFT_6 |
| b6bda4e0 | 56 | select HAVE_ARM_ARCH_TIMER |
| 20fd4806 | 57 | select PINCTRL_TEGRA114 |
| 5c541b88 HD |
58 | help |
| 59 | Support for NVIDIA Tegra T114 processor family, based on the | |
| 60 | ARM CortexA15MP CPU | |
| 61 | ||
| 73944475 JL |
62 | config ARCH_TEGRA_124_SOC |
| 63 | bool "Enable support for Tegra124 family" | |
| 64 | select ARM_L1_CACHE_SHIFT_6 | |
| 65 | select HAVE_ARM_ARCH_TIMER | |
| 66 | help | |
| 67 | Support for NVIDIA Tegra T124 processor family, based on the | |
| 68 | ARM CortexA15MP CPU | |
| 69 | ||
| 87d0bab2 HD |
70 | config TEGRA_AHB |
| 71 | bool "Enable AHB driver for NVIDIA Tegra SoCs" | |
| 72 | default y | |
| 73 | help | |
| 74 | Adds AHB configuration functionality for NVIDIA Tegra SoCs, | |
| 75 | which controls AHB bus master arbitration and some | |
| e41e85cc | 76 | performance parameters(priority, prefech size). |
| 87d0bab2 | 77 | |
| efdf72ad CC |
78 | config TEGRA_EMC_SCALING_ENABLE |
| 79 | bool "Enable scaling the memory frequency" | |
| 38376866 | 80 | |
| 90027225 | 81 | endmenu |