[deliverable/linux.git] / arch / arm / mach-tegra / Kconfig

if ARCH_TEGRA

comment "NVIDIA Tegra options"

config ARCH_TEGRA_2x_SOC
	bool "Enable support for Tegra20 family"
	select CPU_V7
	select ARM_GIC
	select ARCH_REQUIRE_GPIOLIB
	select PINCTRL
	select PINCTRL_TEGRA20
	select USB_ARCH_HAS_EHCI if USB_SUPPORT
	select USB_ULPI if USB
	select USB_ULPI_VIEWPORT if USB_SUPPORT
	select ARM_ERRATA_720789
	select ARM_ERRATA_742230
	select ARM_ERRATA_751472
	select ARM_ERRATA_754327
	select ARM_ERRATA_764369
	select PL310_ERRATA_727915 if CACHE_L2X0
	select PL310_ERRATA_769419 if CACHE_L2X0
	select CPU_FREQ_TABLE if CPU_FREQ
	help
	  Support for NVIDIA Tegra AP20 and T20 processors, based on the
	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller

config ARCH_TEGRA_3x_SOC
	bool "Enable support for Tegra30 family"
	select CPU_V7
	select ARM_GIC
	select ARCH_REQUIRE_GPIOLIB
	select PINCTRL
	select PINCTRL_TEGRA30
	select USB_ARCH_HAS_EHCI if USB_SUPPORT
	select USB_ULPI if USB
	select USB_ULPI_VIEWPORT if USB_SUPPORT
	select USE_OF
	select ARM_ERRATA_743622
	select ARM_ERRATA_751472
	select ARM_ERRATA_754322
	select ARM_ERRATA_764369
	select PL310_ERRATA_769419 if CACHE_L2X0
	select CPU_FREQ_TABLE if CPU_FREQ
	help
	  Support for NVIDIA Tegra T30 processor family, based on the
	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller

config TEGRA_PCI
	bool "PCI Express support"
	depends on ARCH_TEGRA_2x_SOC
	select PCI

config TEGRA_AHB
	bool "Enable AHB driver for NVIDIA Tegra SoCs"
	default y
	help
	  Adds AHB configuration functionality for NVIDIA Tegra SoCs,
	  which controls AHB bus master arbitration and some
	  perfomance parameters(priority, prefech size).

comment "Tegra board type"

choice
        prompt "Default low-level debug console UART"
        default TEGRA_DEBUG_UART_NONE

config TEGRA_DEBUG_UART_NONE
        bool "None"

config TEGRA_DEBUG_UARTA
        bool "UART-A"

config TEGRA_DEBUG_UARTB
        bool "UART-B"

config TEGRA_DEBUG_UARTC
        bool "UART-C"

config TEGRA_DEBUG_UARTD
        bool "UART-D"

config TEGRA_DEBUG_UARTE
        bool "UART-E"

endchoice

choice
	prompt "Automatic low-level debug console UART"
	default TEGRA_DEBUG_UART_AUTO_NONE

config TEGRA_DEBUG_UART_AUTO_NONE
	bool "None"

config TEGRA_DEBUG_UART_AUTO_ODMDATA
	bool "Via ODMDATA"
	help
	  Automatically determines which UART to use for low-level debug based
	  on the ODMDATA value. This value is part of the BCT, and is written
	  to the boot memory device using nvflash, or other flashing tool.
	  When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
	  0/1/2/3/4 are UART A/B/C/D/E.

config TEGRA_DEBUG_UART_AUTO_SCRATCH
	bool "Via UART scratch register"
	help
	  Automatically determines which UART to use for low-level debug based
	  on the UART scratch register value. Some bootloaders put ASCII 'D'
	  in this register when they initialize their own console UART output.
	  Using this option allows the kernel to automatically pick the same
	  UART.

endchoice

config TEGRA_SYSTEM_DMA
	bool "Enable system DMA driver for NVIDIA Tegra SoCs"
	default y
	help
	  Adds system DMA functionality for NVIDIA Tegra SoCs, used by
	  several Tegra device drivers

config TEGRA_EMC_SCALING_ENABLE
	bool "Enable scaling the memory frequency"

endif
Commit	Line	Data
c5f80065 EG	1	if ARCH_TEGRA
	2
	3	comment "NVIDIA Tegra options"
	4
c5f80065	5	config ARCH_TEGRA_2x_SOC
44107d8b	6	bool "Enable support for Tegra20 family"
c5f80065 EG	7	select CPU_V7
c5f80065 EG	8	select ARM_GIC
3c92db9a	9	select ARCH_REQUIRE_GPIOLIB
f1f1ffa0 SW	10	select PINCTRL
f1f1ffa0 SW	11	select PINCTRL_TEGRA20
91525d08	12	select USB_ARCH_HAS_EHCI if USB_SUPPORT
279b6585	13	select USB_ULPI if USB
91525d08	14	select USB_ULPI_VIEWPORT if USB_SUPPORT
f35b431d SW	15	select ARM_ERRATA_720789
	16	select ARM_ERRATA_742230
	17	select ARM_ERRATA_751472
	18	select ARM_ERRATA_754327
	19	select ARM_ERRATA_764369
	20	select PL310_ERRATA_727915 if CACHE_L2X0
	21	select PL310_ERRATA_769419 if CACHE_L2X0
013df388	22	select CPU_FREQ_TABLE if CPU_FREQ
c5f80065 EG	23	help
	24	Support for NVIDIA Tegra AP20 and T20 processors, based on the
	25	ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
	26
44107d8b PDS	27	config ARCH_TEGRA_3x_SOC
	28	bool "Enable support for Tegra30 family"
	29	select CPU_V7
	30	select ARM_GIC
	31	select ARCH_REQUIRE_GPIOLIB
f1f1ffa0 SW	32	select PINCTRL
f1f1ffa0 SW	33	select PINCTRL_TEGRA30
44107d8b	34	select USB_ARCH_HAS_EHCI if USB_SUPPORT
279b6585	35	select USB_ULPI if USB
44107d8b PDS	36	select USB_ULPI_VIEWPORT if USB_SUPPORT
44107d8b PDS	37	select USE_OF
f35b431d SW	38	select ARM_ERRATA_743622
	39	select ARM_ERRATA_751472
	40	select ARM_ERRATA_754322
	41	select ARM_ERRATA_764369
	42	select PL310_ERRATA_769419 if CACHE_L2X0
013df388	43	select CPU_FREQ_TABLE if CPU_FREQ
44107d8b PDS	44	help
	45	Support for NVIDIA Tegra T30 processor family, based on the
	46	ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
c5f80065	47
77ffc146 MR	48	config TEGRA_PCI
77ffc146 MR	49	bool "PCI Express support"
b2bbbc4d	50	depends on ARCH_TEGRA_2x_SOC
77ffc146 MR	51	select PCI
77ffc146 MR	52
87d0bab2 HD	53	config TEGRA_AHB
	54	bool "Enable AHB driver for NVIDIA Tegra SoCs"
	55	default y
	56	help
	57	Adds AHB configuration functionality for NVIDIA Tegra SoCs,
	58	which controls AHB bus master arbitration and some
	59	perfomance parameters(priority, prefech size).
	60
c5f80065 EG	61	comment "Tegra board type"
c5f80065 EG	62
c5f80065	63	choice
80881dae	64	prompt "Default low-level debug console UART"
c5f80065 EG	65	default TEGRA_DEBUG_UART_NONE
	66
	67	config TEGRA_DEBUG_UART_NONE
	68	bool "None"
	69
	70	config TEGRA_DEBUG_UARTA
	71	bool "UART-A"
	72
	73	config TEGRA_DEBUG_UARTB
	74	bool "UART-B"
	75
	76	config TEGRA_DEBUG_UARTC
	77	bool "UART-C"
	78
	79	config TEGRA_DEBUG_UARTD
	80	bool "UART-D"
	81
	82	config TEGRA_DEBUG_UARTE
	83	bool "UART-E"
	84
	85	endchoice
	86
80881dae SW	87	choice
	88	prompt "Automatic low-level debug console UART"
	89	default TEGRA_DEBUG_UART_AUTO_NONE
	90
	91	config TEGRA_DEBUG_UART_AUTO_NONE
	92	bool "None"
	93
	94	config TEGRA_DEBUG_UART_AUTO_ODMDATA
	95	bool "Via ODMDATA"
	96	help
	97	Automatically determines which UART to use for low-level debug based
	98	on the ODMDATA value. This value is part of the BCT, and is written
	99	to the boot memory device using nvflash, or other flashing tool.
	100	When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
	101	0/1/2/3/4 are UART A/B/C/D/E.
	102
	103	config TEGRA_DEBUG_UART_AUTO_SCRATCH
	104	bool "Via UART scratch register"
	105	help
	106	Automatically determines which UART to use for low-level debug based
	107	on the UART scratch register value. Some bootloaders put ASCII 'D'
	108	in this register when they initialize their own console UART output.
	109	Using this option allows the kernel to automatically pick the same
	110	UART.
	111
	112	endchoice
	113
4de3a8fa CC	114	config TEGRA_SYSTEM_DMA
	115	bool "Enable system DMA driver for NVIDIA Tegra SoCs"
	116	default y
	117	help
	118	Adds system DMA functionality for NVIDIA Tegra SoCs, used by
	119	several Tegra device drivers
	120
efdf72ad CC	121	config TEGRA_EMC_SCALING_ENABLE
efdf72ad CC	122	bool "Enable scaling the memory frequency"
38376866 MB	123
38376866 MB	124	endif