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0b25e25b JL |
1 | /* |
2 | * CPU idle driver for Tegra CPUs | |
3 | * | |
4 | * Copyright (c) 2010-2012, NVIDIA Corporation. | |
5 | * Copyright (c) 2011 Google, Inc. | |
6 | * Author: Colin Cross <ccross@android.com> | |
7 | * Gary King <gking@nvidia.com> | |
8 | * | |
9 | * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
19 | * more details. | |
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/cpuidle.h> | |
d457ef35 JL |
25 | #include <linux/cpu_pm.h> |
26 | #include <linux/clockchips.h> | |
0b25e25b JL |
27 | |
28 | #include <asm/cpuidle.h> | |
d457ef35 JL |
29 | #include <asm/proc-fns.h> |
30 | #include <asm/suspend.h> | |
31 | #include <asm/smp_plat.h> | |
32 | ||
33 | #include "pm.h" | |
34 | #include "sleep.h" | |
35 | ||
36 | #ifdef CONFIG_PM_SLEEP | |
37 | static int tegra30_idle_lp2(struct cpuidle_device *dev, | |
38 | struct cpuidle_driver *drv, | |
39 | int index); | |
40 | #endif | |
0b25e25b JL |
41 | |
42 | static struct cpuidle_driver tegra_idle_driver = { | |
43 | .name = "tegra_idle", | |
44 | .owner = THIS_MODULE, | |
45 | .en_core_tk_irqen = 1, | |
d457ef35 JL |
46 | #ifdef CONFIG_PM_SLEEP |
47 | .state_count = 2, | |
48 | #else | |
0b25e25b | 49 | .state_count = 1, |
d457ef35 | 50 | #endif |
0b25e25b JL |
51 | .states = { |
52 | [0] = ARM_CPUIDLE_WFI_STATE_PWR(600), | |
d457ef35 JL |
53 | #ifdef CONFIG_PM_SLEEP |
54 | [1] = { | |
55 | .enter = tegra30_idle_lp2, | |
56 | .exit_latency = 2000, | |
57 | .target_residency = 2200, | |
58 | .power_usage = 0, | |
59 | .flags = CPUIDLE_FLAG_TIME_VALID, | |
60 | .name = "powered-down", | |
61 | .desc = "CPU power gated", | |
62 | }, | |
63 | #endif | |
0b25e25b JL |
64 | }, |
65 | }; | |
66 | ||
67 | static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device); | |
68 | ||
d457ef35 JL |
69 | #ifdef CONFIG_PM_SLEEP |
70 | #ifdef CONFIG_SMP | |
71 | static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, | |
72 | struct cpuidle_driver *drv, | |
73 | int index) | |
74 | { | |
75 | clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu); | |
76 | ||
77 | smp_wmb(); | |
78 | ||
79 | save_cpu_arch_register(); | |
80 | ||
81 | cpu_suspend(0, tegra30_sleep_cpu_secondary_finish); | |
82 | ||
83 | restore_cpu_arch_register(); | |
84 | ||
85 | clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu); | |
86 | ||
87 | return true; | |
88 | } | |
89 | #else | |
90 | static inline bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, | |
91 | struct cpuidle_driver *drv, | |
92 | int index) | |
93 | { | |
94 | return true; | |
95 | } | |
96 | #endif | |
97 | ||
98 | static int __cpuinit tegra30_idle_lp2(struct cpuidle_device *dev, | |
99 | struct cpuidle_driver *drv, | |
100 | int index) | |
101 | { | |
102 | u32 cpu = is_smp() ? cpu_logical_map(dev->cpu) : dev->cpu; | |
103 | bool entered_lp2 = false; | |
104 | ||
105 | local_fiq_disable(); | |
106 | ||
107 | tegra_set_cpu_in_lp2(cpu); | |
108 | cpu_pm_enter(); | |
109 | ||
110 | if (cpu == 0) | |
111 | cpu_do_idle(); | |
112 | else | |
113 | entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index); | |
114 | ||
115 | cpu_pm_exit(); | |
116 | tegra_clear_cpu_in_lp2(cpu); | |
117 | ||
118 | local_fiq_enable(); | |
119 | ||
120 | smp_rmb(); | |
121 | ||
122 | return (entered_lp2) ? index : 0; | |
123 | } | |
124 | #endif | |
125 | ||
0b25e25b JL |
126 | int __init tegra30_cpuidle_init(void) |
127 | { | |
128 | int ret; | |
129 | unsigned int cpu; | |
130 | struct cpuidle_device *dev; | |
131 | struct cpuidle_driver *drv = &tegra_idle_driver; | |
132 | ||
133 | ret = cpuidle_register_driver(&tegra_idle_driver); | |
134 | if (ret) { | |
135 | pr_err("CPUidle driver registration failed\n"); | |
136 | return ret; | |
137 | } | |
138 | ||
139 | for_each_possible_cpu(cpu) { | |
140 | dev = &per_cpu(tegra_idle_device, cpu); | |
141 | dev->cpu = cpu; | |
142 | ||
143 | dev->state_count = drv->state_count; | |
144 | ret = cpuidle_register_device(dev); | |
145 | if (ret) { | |
146 | pr_err("CPU%u: CPUidle device registration failed\n", | |
147 | cpu); | |
148 | return ret; | |
149 | } | |
150 | } | |
151 | return 0; | |
152 | } |