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1 | /* |
2 | * arch/arm/mach-tegra/fuse.c | |
3 | * | |
4 | * Copyright (C) 2010 Google, Inc. | |
5 | * | |
6 | * Author: | |
7 | * Colin Cross <ccross@android.com> | |
8 | * | |
9 | * This software is licensed under the terms of the GNU General Public | |
10 | * License version 2, as published by the Free Software Foundation, and | |
11 | * may be copied, distributed, and modified under those terms. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | */ | |
19 | ||
20 | #include <linux/kernel.h> | |
21 | #include <linux/io.h> | |
e87e06cd | 22 | #include <linux/module.h> |
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23 | |
24 | #include <mach/iomap.h> | |
25 | ||
26 | #include "fuse.h" | |
27 | ||
28 | #define FUSE_UID_LOW 0x108 | |
29 | #define FUSE_UID_HIGH 0x10c | |
30 | #define FUSE_SKU_INFO 0x110 | |
31 | #define FUSE_SPARE_BIT 0x200 | |
32 | ||
33 | static inline u32 fuse_readl(unsigned long offset) | |
34 | { | |
35 | return readl(IO_TO_VIRT(TEGRA_FUSE_BASE + offset)); | |
36 | } | |
37 | ||
38 | static inline void fuse_writel(u32 value, unsigned long offset) | |
39 | { | |
40 | writel(value, IO_TO_VIRT(TEGRA_FUSE_BASE + offset)); | |
41 | } | |
42 | ||
43 | void tegra_init_fuse(void) | |
44 | { | |
45 | u32 reg = readl(IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48)); | |
46 | reg |= 1 << 28; | |
47 | writel(reg, IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48)); | |
48 | ||
49 | pr_info("Tegra SKU: %d CPU Process: %d Core Process: %d\n", | |
50 | tegra_sku_id(), tegra_cpu_process_id(), | |
51 | tegra_core_process_id()); | |
52 | } | |
53 | ||
54 | unsigned long long tegra_chip_uid(void) | |
55 | { | |
56 | unsigned long long lo, hi; | |
57 | ||
58 | lo = fuse_readl(FUSE_UID_LOW); | |
59 | hi = fuse_readl(FUSE_UID_HIGH); | |
60 | return (hi << 32ull) | lo; | |
61 | } | |
e87e06cd | 62 | EXPORT_SYMBOL(tegra_chip_uid); |
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63 | |
64 | int tegra_sku_id(void) | |
65 | { | |
66 | int sku_id; | |
67 | u32 reg = fuse_readl(FUSE_SKU_INFO); | |
68 | sku_id = reg & 0xFF; | |
69 | return sku_id; | |
70 | } | |
71 | ||
72 | int tegra_cpu_process_id(void) | |
73 | { | |
74 | int cpu_process_id; | |
75 | u32 reg = fuse_readl(FUSE_SPARE_BIT); | |
76 | cpu_process_id = (reg >> 6) & 3; | |
77 | return cpu_process_id; | |
78 | } | |
79 | ||
80 | int tegra_core_process_id(void) | |
81 | { | |
82 | int core_process_id; | |
83 | u32 reg = fuse_readl(FUSE_SPARE_BIT); | |
84 | core_process_id = (reg >> 12) & 3; | |
85 | return core_process_id; | |
86 | } |