Commit | Line | Data |
---|---|---|
88e790a4 PG |
1 | /* |
2 | * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License | |
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | ||
17 | #ifndef __MACH_TEGRA30_CLOCK_H | |
18 | #define __MACH_TEGRA30_CLOCK_H | |
19 | ||
92fe58f0 | 20 | extern struct clk_ops tegra_clk_32k_ops; |
88e790a4 PG |
21 | extern struct clk_ops tegra30_clk_m_ops; |
22 | extern struct clk_ops tegra_clk_m_div_ops; | |
23 | extern struct clk_ops tegra_pll_ref_ops; | |
24 | extern struct clk_ops tegra30_pll_ops; | |
25 | extern struct clk_ops tegra30_pll_div_ops; | |
26 | extern struct clk_ops tegra_plld_ops; | |
27 | extern struct clk_ops tegra30_plle_ops; | |
28 | extern struct clk_ops tegra_cml_clk_ops; | |
29 | extern struct clk_ops tegra_pciex_clk_ops; | |
30 | extern struct clk_ops tegra_sync_source_ops; | |
92fe58f0 | 31 | extern struct clk_ops tegra_audio_sync_clk_ops; |
88e790a4 PG |
32 | extern struct clk_ops tegra30_clk_double_ops; |
33 | extern struct clk_ops tegra_clk_out_ops; | |
34 | extern struct clk_ops tegra30_super_ops; | |
35 | extern struct clk_ops tegra30_blink_clk_ops; | |
36 | extern struct clk_ops tegra30_twd_ops; | |
37 | extern struct clk_ops tegra30_periph_clk_ops; | |
92fe58f0 | 38 | extern struct clk_ops tegra30_dsib_clk_ops; |
88e790a4 PG |
39 | extern struct clk_ops tegra_nand_clk_ops; |
40 | extern struct clk_ops tegra_vi_clk_ops; | |
41 | extern struct clk_ops tegra_dtv_clk_ops; | |
42 | extern struct clk_ops tegra_clk_shared_bus_ops; | |
43 | ||
92fe58f0 PG |
44 | int tegra30_plld_clk_cfg_ex(struct clk_hw *hw, |
45 | enum tegra_clk_ex_param p, u32 setting); | |
46 | void tegra30_periph_clk_reset(struct clk_hw *hw, bool assert); | |
47 | int tegra30_vi_clk_cfg_ex(struct clk_hw *hw, | |
48 | enum tegra_clk_ex_param p, u32 setting); | |
49 | int tegra30_nand_clk_cfg_ex(struct clk_hw *hw, | |
50 | enum tegra_clk_ex_param p, u32 setting); | |
51 | int tegra30_dtv_clk_cfg_ex(struct clk_hw *hw, | |
52 | enum tegra_clk_ex_param p, u32 setting); | |
88e790a4 | 53 | #endif |