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c0af14d3 OL |
1 | /* |
2 | * Copyright (C) ST-Ericsson SA 2010 | |
3 | * | |
4 | * License terms: GNU General Public License (GPL), version 2 | |
5 | */ | |
6 | ||
7 | #include <linux/platform_device.h> | |
8 | #include <linux/init.h> | |
9 | #include <linux/gpio.h> | |
bb16bd9b | 10 | #include <linux/platform_data/pinctrl-nomadik.h> |
865fab60 | 11 | #include <linux/platform_data/dma-ste-dma40.h> |
c0af14d3 | 12 | |
e657bcf6 | 13 | #include "devices.h" |
eba52748 | 14 | #include "irqs.h" |
ab0fc6ce | 15 | #include <linux/platform_data/asoc-ux500-msp.h> |
c0af14d3 | 16 | |
08d98fe0 | 17 | #include "ste-dma40-db8500.h" |
c0af14d3 OL |
18 | #include "board-mop500.h" |
19 | #include "devices-db8500.h" | |
20 | #include "pins-db8500.h" | |
21 | ||
c0af14d3 OL |
22 | static struct stedma40_chan_cfg msp0_dma_rx = { |
23 | .high_priority = true, | |
24 | .dir = STEDMA40_PERIPH_TO_MEM, | |
25 | ||
26 | .src_dev_type = DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX, | |
27 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
28 | ||
29 | .src_info.psize = STEDMA40_PSIZE_LOG_4, | |
30 | .dst_info.psize = STEDMA40_PSIZE_LOG_4, | |
31 | ||
32 | /* data_width is set during configuration */ | |
33 | }; | |
34 | ||
35 | static struct stedma40_chan_cfg msp0_dma_tx = { | |
36 | .high_priority = true, | |
37 | .dir = STEDMA40_MEM_TO_PERIPH, | |
38 | ||
39 | .src_dev_type = STEDMA40_DEV_DST_MEMORY, | |
40 | .dst_dev_type = DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX, | |
41 | ||
42 | .src_info.psize = STEDMA40_PSIZE_LOG_4, | |
43 | .dst_info.psize = STEDMA40_PSIZE_LOG_4, | |
44 | ||
45 | /* data_width is set during configuration */ | |
46 | }; | |
47 | ||
724ebbf4 | 48 | struct msp_i2s_platform_data msp0_platform_data = { |
c0af14d3 OL |
49 | .id = MSP_I2S_0, |
50 | .msp_i2s_dma_rx = &msp0_dma_rx, | |
51 | .msp_i2s_dma_tx = &msp0_dma_tx, | |
52 | }; | |
53 | ||
54 | static struct stedma40_chan_cfg msp1_dma_rx = { | |
55 | .high_priority = true, | |
56 | .dir = STEDMA40_PERIPH_TO_MEM, | |
57 | ||
58 | .src_dev_type = DB8500_DMA_DEV30_MSP3_RX, | |
59 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
60 | ||
61 | .src_info.psize = STEDMA40_PSIZE_LOG_4, | |
62 | .dst_info.psize = STEDMA40_PSIZE_LOG_4, | |
63 | ||
64 | /* data_width is set during configuration */ | |
65 | }; | |
66 | ||
67 | static struct stedma40_chan_cfg msp1_dma_tx = { | |
68 | .high_priority = true, | |
69 | .dir = STEDMA40_MEM_TO_PERIPH, | |
70 | ||
71 | .src_dev_type = STEDMA40_DEV_DST_MEMORY, | |
72 | .dst_dev_type = DB8500_DMA_DEV30_MSP1_TX, | |
73 | ||
74 | .src_info.psize = STEDMA40_PSIZE_LOG_4, | |
75 | .dst_info.psize = STEDMA40_PSIZE_LOG_4, | |
76 | ||
77 | /* data_width is set during configuration */ | |
78 | }; | |
79 | ||
724ebbf4 | 80 | struct msp_i2s_platform_data msp1_platform_data = { |
c0af14d3 OL |
81 | .id = MSP_I2S_1, |
82 | .msp_i2s_dma_rx = NULL, | |
83 | .msp_i2s_dma_tx = &msp1_dma_tx, | |
c0af14d3 OL |
84 | }; |
85 | ||
86 | static struct stedma40_chan_cfg msp2_dma_rx = { | |
87 | .high_priority = true, | |
88 | .dir = STEDMA40_PERIPH_TO_MEM, | |
89 | ||
90 | .src_dev_type = DB8500_DMA_DEV14_MSP2_RX, | |
91 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
92 | ||
93 | /* MSP2 DMA doesn't work with PSIZE == 4 on DB8500v2 */ | |
94 | .src_info.psize = STEDMA40_PSIZE_LOG_1, | |
95 | .dst_info.psize = STEDMA40_PSIZE_LOG_1, | |
96 | ||
97 | /* data_width is set during configuration */ | |
98 | }; | |
99 | ||
100 | static struct stedma40_chan_cfg msp2_dma_tx = { | |
101 | .high_priority = true, | |
102 | .dir = STEDMA40_MEM_TO_PERIPH, | |
103 | ||
104 | .src_dev_type = STEDMA40_DEV_DST_MEMORY, | |
105 | .dst_dev_type = DB8500_DMA_DEV14_MSP2_TX, | |
106 | ||
107 | .src_info.psize = STEDMA40_PSIZE_LOG_4, | |
108 | .dst_info.psize = STEDMA40_PSIZE_LOG_4, | |
109 | ||
110 | .use_fixed_channel = true, | |
111 | .phy_channel = 1, | |
112 | ||
113 | /* data_width is set during configuration */ | |
114 | }; | |
115 | ||
09486cbb LW |
116 | static struct platform_device *db8500_add_msp_i2s(struct device *parent, |
117 | int id, | |
c0af14d3 OL |
118 | resource_size_t base, int irq, |
119 | struct msp_i2s_platform_data *pdata) | |
120 | { | |
121 | struct platform_device *pdev; | |
122 | struct resource res[] = { | |
123 | DEFINE_RES_MEM(base, SZ_4K), | |
124 | DEFINE_RES_IRQ(irq), | |
125 | }; | |
126 | ||
127 | pr_info("Register platform-device 'ux500-msp-i2s', id %d, irq %d\n", | |
128 | id, irq); | |
129 | pdev = platform_device_register_resndata(parent, "ux500-msp-i2s", id, | |
130 | res, ARRAY_SIZE(res), | |
131 | pdata, sizeof(*pdata)); | |
132 | if (!pdev) { | |
133 | pr_err("Failed to register platform-device 'ux500-msp-i2s.%d'!\n", | |
134 | id); | |
09486cbb | 135 | return NULL; |
c0af14d3 OL |
136 | } |
137 | ||
09486cbb | 138 | return pdev; |
c0af14d3 OL |
139 | } |
140 | ||
97f50c6c LJ |
141 | /* Platform device for ASoC MOP500 machine */ |
142 | static struct platform_device snd_soc_mop500 = { | |
65b67d33 LJ |
143 | .name = "snd-soc-mop500", |
144 | .id = 0, | |
145 | .dev = { | |
146 | .platform_data = NULL, | |
147 | }, | |
c0af14d3 OL |
148 | }; |
149 | ||
724ebbf4 | 150 | struct msp_i2s_platform_data msp2_platform_data = { |
c0af14d3 OL |
151 | .id = MSP_I2S_2, |
152 | .msp_i2s_dma_rx = &msp2_dma_rx, | |
153 | .msp_i2s_dma_tx = &msp2_dma_tx, | |
154 | }; | |
155 | ||
724ebbf4 | 156 | struct msp_i2s_platform_data msp3_platform_data = { |
c0af14d3 OL |
157 | .id = MSP_I2S_3, |
158 | .msp_i2s_dma_rx = &msp1_dma_rx, | |
159 | .msp_i2s_dma_tx = NULL, | |
c0af14d3 OL |
160 | }; |
161 | ||
39b740bf | 162 | void mop500_audio_init(struct device *parent) |
c0af14d3 | 163 | { |
97f50c6c LJ |
164 | pr_info("%s: Register platform-device 'snd-soc-mop500'.\n", __func__); |
165 | platform_device_register(&snd_soc_mop500); | |
c0af14d3 OL |
166 | |
167 | pr_info("Initialize MSP I2S-devices.\n"); | |
09486cbb LW |
168 | db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0, |
169 | &msp0_platform_data); | |
5ca032ee | 170 | db8500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1, |
09486cbb LW |
171 | &msp1_platform_data); |
172 | db8500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2, | |
173 | &msp2_platform_data); | |
174 | db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1, | |
175 | &msp3_platform_data); | |
c0af14d3 | 176 | } |