Commit | Line | Data |
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4f724bea SI |
1 | /* |
2 | * Copyright (C) ST-Ericsson SA 2010 | |
3 | * | |
4 | * License Terms: GNU General Public License v2 | |
5 | * | |
a1e516e3 BJ |
6 | * Authors: Sundar Iyer <sundar.iyer@stericsson.com> |
7 | * Bengt Jonsson <bengt.g.jonsson@stericsson.com> | |
547f384f | 8 | * Daniel Willerud <daniel.willerud@stericsson.com> |
4f724bea SI |
9 | * |
10 | * MOP500 board specific initialization for regulators | |
11 | */ | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/regulator/machine.h> | |
a1e516e3 | 14 | #include <linux/regulator/ab8500.h> |
d1de85a2 | 15 | #include "board-mop500-regulators.h" |
0fbc8007 | 16 | #include "id.h" |
d1de85a2 | 17 | |
0b5ea1e2 LJ |
18 | static struct regulator_consumer_supply gpio_en_3v3_consumers[] = { |
19 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | |
20 | }; | |
21 | ||
22 | struct regulator_init_data gpio_en_3v3_regulator = { | |
23 | .constraints = { | |
24 | .name = "EN-3V3", | |
25 | .min_uV = 3300000, | |
26 | .max_uV = 3300000, | |
27 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
28 | }, | |
29 | .num_consumer_supplies = ARRAY_SIZE(gpio_en_3v3_consumers), | |
30 | .consumer_supplies = gpio_en_3v3_consumers, | |
31 | }; | |
32 | ||
fe67dfc8 LW |
33 | /* |
34 | * TPS61052 regulator | |
35 | */ | |
36 | static struct regulator_consumer_supply tps61052_vaudio_consumers[] = { | |
37 | /* | |
38 | * Boost converter supply to raise voltage on audio speaker, this | |
39 | * is actually connected to three pins, VInVhfL (left amplifier) | |
40 | * VInVhfR (right amplifier) and VIntDClassInt - all three must | |
41 | * be connected to the same voltage. | |
42 | */ | |
43 | REGULATOR_SUPPLY("vintdclassint", "ab8500-codec.0"), | |
44 | }; | |
45 | ||
46 | struct regulator_init_data tps61052_regulator = { | |
47 | .constraints = { | |
48 | .name = "vaudio-hf", | |
49 | .min_uV = 4500000, | |
50 | .max_uV = 4500000, | |
51 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
52 | }, | |
53 | .num_consumer_supplies = ARRAY_SIZE(tps61052_vaudio_consumers), | |
54 | .consumer_supplies = tps61052_vaudio_consumers, | |
55 | }; | |
56 | ||
d1de85a2 | 57 | static struct regulator_consumer_supply ab8500_vaux1_consumers[] = { |
27f26de1 LJ |
58 | /* Main display, u8500 R3 uib */ |
59 | REGULATOR_SUPPLY("vddi", "mcde_disp_sony_acx424akp.0"), | |
60 | /* Main display, u8500 uib and ST uib */ | |
61 | REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.0"), | |
62 | /* Secondary display, ST uib */ | |
63 | REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.1"), | |
d1de85a2 LW |
64 | /* SFH7741 proximity sensor */ |
65 | REGULATOR_SUPPLY("vcc", "gpio-keys.0"), | |
66 | /* BH1780GLS ambient light sensor */ | |
67 | REGULATOR_SUPPLY("vcc", "2-0029"), | |
68 | /* lsm303dlh accelerometer */ | |
a652f3d2 | 69 | REGULATOR_SUPPLY("vdd", "2-0018"), |
cb6795ac LJ |
70 | /* lsm303dlhc accelerometer */ |
71 | REGULATOR_SUPPLY("vdd", "2-0019"), | |
d1de85a2 | 72 | /* lsm303dlh magnetometer */ |
cb6795ac | 73 | REGULATOR_SUPPLY("vdd", "2-001e"), |
d1de85a2 LW |
74 | /* Rohm BU21013 Touchscreen devices */ |
75 | REGULATOR_SUPPLY("avdd", "3-005c"), | |
76 | REGULATOR_SUPPLY("avdd", "3-005d"), | |
77 | /* Synaptics RMI4 Touchscreen device */ | |
78 | REGULATOR_SUPPLY("vdd", "3-004b"), | |
efb34d27 LJ |
79 | /* L3G4200D Gyroscope device */ |
80 | REGULATOR_SUPPLY("vdd", "2-0068"), | |
2d0266ab LJ |
81 | /* Ambient light sensor device */ |
82 | REGULATOR_SUPPLY("vdd", "3-0029"), | |
4336c1d2 LJ |
83 | /* Pressure sensor device */ |
84 | REGULATOR_SUPPLY("vdd", "2-005c"), | |
5379f026 LJ |
85 | /* Cypress TrueTouch Touchscreen device */ |
86 | REGULATOR_SUPPLY("vcpin", "spi8.0"), | |
fa679523 LJ |
87 | /* Camera device */ |
88 | REGULATOR_SUPPLY("vaux12v5", "mmio_camera"), | |
d1de85a2 LW |
89 | }; |
90 | ||
91 | static struct regulator_consumer_supply ab8500_vaux2_consumers[] = { | |
92 | /* On-board eMMC power */ | |
93 | REGULATOR_SUPPLY("vmmc", "sdi4"), | |
94 | /* AB8500 audio codec */ | |
95 | REGULATOR_SUPPLY("vcc-N2158", "ab8500-codec.0"), | |
a652f3d2 LJ |
96 | /* AB8500 accessory detect 1 */ |
97 | REGULATOR_SUPPLY("vcc-N2158", "ab8500-acc-det.0"), | |
98 | /* AB8500 Tv-out device */ | |
99 | REGULATOR_SUPPLY("vcc-N2158", "mcde_tv_ab8500.4"), | |
100 | /* AV8100 HDMI device */ | |
101 | REGULATOR_SUPPLY("vcc-N2158", "av8100_hdmi.3"), | |
d1de85a2 LW |
102 | }; |
103 | ||
104 | static struct regulator_consumer_supply ab8500_vaux3_consumers[] = { | |
a652f3d2 | 105 | REGULATOR_SUPPLY("v-SD-STM", "stm"), |
d1de85a2 LW |
106 | /* External MMC slot power */ |
107 | REGULATOR_SUPPLY("vmmc", "sdi0"), | |
108 | }; | |
109 | ||
547f384f LJ |
110 | static struct regulator_consumer_supply ab8505_vaux4_consumers[] = { |
111 | }; | |
112 | ||
113 | static struct regulator_consumer_supply ab8505_vaux5_consumers[] = { | |
114 | }; | |
115 | ||
116 | static struct regulator_consumer_supply ab8505_vaux6_consumers[] = { | |
117 | }; | |
118 | ||
119 | static struct regulator_consumer_supply ab8505_vaux8_consumers[] = { | |
120 | /* AB8500 audio codec device */ | |
121 | REGULATOR_SUPPLY("v-aux8", NULL), | |
122 | }; | |
123 | ||
124 | static struct regulator_consumer_supply ab8505_vadc_consumers[] = { | |
125 | /* Internal general-purpose ADC */ | |
126 | REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"), | |
127 | /* ADC for charger */ | |
128 | REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"), | |
129 | }; | |
130 | ||
d1de85a2 LW |
131 | static struct regulator_consumer_supply ab8500_vtvout_consumers[] = { |
132 | /* TV-out DENC supply */ | |
133 | REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"), | |
134 | /* Internal general-purpose ADC */ | |
135 | REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"), | |
a652f3d2 LJ |
136 | /* ADC for charger */ |
137 | REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"), | |
138 | /* AB8500 Tv-out device */ | |
139 | REGULATOR_SUPPLY("vtvout", "mcde_tv_ab8500.4"), | |
d1de85a2 LW |
140 | }; |
141 | ||
29bd2ab8 OL |
142 | static struct regulator_consumer_supply ab8500_vaud_consumers[] = { |
143 | /* AB8500 audio-codec main supply */ | |
144 | REGULATOR_SUPPLY("vaud", "ab8500-codec.0"), | |
145 | }; | |
146 | ||
147 | static struct regulator_consumer_supply ab8500_vamic1_consumers[] = { | |
148 | /* AB8500 audio-codec Mic1 supply */ | |
149 | REGULATOR_SUPPLY("vamic1", "ab8500-codec.0"), | |
150 | }; | |
151 | ||
152 | static struct regulator_consumer_supply ab8500_vamic2_consumers[] = { | |
153 | /* AB8500 audio-codec Mic2 supply */ | |
154 | REGULATOR_SUPPLY("vamic2", "ab8500-codec.0"), | |
155 | }; | |
156 | ||
157 | static struct regulator_consumer_supply ab8500_vdmic_consumers[] = { | |
158 | /* AB8500 audio-codec DMic supply */ | |
159 | REGULATOR_SUPPLY("vdmic", "ab8500-codec.0"), | |
160 | }; | |
161 | ||
d1de85a2 LW |
162 | static struct regulator_consumer_supply ab8500_vintcore_consumers[] = { |
163 | /* SoC core supply, no device */ | |
164 | REGULATOR_SUPPLY("v-intcore", NULL), | |
7c9d440e | 165 | /* USB Transceiver */ |
d1de85a2 | 166 | REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"), |
a652f3d2 LJ |
167 | /* Handled by abx500 clk driver */ |
168 | REGULATOR_SUPPLY("v-intcore", "abx500-clk.0"), | |
d1de85a2 LW |
169 | }; |
170 | ||
547f384f LJ |
171 | static struct regulator_consumer_supply ab8505_usb_consumers[] = { |
172 | /* HS USB OTG physical interface */ | |
173 | REGULATOR_SUPPLY("v-ape", NULL), | |
174 | }; | |
175 | ||
d1de85a2 | 176 | static struct regulator_consumer_supply ab8500_vana_consumers[] = { |
a652f3d2 LJ |
177 | /* DB8500 DSI */ |
178 | REGULATOR_SUPPLY("vdddsi1v2", "mcde"), | |
179 | REGULATOR_SUPPLY("vdddsi1v2", "b2r2_core"), | |
180 | REGULATOR_SUPPLY("vdddsi1v2", "b2r2_1_core"), | |
181 | REGULATOR_SUPPLY("vdddsi1v2", "dsilink.0"), | |
182 | REGULATOR_SUPPLY("vdddsi1v2", "dsilink.1"), | |
183 | REGULATOR_SUPPLY("vdddsi1v2", "dsilink.2"), | |
184 | /* DB8500 CSI */ | |
185 | REGULATOR_SUPPLY("vddcsi1v2", "mmio_camera"), | |
d1de85a2 | 186 | }; |
4f724bea | 187 | |
dfa3a824 | 188 | /* ab8500 regulator register initialization */ |
732805a5 | 189 | static struct ab8500_regulator_reg_init ab8500_reg_init[] = { |
dfa3a824 BJ |
190 | /* |
191 | * VanaRequestCtrl = HP/LP depending on VxRequest | |
192 | * VextSupply1RequestCtrl = HP/LP depending on VxRequest | |
193 | */ | |
43a5911b | 194 | INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0xf0, 0x00), |
dfa3a824 BJ |
195 | /* |
196 | * VextSupply2RequestCtrl = HP/LP depending on VxRequest | |
197 | * VextSupply3RequestCtrl = HP/LP depending on VxRequest | |
198 | * Vaux1RequestCtrl = HP/LP depending on VxRequest | |
199 | * Vaux2RequestCtrl = HP/LP depending on VxRequest | |
200 | */ | |
3c1b8438 | 201 | INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0xff, 0x00), |
dfa3a824 BJ |
202 | /* |
203 | * Vaux3RequestCtrl = HP/LP depending on VxRequest | |
204 | * SwHPReq = Control through SWValid disabled | |
205 | */ | |
3c1b8438 | 206 | INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x07, 0x00), |
dfa3a824 BJ |
207 | /* |
208 | * VanaSysClkReq1HPValid = disabled | |
209 | * Vaux1SysClkReq1HPValid = disabled | |
210 | * Vaux2SysClkReq1HPValid = disabled | |
211 | * Vaux3SysClkReq1HPValid = disabled | |
212 | */ | |
43a5911b | 213 | INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00), |
dfa3a824 BJ |
214 | /* |
215 | * VextSupply1SysClkReq1HPValid = disabled | |
216 | * VextSupply2SysClkReq1HPValid = disabled | |
217 | * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled | |
218 | */ | |
3c1b8438 | 219 | INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x70, 0x40), |
dfa3a824 BJ |
220 | /* |
221 | * VanaHwHPReq1Valid = disabled | |
222 | * Vaux1HwHPreq1Valid = disabled | |
223 | * Vaux2HwHPReq1Valid = disabled | |
224 | * Vaux3HwHPReqValid = disabled | |
225 | */ | |
3c1b8438 | 226 | INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0xe8, 0x00), |
dfa3a824 BJ |
227 | /* |
228 | * VextSupply1HwHPReq1Valid = disabled | |
229 | * VextSupply2HwHPReq1Valid = disabled | |
230 | * VextSupply3HwHPReq1Valid = disabled | |
231 | */ | |
3c1b8438 | 232 | INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x07, 0x00), |
dfa3a824 BJ |
233 | /* |
234 | * VanaHwHPReq2Valid = disabled | |
235 | * Vaux1HwHPReq2Valid = disabled | |
236 | * Vaux2HwHPReq2Valid = disabled | |
237 | * Vaux3HwHPReq2Valid = disabled | |
238 | */ | |
3c1b8438 | 239 | INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0xe8, 0x00), |
dfa3a824 BJ |
240 | /* |
241 | * VextSupply1HwHPReq2Valid = disabled | |
242 | * VextSupply2HwHPReq2Valid = disabled | |
243 | * VextSupply3HwHPReq2Valid = HWReq2 controlled | |
244 | */ | |
3c1b8438 | 245 | INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x07, 0x04), |
dfa3a824 BJ |
246 | /* |
247 | * VanaSwHPReqValid = disabled | |
248 | * Vaux1SwHPReqValid = disabled | |
249 | */ | |
3c1b8438 | 250 | INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0xa0, 0x00), |
dfa3a824 BJ |
251 | /* |
252 | * Vaux2SwHPReqValid = disabled | |
253 | * Vaux3SwHPReqValid = disabled | |
254 | * VextSupply1SwHPReqValid = disabled | |
255 | * VextSupply2SwHPReqValid = disabled | |
256 | * VextSupply3SwHPReqValid = disabled | |
257 | */ | |
3c1b8438 | 258 | INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x1f, 0x00), |
dfa3a824 BJ |
259 | /* |
260 | * SysClkReq2Valid1 = SysClkReq2 controlled | |
261 | * SysClkReq3Valid1 = disabled | |
262 | * SysClkReq4Valid1 = SysClkReq4 controlled | |
263 | * SysClkReq5Valid1 = disabled | |
264 | * SysClkReq6Valid1 = SysClkReq6 controlled | |
265 | * SysClkReq7Valid1 = disabled | |
266 | * SysClkReq8Valid1 = disabled | |
267 | */ | |
3c1b8438 | 268 | INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0xfe, 0x2a), |
dfa3a824 BJ |
269 | /* |
270 | * SysClkReq2Valid2 = disabled | |
271 | * SysClkReq3Valid2 = disabled | |
272 | * SysClkReq4Valid2 = disabled | |
273 | * SysClkReq5Valid2 = disabled | |
274 | * SysClkReq6Valid2 = SysClkReq6 controlled | |
275 | * SysClkReq7Valid2 = disabled | |
276 | * SysClkReq8Valid2 = disabled | |
277 | */ | |
3c1b8438 | 278 | INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0xfe, 0x20), |
dfa3a824 BJ |
279 | /* |
280 | * VTVoutEna = disabled | |
281 | * Vintcore12Ena = disabled | |
282 | * Vintcore12Sel = 1.25 V | |
283 | * Vintcore12LP = inactive (HP) | |
284 | * VTVoutLP = inactive (HP) | |
285 | */ | |
3c1b8438 | 286 | INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0xfe, 0x10), |
dfa3a824 BJ |
287 | /* |
288 | * VaudioEna = disabled | |
289 | * VdmicEna = disabled | |
290 | * Vamic1Ena = disabled | |
291 | * Vamic2Ena = disabled | |
292 | */ | |
3c1b8438 | 293 | INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x1e, 0x00), |
dfa3a824 BJ |
294 | /* |
295 | * Vamic1_dzout = high-Z when Vamic1 is disabled | |
296 | * Vamic2_dzout = high-Z when Vamic2 is disabled | |
297 | */ | |
3c1b8438 | 298 | INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x03, 0x00), |
d79df329 | 299 | /* |
43a5911b | 300 | * VPll = Hw controlled (NOTE! PRCMU bits) |
dfa3a824 BJ |
301 | * VanaRegu = force off |
302 | */ | |
3c1b8438 | 303 | INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x0f, 0x02), |
dfa3a824 BJ |
304 | /* |
305 | * VrefDDREna = disabled | |
306 | * VrefDDRSleepMode = inactive (no pulldown) | |
307 | */ | |
3c1b8438 | 308 | INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x03, 0x00), |
dfa3a824 | 309 | /* |
a387ac5f LJ |
310 | * VextSupply1Regu = force LP |
311 | * VextSupply2Regu = force OFF | |
312 | * VextSupply3Regu = force HP (-> STBB2=LP and TPS=LP) | |
dfa3a824 BJ |
313 | * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0 |
314 | * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0 | |
315 | */ | |
a387ac5f | 316 | INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0xff, 0x13), |
dfa3a824 BJ |
317 | /* |
318 | * Vaux1Regu = force HP | |
319 | * Vaux2Regu = force off | |
320 | */ | |
3c1b8438 | 321 | INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x0f, 0x01), |
dfa3a824 | 322 | /* |
d79df329 | 323 | * Vaux3Regu = force off |
dfa3a824 | 324 | */ |
43a5911b | 325 | INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x03, 0x00), |
dfa3a824 | 326 | /* |
a652f3d2 | 327 | * Vaux1Sel = 2.8 V |
dfa3a824 | 328 | */ |
a652f3d2 | 329 | INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x0f, 0x0C), |
dfa3a824 BJ |
330 | /* |
331 | * Vaux2Sel = 2.9 V | |
332 | */ | |
3c1b8438 | 333 | INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0f, 0x0d), |
dfa3a824 BJ |
334 | /* |
335 | * Vaux3Sel = 2.91 V | |
336 | */ | |
3c1b8438 | 337 | INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07, 0x07), |
dfa3a824 BJ |
338 | /* |
339 | * VextSupply12LP = disabled (no LP) | |
340 | */ | |
3c1b8438 | 341 | INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x01, 0x00), |
dfa3a824 BJ |
342 | /* |
343 | * Vaux1Disch = short discharge time | |
344 | * Vaux2Disch = short discharge time | |
345 | * Vaux3Disch = short discharge time | |
346 | * Vintcore12Disch = short discharge time | |
347 | * VTVoutDisch = short discharge time | |
348 | * VaudioDisch = short discharge time | |
349 | */ | |
3c1b8438 | 350 | INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0xfc, 0x00), |
dfa3a824 BJ |
351 | /* |
352 | * VanaDisch = short discharge time | |
353 | * VdmicPullDownEna = pulldown disabled when Vdmic is disabled | |
354 | * VdmicDisch = short discharge time | |
355 | */ | |
3c1b8438 | 356 | INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x16, 0x00), |
dfa3a824 BJ |
357 | }; |
358 | ||
a1e516e3 | 359 | /* AB8500 regulators */ |
732805a5 | 360 | static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = { |
a1e516e3 BJ |
361 | /* supplies to the display/camera */ |
362 | [AB8500_LDO_AUX1] = { | |
67b7c75e | 363 | .supply_regulator = "ab8500-ext-supply3", |
a1e516e3 BJ |
364 | .constraints = { |
365 | .name = "V-DISPLAY", | |
a652f3d2 LJ |
366 | .min_uV = 2800000, |
367 | .max_uV = 3300000, | |
a1e516e3 BJ |
368 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
369 | REGULATOR_CHANGE_STATUS, | |
db24520f | 370 | .boot_on = 1, /* display is on at boot */ |
a1e516e3 | 371 | }, |
d1de85a2 LW |
372 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers), |
373 | .consumer_supplies = ab8500_vaux1_consumers, | |
4f724bea | 374 | }, |
a1e516e3 BJ |
375 | /* supplies to the on-board eMMC */ |
376 | [AB8500_LDO_AUX2] = { | |
67b7c75e | 377 | .supply_regulator = "ab8500-ext-supply3", |
a1e516e3 BJ |
378 | .constraints = { |
379 | .name = "V-eMMC1", | |
380 | .min_uV = 1100000, | |
381 | .max_uV = 3300000, | |
382 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
a652f3d2 LJ |
383 | REGULATOR_CHANGE_STATUS | |
384 | REGULATOR_CHANGE_MODE, | |
385 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
386 | REGULATOR_MODE_IDLE, | |
a1e516e3 | 387 | }, |
d1de85a2 LW |
388 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers), |
389 | .consumer_supplies = ab8500_vaux2_consumers, | |
4f724bea | 390 | }, |
a1e516e3 BJ |
391 | /* supply for VAUX3, supplies to SDcard slots */ |
392 | [AB8500_LDO_AUX3] = { | |
67b7c75e | 393 | .supply_regulator = "ab8500-ext-supply3", |
a1e516e3 BJ |
394 | .constraints = { |
395 | .name = "V-MMC-SD", | |
396 | .min_uV = 1100000, | |
397 | .max_uV = 3300000, | |
398 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
a652f3d2 LJ |
399 | REGULATOR_CHANGE_STATUS | |
400 | REGULATOR_CHANGE_MODE, | |
401 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
402 | REGULATOR_MODE_IDLE, | |
a1e516e3 | 403 | }, |
d1de85a2 LW |
404 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers), |
405 | .consumer_supplies = ab8500_vaux3_consumers, | |
4f724bea | 406 | }, |
a1e516e3 BJ |
407 | /* supply for tvout, gpadc, TVOUT LDO */ |
408 | [AB8500_LDO_TVOUT] = { | |
409 | .constraints = { | |
410 | .name = "V-TVOUT", | |
411 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
412 | }, | |
d1de85a2 LW |
413 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vtvout_consumers), |
414 | .consumer_supplies = ab8500_vtvout_consumers, | |
4f724bea | 415 | }, |
a1e516e3 BJ |
416 | /* supply for ab8500-vaudio, VAUDIO LDO */ |
417 | [AB8500_LDO_AUDIO] = { | |
418 | .constraints = { | |
419 | .name = "V-AUD", | |
420 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
421 | }, | |
29bd2ab8 OL |
422 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers), |
423 | .consumer_supplies = ab8500_vaud_consumers, | |
4f724bea | 424 | }, |
a1e516e3 BJ |
425 | /* supply for v-anamic1 VAMic1-LDO */ |
426 | [AB8500_LDO_ANAMIC1] = { | |
427 | .constraints = { | |
428 | .name = "V-AMIC1", | |
429 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
430 | }, | |
29bd2ab8 OL |
431 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers), |
432 | .consumer_supplies = ab8500_vamic1_consumers, | |
4f724bea | 433 | }, |
a1e516e3 BJ |
434 | /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */ |
435 | [AB8500_LDO_ANAMIC2] = { | |
436 | .constraints = { | |
437 | .name = "V-AMIC2", | |
438 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
439 | }, | |
29bd2ab8 OL |
440 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers), |
441 | .consumer_supplies = ab8500_vamic2_consumers, | |
4f724bea | 442 | }, |
a1e516e3 BJ |
443 | /* supply for v-dmic, VDMIC LDO */ |
444 | [AB8500_LDO_DMIC] = { | |
445 | .constraints = { | |
446 | .name = "V-DMIC", | |
447 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
448 | }, | |
29bd2ab8 OL |
449 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vdmic_consumers), |
450 | .consumer_supplies = ab8500_vdmic_consumers, | |
4f724bea | 451 | }, |
a1e516e3 BJ |
452 | /* supply for v-intcore12, VINTCORE12 LDO */ |
453 | [AB8500_LDO_INTCORE] = { | |
454 | .constraints = { | |
455 | .name = "V-INTCORE", | |
a652f3d2 LJ |
456 | .min_uV = 1250000, |
457 | .max_uV = 1350000, | |
458 | .input_uV = 1800000, | |
459 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
460 | REGULATOR_CHANGE_STATUS | | |
461 | REGULATOR_CHANGE_MODE | | |
462 | REGULATOR_CHANGE_DRMS, | |
463 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
464 | REGULATOR_MODE_IDLE, | |
a1e516e3 | 465 | }, |
d1de85a2 LW |
466 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers), |
467 | .consumer_supplies = ab8500_vintcore_consumers, | |
4f724bea | 468 | }, |
a652f3d2 | 469 | /* supply for U8500 CSI-DSI, VANA LDO */ |
a1e516e3 BJ |
470 | [AB8500_LDO_ANA] = { |
471 | .constraints = { | |
a652f3d2 | 472 | .name = "V-CSI-DSI", |
a1e516e3 BJ |
473 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
474 | }, | |
d1de85a2 LW |
475 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers), |
476 | .consumer_supplies = ab8500_vana_consumers, | |
4f724bea SI |
477 | }, |
478 | }; | |
732805a5 | 479 | |
a387ac5f LJ |
480 | /* supply for VextSupply3 */ |
481 | static struct regulator_consumer_supply ab8500_ext_supply3_consumers[] = { | |
482 | /* SIM supply for 3 V SIM cards */ | |
483 | REGULATOR_SUPPLY("vinvsim", "sim-detect.0"), | |
484 | }; | |
485 | ||
486 | /* extended configuration for VextSupply2, only used for HREFP_V20 boards */ | |
487 | static struct ab8500_ext_regulator_cfg ab8500_ext_supply2 = { | |
488 | .hwreq = true, | |
489 | }; | |
490 | ||
491 | /* | |
492 | * AB8500 external regulators | |
493 | */ | |
494 | static struct regulator_init_data ab8500_ext_regulators[] = { | |
495 | /* fixed Vbat supplies VSMPS1_EXT_1V8 */ | |
496 | [AB8500_EXT_SUPPLY1] = { | |
497 | .constraints = { | |
498 | .name = "ab8500-ext-supply1", | |
499 | .min_uV = 1800000, | |
500 | .max_uV = 1800000, | |
501 | .initial_mode = REGULATOR_MODE_IDLE, | |
502 | .boot_on = 1, | |
503 | .always_on = 1, | |
504 | }, | |
505 | }, | |
506 | /* fixed Vbat supplies VSMPS2_EXT_1V36 and VSMPS5_EXT_1V15 */ | |
507 | [AB8500_EXT_SUPPLY2] = { | |
508 | .constraints = { | |
509 | .name = "ab8500-ext-supply2", | |
510 | .min_uV = 1360000, | |
511 | .max_uV = 1360000, | |
512 | }, | |
513 | }, | |
514 | /* fixed Vbat supplies VSMPS3_EXT_3V4 and VSMPS4_EXT_3V4 */ | |
515 | [AB8500_EXT_SUPPLY3] = { | |
516 | .constraints = { | |
517 | .name = "ab8500-ext-supply3", | |
518 | .min_uV = 3400000, | |
519 | .max_uV = 3400000, | |
520 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
521 | .boot_on = 1, | |
522 | }, | |
523 | .num_consumer_supplies = | |
524 | ARRAY_SIZE(ab8500_ext_supply3_consumers), | |
525 | .consumer_supplies = ab8500_ext_supply3_consumers, | |
526 | }, | |
527 | }; | |
528 | ||
547f384f LJ |
529 | /* ab8505 regulator register initialization */ |
530 | static struct ab8500_regulator_reg_init ab8505_reg_init[] = { | |
531 | /* | |
532 | * VarmRequestCtrl | |
533 | * VsmpsCRequestCtrl | |
534 | * VsmpsARequestCtrl | |
535 | * VsmpsBRequestCtrl | |
536 | */ | |
537 | INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL1, 0x00, 0x00), | |
538 | /* | |
539 | * VsafeRequestCtrl | |
540 | * VpllRequestCtrl | |
541 | * VanaRequestCtrl = HP/LP depending on VxRequest | |
542 | */ | |
543 | INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL2, 0x30, 0x00), | |
544 | /* | |
545 | * Vaux1RequestCtrl = HP/LP depending on VxRequest | |
546 | * Vaux2RequestCtrl = HP/LP depending on VxRequest | |
547 | */ | |
548 | INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL3, 0xf0, 0x00), | |
549 | /* | |
550 | * Vaux3RequestCtrl = HP/LP depending on VxRequest | |
551 | * SwHPReq = Control through SWValid disabled | |
552 | */ | |
553 | INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL4, 0x07, 0x00), | |
554 | /* | |
555 | * VsmpsASysClkReq1HPValid | |
556 | * VsmpsBSysClkReq1HPValid | |
557 | * VsafeSysClkReq1HPValid | |
558 | * VanaSysClkReq1HPValid = disabled | |
559 | * VpllSysClkReq1HPValid | |
560 | * Vaux1SysClkReq1HPValid = disabled | |
561 | * Vaux2SysClkReq1HPValid = disabled | |
562 | * Vaux3SysClkReq1HPValid = disabled | |
563 | */ | |
564 | INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00), | |
565 | /* | |
566 | * VsmpsCSysClkReq1HPValid | |
567 | * VarmSysClkReq1HPValid | |
568 | * VbbSysClkReq1HPValid | |
569 | * VsmpsMSysClkReq1HPValid | |
570 | */ | |
571 | INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID2, 0x00, 0x00), | |
572 | /* | |
573 | * VsmpsAHwHPReq1Valid | |
574 | * VsmpsBHwHPReq1Valid | |
575 | * VsafeHwHPReq1Valid | |
576 | * VanaHwHPReq1Valid = disabled | |
577 | * VpllHwHPReq1Valid | |
578 | * Vaux1HwHPreq1Valid = disabled | |
579 | * Vaux2HwHPReq1Valid = disabled | |
580 | * Vaux3HwHPReqValid = disabled | |
581 | */ | |
582 | INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID1, 0xe8, 0x00), | |
583 | /* | |
584 | * VsmpsMHwHPReq1Valid | |
585 | */ | |
586 | INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID2, 0x00, 0x00), | |
587 | /* | |
588 | * VsmpsAHwHPReq2Valid | |
589 | * VsmpsBHwHPReq2Valid | |
590 | * VsafeHwHPReq2Valid | |
591 | * VanaHwHPReq2Valid = disabled | |
592 | * VpllHwHPReq2Valid | |
593 | * Vaux1HwHPReq2Valid = disabled | |
594 | * Vaux2HwHPReq2Valid = disabled | |
595 | * Vaux3HwHPReq2Valid = disabled | |
596 | */ | |
597 | INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID1, 0xe8, 0x00), | |
598 | /* | |
599 | * VsmpsMHwHPReq2Valid | |
600 | */ | |
601 | INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID2, 0x00, 0x00), | |
602 | /** | |
603 | * VsmpsCSwHPReqValid | |
604 | * VarmSwHPReqValid | |
605 | * VsmpsASwHPReqValid | |
606 | * VsmpsBSwHPReqValid | |
607 | * VsafeSwHPReqValid | |
608 | * VanaSwHPReqValid | |
609 | * VanaSwHPReqValid = disabled | |
610 | * VpllSwHPReqValid | |
611 | * Vaux1SwHPReqValid = disabled | |
612 | */ | |
613 | INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID1, 0xa0, 0x00), | |
614 | /* | |
615 | * Vaux2SwHPReqValid = disabled | |
616 | * Vaux3SwHPReqValid = disabled | |
617 | * VsmpsMSwHPReqValid | |
618 | */ | |
619 | INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID2, 0x03, 0x00), | |
620 | /* | |
621 | * SysClkReq2Valid1 = SysClkReq2 controlled | |
622 | * SysClkReq3Valid1 = disabled | |
623 | * SysClkReq4Valid1 = SysClkReq4 controlled | |
624 | */ | |
625 | INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID1, 0x0e, 0x0a), | |
626 | /* | |
627 | * SysClkReq2Valid2 = disabled | |
628 | * SysClkReq3Valid2 = disabled | |
629 | * SysClkReq4Valid2 = disabled | |
630 | */ | |
631 | INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID2, 0x0e, 0x00), | |
632 | /* | |
633 | * Vaux4SwHPReqValid | |
634 | * Vaux4HwHPReq2Valid | |
635 | * Vaux4HwHPReq1Valid | |
636 | * Vaux4SysClkReq1HPValid | |
637 | */ | |
638 | INIT_REGULATOR_REGISTER(AB8505_REGUVAUX4REQVALID, 0x00, 0x00), | |
639 | /* | |
640 | * VadcEna = disabled | |
641 | * VintCore12Ena = disabled | |
642 | * VintCore12Sel = 1.25 V | |
643 | * VintCore12LP = inactive (HP) | |
644 | * VadcLP = inactive (HP) | |
645 | */ | |
646 | INIT_REGULATOR_REGISTER(AB8505_REGUMISC1, 0xfe, 0x10), | |
647 | /* | |
648 | * VaudioEna = disabled | |
649 | * Vaux8Ena = disabled | |
650 | * Vamic1Ena = disabled | |
651 | * Vamic2Ena = disabled | |
652 | */ | |
653 | INIT_REGULATOR_REGISTER(AB8505_VAUDIOSUPPLY, 0x1e, 0x00), | |
654 | /* | |
655 | * Vamic1_dzout = high-Z when Vamic1 is disabled | |
656 | * Vamic2_dzout = high-Z when Vamic2 is disabled | |
657 | */ | |
658 | INIT_REGULATOR_REGISTER(AB8505_REGUCTRL1VAMIC, 0x03, 0x00), | |
659 | /* | |
660 | * VsmpsARegu | |
661 | * VsmpsASelCtrl | |
662 | * VsmpsAAutoMode | |
663 | * VsmpsAPWMMode | |
664 | */ | |
665 | INIT_REGULATOR_REGISTER(AB8505_VSMPSAREGU, 0x00, 0x00), | |
666 | /* | |
667 | * VsmpsBRegu | |
668 | * VsmpsBSelCtrl | |
669 | * VsmpsBAutoMode | |
670 | * VsmpsBPWMMode | |
671 | */ | |
672 | INIT_REGULATOR_REGISTER(AB8505_VSMPSBREGU, 0x00, 0x00), | |
673 | /* | |
674 | * VsafeRegu | |
675 | * VsafeSelCtrl | |
676 | * VsafeAutoMode | |
677 | * VsafePWMMode | |
678 | */ | |
679 | INIT_REGULATOR_REGISTER(AB8505_VSAFEREGU, 0x00, 0x00), | |
680 | /* | |
681 | * VPll = Hw controlled (NOTE! PRCMU bits) | |
682 | * VanaRegu = force off | |
683 | */ | |
684 | INIT_REGULATOR_REGISTER(AB8505_VPLLVANAREGU, 0x0f, 0x02), | |
685 | /* | |
686 | * VextSupply1Regu = force OFF (OTP_ExtSupply12LPnPolarity 1) | |
687 | * VextSupply2Regu = force OFF (OTP_ExtSupply12LPnPolarity 1) | |
688 | * VextSupply3Regu = force OFF (OTP_ExtSupply3LPnPolarity 0) | |
689 | * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0 | |
690 | * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0 | |
691 | */ | |
692 | INIT_REGULATOR_REGISTER(AB8505_EXTSUPPLYREGU, 0xff, 0x30), | |
693 | /* | |
694 | * Vaux1Regu = force HP | |
695 | * Vaux2Regu = force off | |
696 | */ | |
697 | INIT_REGULATOR_REGISTER(AB8505_VAUX12REGU, 0x0f, 0x01), | |
698 | /* | |
699 | * Vaux3Regu = force off | |
700 | */ | |
701 | INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3REGU, 0x03, 0x00), | |
702 | /* | |
703 | * VsmpsASel1 | |
704 | */ | |
705 | INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL1, 0x00, 0x00), | |
706 | /* | |
707 | * VsmpsASel2 | |
708 | */ | |
709 | INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL2, 0x00, 0x00), | |
710 | /* | |
711 | * VsmpsASel3 | |
712 | */ | |
713 | INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL3, 0x00, 0x00), | |
714 | /* | |
715 | * VsmpsBSel1 | |
716 | */ | |
717 | INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL1, 0x00, 0x00), | |
718 | /* | |
719 | * VsmpsBSel2 | |
720 | */ | |
721 | INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL2, 0x00, 0x00), | |
722 | /* | |
723 | * VsmpsBSel3 | |
724 | */ | |
725 | INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL3, 0x00, 0x00), | |
726 | /* | |
727 | * VsafeSel1 | |
728 | */ | |
729 | INIT_REGULATOR_REGISTER(AB8505_VSAFESEL1, 0x00, 0x00), | |
730 | /* | |
731 | * VsafeSel2 | |
732 | */ | |
733 | INIT_REGULATOR_REGISTER(AB8505_VSAFESEL2, 0x00, 0x00), | |
734 | /* | |
735 | * VsafeSel3 | |
736 | */ | |
737 | INIT_REGULATOR_REGISTER(AB8505_VSAFESEL3, 0x00, 0x00), | |
738 | /* | |
739 | * Vaux1Sel = 2.8 V | |
740 | */ | |
741 | INIT_REGULATOR_REGISTER(AB8505_VAUX1SEL, 0x0f, 0x0C), | |
742 | /* | |
743 | * Vaux2Sel = 2.9 V | |
744 | */ | |
745 | INIT_REGULATOR_REGISTER(AB8505_VAUX2SEL, 0x0f, 0x0d), | |
746 | /* | |
747 | * Vaux3Sel = 2.91 V | |
748 | */ | |
749 | INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3SEL, 0x07, 0x07), | |
750 | /* | |
751 | * Vaux4RequestCtrl | |
752 | */ | |
753 | INIT_REGULATOR_REGISTER(AB8505_VAUX4REQCTRL, 0x00, 0x00), | |
754 | /* | |
755 | * Vaux4Regu | |
756 | */ | |
757 | INIT_REGULATOR_REGISTER(AB8505_VAUX4REGU, 0x00, 0x00), | |
758 | /* | |
759 | * Vaux4Sel | |
760 | */ | |
761 | INIT_REGULATOR_REGISTER(AB8505_VAUX4SEL, 0x00, 0x00), | |
762 | /* | |
763 | * Vaux1Disch = short discharge time | |
764 | * Vaux2Disch = short discharge time | |
765 | * Vaux3Disch = short discharge time | |
766 | * Vintcore12Disch = short discharge time | |
767 | * VTVoutDisch = short discharge time | |
768 | * VaudioDisch = short discharge time | |
769 | */ | |
770 | INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH, 0xfc, 0x00), | |
771 | /* | |
772 | * VanaDisch = short discharge time | |
773 | * Vaux8PullDownEna = pulldown disabled when Vaux8 is disabled | |
774 | * Vaux8Disch = short discharge time | |
775 | */ | |
776 | INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH2, 0x16, 0x00), | |
777 | /* | |
778 | * Vaux4Disch = short discharge time | |
779 | */ | |
780 | INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH3, 0x01, 0x00), | |
781 | /* | |
782 | * Vaux5Sel | |
783 | * Vaux5LP | |
784 | * Vaux5Ena | |
785 | * Vaux5Disch | |
786 | * Vaux5DisSfst | |
787 | * Vaux5DisPulld | |
788 | */ | |
789 | INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX5, 0x00, 0x00), | |
790 | /* | |
791 | * Vaux6Sel | |
792 | * Vaux6LP | |
793 | * Vaux6Ena | |
794 | * Vaux6DisPulld | |
795 | */ | |
796 | INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX6, 0x00, 0x00), | |
797 | }; | |
798 | ||
aaebafb6 | 799 | static struct regulator_init_data ab8505_regulators[AB8505_NUM_REGULATORS] = { |
547f384f LJ |
800 | /* supplies to the display/camera */ |
801 | [AB8505_LDO_AUX1] = { | |
802 | .constraints = { | |
803 | .name = "V-DISPLAY", | |
804 | .min_uV = 2800000, | |
805 | .max_uV = 3300000, | |
806 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
807 | REGULATOR_CHANGE_STATUS, | |
808 | .boot_on = 1, /* display is on at boot */ | |
809 | }, | |
810 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers), | |
811 | .consumer_supplies = ab8500_vaux1_consumers, | |
812 | }, | |
813 | /* supplies to the on-board eMMC */ | |
814 | [AB8505_LDO_AUX2] = { | |
815 | .constraints = { | |
816 | .name = "V-eMMC1", | |
817 | .min_uV = 1100000, | |
818 | .max_uV = 3300000, | |
819 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
820 | REGULATOR_CHANGE_STATUS | | |
821 | REGULATOR_CHANGE_MODE, | |
822 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
823 | REGULATOR_MODE_IDLE, | |
824 | }, | |
825 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers), | |
826 | .consumer_supplies = ab8500_vaux2_consumers, | |
827 | }, | |
828 | /* supply for VAUX3, supplies to SDcard slots */ | |
829 | [AB8505_LDO_AUX3] = { | |
830 | .constraints = { | |
831 | .name = "V-MMC-SD", | |
832 | .min_uV = 1100000, | |
833 | .max_uV = 3300000, | |
834 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
835 | REGULATOR_CHANGE_STATUS | | |
836 | REGULATOR_CHANGE_MODE, | |
837 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
838 | REGULATOR_MODE_IDLE, | |
839 | }, | |
840 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers), | |
841 | .consumer_supplies = ab8500_vaux3_consumers, | |
842 | }, | |
843 | /* supply for VAUX4, supplies to NFC and standalone secure element */ | |
844 | [AB8505_LDO_AUX4] = { | |
845 | .constraints = { | |
846 | .name = "V-NFC-SE", | |
847 | .min_uV = 1100000, | |
848 | .max_uV = 3300000, | |
849 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
850 | REGULATOR_CHANGE_STATUS | | |
851 | REGULATOR_CHANGE_MODE, | |
852 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
853 | REGULATOR_MODE_IDLE, | |
854 | }, | |
855 | .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux4_consumers), | |
856 | .consumer_supplies = ab8505_vaux4_consumers, | |
857 | }, | |
858 | /* supply for VAUX5, supplies to TBD */ | |
859 | [AB8505_LDO_AUX5] = { | |
860 | .constraints = { | |
861 | .name = "V-AUX5", | |
862 | .min_uV = 1050000, | |
863 | .max_uV = 2790000, | |
864 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
865 | REGULATOR_CHANGE_STATUS | | |
866 | REGULATOR_CHANGE_MODE, | |
867 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
868 | REGULATOR_MODE_IDLE, | |
869 | }, | |
870 | .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux5_consumers), | |
871 | .consumer_supplies = ab8505_vaux5_consumers, | |
872 | }, | |
873 | /* supply for VAUX6, supplies to TBD */ | |
874 | [AB8505_LDO_AUX6] = { | |
875 | .constraints = { | |
876 | .name = "V-AUX6", | |
877 | .min_uV = 1050000, | |
878 | .max_uV = 2790000, | |
879 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
880 | REGULATOR_CHANGE_STATUS | | |
881 | REGULATOR_CHANGE_MODE, | |
882 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
883 | REGULATOR_MODE_IDLE, | |
884 | }, | |
885 | .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux6_consumers), | |
886 | .consumer_supplies = ab8505_vaux6_consumers, | |
887 | }, | |
888 | /* supply for gpadc, ADC LDO */ | |
889 | [AB8505_LDO_ADC] = { | |
890 | .constraints = { | |
891 | .name = "V-ADC", | |
892 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
893 | }, | |
894 | .num_consumer_supplies = ARRAY_SIZE(ab8505_vadc_consumers), | |
895 | .consumer_supplies = ab8505_vadc_consumers, | |
896 | }, | |
897 | /* supply for ab8500-vaudio, VAUDIO LDO */ | |
898 | [AB8505_LDO_AUDIO] = { | |
899 | .constraints = { | |
900 | .name = "V-AUD", | |
901 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
902 | }, | |
903 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers), | |
904 | .consumer_supplies = ab8500_vaud_consumers, | |
905 | }, | |
906 | /* supply for v-anamic1 VAMic1-LDO */ | |
907 | [AB8505_LDO_ANAMIC1] = { | |
908 | .constraints = { | |
909 | .name = "V-AMIC1", | |
3fe52289 LJ |
910 | .valid_ops_mask = REGULATOR_CHANGE_STATUS | |
911 | REGULATOR_CHANGE_MODE, | |
912 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
913 | REGULATOR_MODE_IDLE, | |
547f384f LJ |
914 | }, |
915 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers), | |
916 | .consumer_supplies = ab8500_vamic1_consumers, | |
917 | }, | |
918 | /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */ | |
919 | [AB8505_LDO_ANAMIC2] = { | |
920 | .constraints = { | |
921 | .name = "V-AMIC2", | |
3fe52289 LJ |
922 | .valid_ops_mask = REGULATOR_CHANGE_STATUS | |
923 | REGULATOR_CHANGE_MODE, | |
924 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
925 | REGULATOR_MODE_IDLE, | |
547f384f LJ |
926 | }, |
927 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers), | |
928 | .consumer_supplies = ab8500_vamic2_consumers, | |
929 | }, | |
930 | /* supply for v-aux8, VAUX8 LDO */ | |
931 | [AB8505_LDO_AUX8] = { | |
932 | .constraints = { | |
933 | .name = "V-AUX8", | |
934 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
935 | }, | |
936 | .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux8_consumers), | |
937 | .consumer_supplies = ab8505_vaux8_consumers, | |
938 | }, | |
939 | /* supply for v-intcore12, VINTCORE12 LDO */ | |
940 | [AB8505_LDO_INTCORE] = { | |
941 | .constraints = { | |
942 | .name = "V-INTCORE", | |
943 | .min_uV = 1250000, | |
944 | .max_uV = 1350000, | |
945 | .input_uV = 1800000, | |
946 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
947 | REGULATOR_CHANGE_STATUS | | |
948 | REGULATOR_CHANGE_MODE | | |
949 | REGULATOR_CHANGE_DRMS, | |
950 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
951 | REGULATOR_MODE_IDLE, | |
952 | }, | |
953 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers), | |
954 | .consumer_supplies = ab8500_vintcore_consumers, | |
955 | }, | |
956 | /* supply for LDO USB */ | |
957 | [AB8505_LDO_USB] = { | |
958 | .constraints = { | |
959 | .name = "V-USB", | |
960 | .valid_ops_mask = REGULATOR_CHANGE_STATUS | | |
961 | REGULATOR_CHANGE_MODE, | |
962 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
963 | REGULATOR_MODE_IDLE, | |
964 | }, | |
965 | .num_consumer_supplies = ARRAY_SIZE(ab8505_usb_consumers), | |
966 | .consumer_supplies = ab8505_usb_consumers, | |
967 | }, | |
968 | /* supply for U8500 CSI-DSI, VANA LDO */ | |
969 | [AB8505_LDO_ANA] = { | |
970 | .constraints = { | |
971 | .name = "V-CSI-DSI", | |
972 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
973 | }, | |
974 | .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers), | |
975 | .consumer_supplies = ab8500_vana_consumers, | |
976 | }, | |
977 | }; | |
978 | ||
732805a5 BJ |
979 | struct ab8500_regulator_platform_data ab8500_regulator_plat_data = { |
980 | .reg_init = ab8500_reg_init, | |
981 | .num_reg_init = ARRAY_SIZE(ab8500_reg_init), | |
982 | .regulator = ab8500_regulators, | |
983 | .num_regulator = ARRAY_SIZE(ab8500_regulators), | |
a387ac5f LJ |
984 | .ext_regulator = ab8500_ext_regulators, |
985 | .num_ext_regulator = ARRAY_SIZE(ab8500_ext_regulators), | |
732805a5 | 986 | }; |
a1d49480 | 987 | |
547f384f LJ |
988 | struct ab8500_regulator_platform_data ab8505_regulator_plat_data = { |
989 | .reg_init = ab8505_reg_init, | |
990 | .num_reg_init = ARRAY_SIZE(ab8505_reg_init), | |
991 | .regulator = ab8505_regulators, | |
992 | .num_regulator = ARRAY_SIZE(ab8505_regulators), | |
993 | }; | |
994 | ||
a1d49480 LJ |
995 | static void ab8500_modify_reg_init(int id, u8 mask, u8 value) |
996 | { | |
997 | int i; | |
998 | ||
547f384f LJ |
999 | if (cpu_is_u8520()) { |
1000 | for (i = ARRAY_SIZE(ab8505_reg_init) - 1; i >= 0; i--) { | |
1001 | if (ab8505_reg_init[i].id == id) { | |
1002 | u8 initval = ab8505_reg_init[i].value; | |
1003 | initval = (initval & ~mask) | (value & mask); | |
1004 | ab8505_reg_init[i].value = initval; | |
a1d49480 | 1005 | |
547f384f LJ |
1006 | BUG_ON(mask & ~ab8505_reg_init[i].mask); |
1007 | return; | |
1008 | } | |
1009 | } | |
1010 | } else { | |
1011 | for (i = ARRAY_SIZE(ab8500_reg_init) - 1; i >= 0; i--) { | |
1012 | if (ab8500_reg_init[i].id == id) { | |
1013 | u8 initval = ab8500_reg_init[i].value; | |
1014 | initval = (initval & ~mask) | (value & mask); | |
1015 | ab8500_reg_init[i].value = initval; | |
1016 | ||
1017 | BUG_ON(mask & ~ab8500_reg_init[i].mask); | |
1018 | return; | |
1019 | } | |
a1d49480 LJ |
1020 | } |
1021 | } | |
1022 | ||
1023 | BUG_ON(1); | |
1024 | } | |
422d765d LJ |
1025 | |
1026 | void mop500_regulator_init(void) | |
1027 | { | |
1028 | struct regulator_init_data *regulator; | |
1029 | ||
1030 | /* | |
a652f3d2 | 1031 | * Temporarily turn on Vaux2 on 8520 machine |
422d765d | 1032 | */ |
547f384f LJ |
1033 | if (cpu_is_u8520()) { |
1034 | /* Vaux2 initialized to be on */ | |
1035 | ab8500_modify_reg_init(AB8505_VAUX12REGU, 0x0f, 0x05); | |
1036 | } | |
1037 | ||
e0c44686 LJ |
1038 | /* |
1039 | * Handle AB8500_EXT_SUPPLY2 on HREFP_V20_V50 boards (do it for | |
1040 | * all HREFP_V20 boards) | |
1041 | */ | |
1042 | if (cpu_is_u8500v20()) { | |
1043 | /* VextSupply2RequestCtrl = HP/OFF depending on VxRequest */ | |
1044 | ab8500_modify_reg_init(AB8500_REGUREQUESTCTRL3, 0x01, 0x01); | |
1045 | ||
1046 | /* VextSupply2SysClkReq1HPValid = SysClkReq1 controlled */ | |
1047 | ab8500_modify_reg_init(AB8500_REGUSYSCLKREQ1HPVALID2, | |
1048 | 0x20, 0x20); | |
1049 | ||
1050 | /* VextSupply2 = force HP at initialization */ | |
1051 | ab8500_modify_reg_init(AB8500_EXTSUPPLYREGU, 0x0c, 0x04); | |
1052 | ||
1053 | /* enable VextSupply2 during platform active */ | |
1054 | regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2]; | |
1055 | regulator->constraints.always_on = 1; | |
1056 | ||
1057 | /* disable VextSupply2 in suspend */ | |
1058 | regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2]; | |
1059 | regulator->constraints.state_mem.disabled = 1; | |
1060 | regulator->constraints.state_standby.disabled = 1; | |
1061 | ||
1062 | /* enable VextSupply2 HW control (used in suspend) */ | |
1063 | regulator->driver_data = (void *)&ab8500_ext_supply2; | |
1064 | } | |
422d765d | 1065 | } |