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aa44ef4d SK |
2 | /* |
3 | * Copyright (C) 2008-2009 ST-Ericsson | |
4 | * | |
5 | * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2, as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | */ | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/platform_device.h> | |
16 | #include <linux/io.h> | |
b8410a15 | 17 | #include <linux/i2c.h> |
ea05a57f | 18 | #include <linux/gpio.h> |
aa44ef4d SK |
19 | #include <linux/amba/bus.h> |
20 | #include <linux/amba/pl022.h> | |
5d7b8467 | 21 | #include <linux/amba/serial.h> |
aa44ef4d | 22 | #include <linux/spi/spi.h> |
ee66e653 | 23 | #include <linux/mfd/abx500/ab8500.h> |
79568b94 | 24 | #include <linux/regulator/ab8500.h> |
20406ebf | 25 | #include <linux/mfd/tc3589x.h> |
fe67dfc8 | 26 | #include <linux/mfd/tps6105x.h> |
ee66e653 | 27 | #include <linux/mfd/abx500/ab8500-gpio.h> |
dd7b2a05 | 28 | #include <linux/leds-lp5521.h> |
a71b819b | 29 | #include <linux/input.h> |
350abe03 | 30 | #include <linux/smsc911x.h> |
a71b819b | 31 | #include <linux/gpio_keys.h> |
1a7d4369 | 32 | #include <linux/delay.h> |
2d334297 AB |
33 | #include <linux/of.h> |
34 | #include <linux/of_platform.h> | |
350abe03 | 35 | #include <linux/leds.h> |
a0980660 LW |
36 | #include <linux/pinctrl/consumer.h> |
37 | ||
aa44ef4d SK |
38 | #include <asm/mach-types.h> |
39 | #include <asm/mach/arch.h> | |
bbf5f385 | 40 | #include <asm/hardware/gic.h> |
aa44ef4d | 41 | |
d48a41c1 | 42 | #include <plat/i2c.h> |
5d7b8467 | 43 | #include <plat/ste_dma40.h> |
0f332861 | 44 | #include <plat/gpio-nomadik.h> |
aa44ef4d SK |
45 | |
46 | #include <mach/hardware.h> | |
47 | #include <mach/setup.h> | |
9e4e7fe1 | 48 | #include <mach/devices.h> |
29aeb3cf | 49 | #include <mach/irqs.h> |
585d188f | 50 | #include <mach/crypto-ux500.h> |
aa44ef4d | 51 | |
5d7b8467 | 52 | #include "ste-dma40-db8500.h" |
fbf1eadf | 53 | #include "devices-db8500.h" |
008f8a2f | 54 | #include "board-mop500.h" |
a1e516e3 | 55 | #include "board-mop500-regulators.h" |
c0af14d3 | 56 | #include "board-mop500-msp.h" |
ea05a57f | 57 | |
350abe03 RM |
58 | static struct gpio_led snowball_led_array[] = { |
59 | { | |
60 | .name = "user_led", | |
61 | .default_trigger = "none", | |
62 | .gpio = 142, | |
63 | }, | |
64 | }; | |
65 | ||
66 | static struct gpio_led_platform_data snowball_led_data = { | |
67 | .leds = snowball_led_array, | |
68 | .num_leds = ARRAY_SIZE(snowball_led_array), | |
69 | }; | |
70 | ||
71 | static struct platform_device snowball_led_dev = { | |
72 | .name = "leds-gpio", | |
73 | .dev = { | |
74 | .platform_data = &snowball_led_data, | |
75 | }, | |
76 | }; | |
77 | ||
3ef374a2 | 78 | static struct ab8500_gpio_platform_data ab8500_gpio_pdata = { |
a1524eeb | 79 | .gpio_base = MOP500_AB8500_PIN_GPIO(1), |
3ef374a2 BB |
80 | .irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE, |
81 | /* config_reg is the initial configuration of ab8500 pins. | |
82 | * The pins can be configured as GPIO or alt functions based | |
83 | * on value present in GpioSel1 to GpioSel6 and AlternatFunction | |
84 | * register. This is the array of 7 configuration settings. | |
85 | * One has to compile time decide these settings. Below is the | |
25985edc | 86 | * explanation of these setting |
3ef374a2 BB |
87 | * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO |
88 | * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO | |
89 | * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO | |
90 | * GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO | |
91 | * GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO | |
92 | * GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO | |
93 | * AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured | |
94 | * as GPIO then this register selectes the alternate fucntions | |
95 | */ | |
96 | .config_reg = {0x00, 0x1E, 0x80, 0x01, | |
97 | 0x7A, 0x00, 0x00}, | |
98 | }; | |
99 | ||
350abe03 RM |
100 | static struct gpio_keys_button snowball_key_array[] = { |
101 | { | |
102 | .gpio = 32, | |
103 | .type = EV_KEY, | |
104 | .code = KEY_1, | |
105 | .desc = "userpb", | |
106 | .active_low = 1, | |
107 | .debounce_interval = 50, | |
108 | .wakeup = 1, | |
109 | }, | |
110 | { | |
111 | .gpio = 151, | |
112 | .type = EV_KEY, | |
113 | .code = KEY_2, | |
114 | .desc = "extkb1", | |
115 | .active_low = 1, | |
116 | .debounce_interval = 50, | |
117 | .wakeup = 1, | |
118 | }, | |
119 | { | |
120 | .gpio = 152, | |
121 | .type = EV_KEY, | |
122 | .code = KEY_3, | |
123 | .desc = "extkb2", | |
124 | .active_low = 1, | |
125 | .debounce_interval = 50, | |
126 | .wakeup = 1, | |
127 | }, | |
128 | { | |
129 | .gpio = 161, | |
130 | .type = EV_KEY, | |
131 | .code = KEY_4, | |
132 | .desc = "extkb3", | |
133 | .active_low = 1, | |
134 | .debounce_interval = 50, | |
135 | .wakeup = 1, | |
136 | }, | |
137 | { | |
138 | .gpio = 162, | |
139 | .type = EV_KEY, | |
140 | .code = KEY_5, | |
141 | .desc = "extkb4", | |
142 | .active_low = 1, | |
143 | .debounce_interval = 50, | |
144 | .wakeup = 1, | |
145 | }, | |
146 | }; | |
147 | ||
148 | static struct gpio_keys_platform_data snowball_key_data = { | |
149 | .buttons = snowball_key_array, | |
150 | .nbuttons = ARRAY_SIZE(snowball_key_array), | |
151 | }; | |
152 | ||
153 | static struct platform_device snowball_key_dev = { | |
154 | .name = "gpio-keys", | |
155 | .id = -1, | |
156 | .dev = { | |
157 | .platform_data = &snowball_key_data, | |
158 | } | |
159 | }; | |
160 | ||
161 | static struct smsc911x_platform_config snowball_sbnet_cfg = { | |
162 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, | |
163 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
164 | .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, | |
165 | .shift = 1, | |
166 | }; | |
167 | ||
168 | static struct resource sbnet_res[] = { | |
169 | { | |
170 | .name = "smsc911x-memory", | |
171 | .start = (0x5000 << 16), | |
172 | .end = (0x5000 << 16) + 0xffff, | |
173 | .flags = IORESOURCE_MEM, | |
174 | }, | |
175 | { | |
176 | .start = NOMADIK_GPIO_TO_IRQ(140), | |
177 | .end = NOMADIK_GPIO_TO_IRQ(140), | |
178 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
179 | }, | |
180 | }; | |
181 | ||
182 | static struct platform_device snowball_sbnet_dev = { | |
183 | .name = "smsc911x", | |
184 | .num_resources = ARRAY_SIZE(sbnet_res), | |
185 | .resource = sbnet_res, | |
186 | .dev = { | |
187 | .platform_data = &snowball_sbnet_cfg, | |
188 | }, | |
189 | }; | |
190 | ||
39ae702c RV |
191 | static struct ab8500_platform_data ab8500_platdata = { |
192 | .irq_base = MOP500_AB8500_IRQ_BASE, | |
dfa3a824 BJ |
193 | .regulator_reg_init = ab8500_regulator_reg_init, |
194 | .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init), | |
a1e516e3 BJ |
195 | .regulator = ab8500_regulators, |
196 | .num_regulator = ARRAY_SIZE(ab8500_regulators), | |
3ef374a2 | 197 | .gpio = &ab8500_gpio_pdata, |
39ae702c RV |
198 | }; |
199 | ||
29aeb3cf LW |
200 | static struct resource ab8500_resources[] = { |
201 | [0] = { | |
22039b7c RV |
202 | .start = IRQ_DB8500_AB8500, |
203 | .end = IRQ_DB8500_AB8500, | |
204 | .flags = IORESOURCE_IRQ | |
29aeb3cf LW |
205 | } |
206 | }; | |
207 | ||
208 | struct platform_device ab8500_device = { | |
d28f1db8 | 209 | .name = "ab8500-core", |
29aeb3cf LW |
210 | .id = 0, |
211 | .dev = { | |
212 | .platform_data = &ab8500_platdata, | |
213 | }, | |
214 | .num_resources = 1, | |
215 | .resource = ab8500_resources, | |
216 | }; | |
217 | ||
fe67dfc8 LW |
218 | /* |
219 | * TPS61052 | |
220 | */ | |
221 | ||
222 | static struct tps6105x_platform_data mop500_tps61052_data = { | |
223 | .mode = TPS6105X_MODE_VOLTAGE, | |
224 | .regulator_data = &tps61052_regulator, | |
225 | }; | |
226 | ||
b8410a15 RV |
227 | /* |
228 | * TC35892 | |
229 | */ | |
230 | ||
20406ebf | 231 | static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base) |
b8410a15 | 232 | { |
18403424 LJ |
233 | struct device *parent = NULL; |
234 | #if 0 | |
235 | /* FIXME: Is the sdi actually part of tc3589x? */ | |
236 | parent = tc3589x->dev; | |
237 | #endif | |
238 | mop500_sdi_tc35892_init(parent); | |
b8410a15 RV |
239 | } |
240 | ||
20406ebf | 241 | static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = { |
b8410a15 RV |
242 | .gpio_base = MOP500_EGPIO(0), |
243 | .setup = mop500_tc35892_init, | |
244 | }; | |
245 | ||
20406ebf | 246 | static struct tc3589x_platform_data mop500_tc35892_data = { |
611b7590 | 247 | .block = TC3589x_BLOCK_GPIO, |
b8410a15 RV |
248 | .gpio = &mop500_tc35892_gpio_data, |
249 | .irq_base = MOP500_EGPIO_IRQ_BASE, | |
250 | }; | |
251 | ||
dd7b2a05 PL |
252 | static struct lp5521_led_config lp5521_pri_led[] = { |
253 | [0] = { | |
254 | .chan_nr = 0, | |
255 | .led_current = 0x2f, | |
256 | .max_current = 0x5f, | |
257 | }, | |
258 | [1] = { | |
259 | .chan_nr = 1, | |
260 | .led_current = 0x2f, | |
261 | .max_current = 0x5f, | |
262 | }, | |
263 | [2] = { | |
264 | .chan_nr = 2, | |
265 | .led_current = 0x2f, | |
266 | .max_current = 0x5f, | |
267 | }, | |
268 | }; | |
269 | ||
270 | static struct lp5521_platform_data __initdata lp5521_pri_data = { | |
271 | .label = "lp5521_pri", | |
272 | .led_config = &lp5521_pri_led[0], | |
273 | .num_channels = 3, | |
274 | .clock_mode = LP5521_CLOCK_EXT, | |
275 | }; | |
276 | ||
277 | static struct lp5521_led_config lp5521_sec_led[] = { | |
278 | [0] = { | |
279 | .chan_nr = 0, | |
280 | .led_current = 0x2f, | |
281 | .max_current = 0x5f, | |
282 | }, | |
283 | [1] = { | |
284 | .chan_nr = 1, | |
285 | .led_current = 0x2f, | |
286 | .max_current = 0x5f, | |
287 | }, | |
288 | [2] = { | |
289 | .chan_nr = 2, | |
290 | .led_current = 0x2f, | |
291 | .max_current = 0x5f, | |
292 | }, | |
293 | }; | |
294 | ||
295 | static struct lp5521_platform_data __initdata lp5521_sec_data = { | |
296 | .label = "lp5521_sec", | |
297 | .led_config = &lp5521_sec_led[0], | |
298 | .num_channels = 3, | |
299 | .clock_mode = LP5521_CLOCK_EXT, | |
300 | }; | |
301 | ||
fe67dfc8 | 302 | static struct i2c_board_info __initdata mop500_i2c0_devices[] = { |
b8410a15 | 303 | { |
20406ebf | 304 | I2C_BOARD_INFO("tc3589x", 0x42), |
dd7b2a05 | 305 | .irq = NOMADIK_GPIO_TO_IRQ(217), |
b8410a15 RV |
306 | .platform_data = &mop500_tc35892_data, |
307 | }, | |
cf568c58 | 308 | /* I2C0 devices only available prior to HREFv60 */ |
fe67dfc8 LW |
309 | { |
310 | I2C_BOARD_INFO("tps61052", 0x33), | |
311 | .platform_data = &mop500_tps61052_data, | |
312 | }, | |
313 | }; | |
314 | ||
cf568c58 LW |
315 | #define NUM_PRE_V60_I2C0_DEVICES 1 |
316 | ||
dd7b2a05 PL |
317 | static struct i2c_board_info __initdata mop500_i2c2_devices[] = { |
318 | { | |
319 | /* lp5521 LED driver, 1st device */ | |
320 | I2C_BOARD_INFO("lp5521", 0x33), | |
321 | .platform_data = &lp5521_pri_data, | |
322 | }, | |
323 | { | |
324 | /* lp5521 LED driver, 2st device */ | |
325 | I2C_BOARD_INFO("lp5521", 0x34), | |
326 | .platform_data = &lp5521_sec_data, | |
327 | }, | |
bb3b2187 LJ |
328 | { |
329 | /* Light sensor Rohm BH1780GLI */ | |
330 | I2C_BOARD_INFO("bh1780", 0x29), | |
331 | }, | |
dd7b2a05 PL |
332 | }; |
333 | ||
2b030bda | 334 | #define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, t_out, _sm) \ |
f9faf237 | 335 | static struct nmk_i2c_controller u8500_i2c##id##_data = { \ |
d48a41c1 SK |
336 | /* \ |
337 | * slave data setup time, which is \ | |
338 | * 250 ns,100ns,10ns which is 14,6,2 \ | |
339 | * respectively for a 48 Mhz \ | |
340 | * i2c clock \ | |
341 | */ \ | |
342 | .slsu = _slsu, \ | |
343 | /* Tx FIFO threshold */ \ | |
344 | .tft = _tft, \ | |
345 | /* Rx FIFO threshold */ \ | |
346 | .rft = _rft, \ | |
347 | /* std. mode operation */ \ | |
348 | .clk_freq = clk, \ | |
2b030bda LW |
349 | /* Slave response timeout(ms) */\ |
350 | .timeout = t_out, \ | |
d48a41c1 SK |
351 | .sm = _sm, \ |
352 | } | |
353 | ||
354 | /* | |
355 | * The board uses 4 i2c controllers, initialize all of | |
356 | * them with slave data setup time of 250 ns, | |
2b030bda | 357 | * Tx & Rx FIFO threshold values as 8 and standard |
d48a41c1 SK |
358 | * mode of operation |
359 | */ | |
2b030bda LW |
360 | U8500_I2C_CONTROLLER(0, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST); |
361 | U8500_I2C_CONTROLLER(1, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST); | |
362 | U8500_I2C_CONTROLLER(2, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST); | |
363 | U8500_I2C_CONTROLLER(3, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST); | |
d48a41c1 | 364 | |
18403424 | 365 | static void __init mop500_i2c_init(struct device *parent) |
fbf1eadf | 366 | { |
18403424 LJ |
367 | db8500_add_i2c0(parent, &u8500_i2c0_data); |
368 | db8500_add_i2c1(parent, &u8500_i2c1_data); | |
369 | db8500_add_i2c2(parent, &u8500_i2c2_data); | |
370 | db8500_add_i2c3(parent, &u8500_i2c3_data); | |
fbf1eadf | 371 | } |
aa44ef4d | 372 | |
a71b819b PL |
373 | static struct gpio_keys_button mop500_gpio_keys[] = { |
374 | { | |
375 | .desc = "SFH7741 Proximity Sensor", | |
376 | .type = EV_SW, | |
377 | .code = SW_FRONT_PROXIMITY, | |
a71b819b PL |
378 | .active_low = 0, |
379 | .can_disable = 1, | |
380 | } | |
381 | }; | |
382 | ||
383 | static struct regulator *prox_regulator; | |
384 | static int mop500_prox_activate(struct device *dev); | |
385 | static void mop500_prox_deactivate(struct device *dev); | |
386 | ||
387 | static struct gpio_keys_platform_data mop500_gpio_keys_data = { | |
388 | .buttons = mop500_gpio_keys, | |
389 | .nbuttons = ARRAY_SIZE(mop500_gpio_keys), | |
390 | .enable = mop500_prox_activate, | |
391 | .disable = mop500_prox_deactivate, | |
392 | }; | |
393 | ||
394 | static struct platform_device mop500_gpio_keys_device = { | |
395 | .name = "gpio-keys", | |
396 | .id = 0, | |
397 | .dev = { | |
398 | .platform_data = &mop500_gpio_keys_data, | |
399 | }, | |
400 | }; | |
401 | ||
402 | static int mop500_prox_activate(struct device *dev) | |
403 | { | |
404 | prox_regulator = regulator_get(&mop500_gpio_keys_device.dev, | |
405 | "vcc"); | |
406 | if (IS_ERR(prox_regulator)) { | |
407 | dev_err(&mop500_gpio_keys_device.dev, | |
408 | "no regulator\n"); | |
409 | return PTR_ERR(prox_regulator); | |
410 | } | |
411 | regulator_enable(prox_regulator); | |
412 | return 0; | |
413 | } | |
414 | ||
415 | static void mop500_prox_deactivate(struct device *dev) | |
416 | { | |
417 | regulator_disable(prox_regulator); | |
418 | regulator_put(prox_regulator); | |
419 | } | |
420 | ||
585d188f AW |
421 | static struct cryp_platform_data u8500_cryp1_platform_data = { |
422 | .mem_to_engine = { | |
423 | .dir = STEDMA40_MEM_TO_PERIPH, | |
424 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
425 | .dst_dev_type = DB8500_DMA_DEV48_CAC1_TX, | |
426 | .src_info.data_width = STEDMA40_WORD_WIDTH, | |
427 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | |
428 | .mode = STEDMA40_MODE_LOGICAL, | |
429 | .src_info.psize = STEDMA40_PSIZE_LOG_4, | |
430 | .dst_info.psize = STEDMA40_PSIZE_LOG_4, | |
431 | }, | |
432 | .engine_to_mem = { | |
433 | .dir = STEDMA40_PERIPH_TO_MEM, | |
434 | .src_dev_type = DB8500_DMA_DEV48_CAC1_RX, | |
435 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
436 | .src_info.data_width = STEDMA40_WORD_WIDTH, | |
437 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | |
438 | .mode = STEDMA40_MODE_LOGICAL, | |
439 | .src_info.psize = STEDMA40_PSIZE_LOG_4, | |
440 | .dst_info.psize = STEDMA40_PSIZE_LOG_4, | |
441 | } | |
442 | }; | |
443 | ||
444 | static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = { | |
445 | .dir = STEDMA40_MEM_TO_PERIPH, | |
446 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
447 | .dst_dev_type = DB8500_DMA_DEV50_HAC1_TX, | |
448 | .src_info.data_width = STEDMA40_WORD_WIDTH, | |
449 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | |
450 | .mode = STEDMA40_MODE_LOGICAL, | |
451 | .src_info.psize = STEDMA40_PSIZE_LOG_16, | |
452 | .dst_info.psize = STEDMA40_PSIZE_LOG_16, | |
453 | }; | |
454 | ||
455 | static struct hash_platform_data u8500_hash1_platform_data = { | |
456 | .mem_to_engine = &u8500_hash_dma_cfg_tx, | |
457 | .dma_filter = stedma40_filter, | |
458 | }; | |
459 | ||
d48a41c1 | 460 | /* add any platform devices here - TODO */ |
350abe03 | 461 | static struct platform_device *mop500_platform_devs[] __initdata = { |
a71b819b | 462 | &mop500_gpio_keys_device, |
350abe03 | 463 | &ab8500_device, |
d48a41c1 SK |
464 | }; |
465 | ||
5d7b8467 LW |
466 | #ifdef CONFIG_STE_DMA40 |
467 | static struct stedma40_chan_cfg ssp0_dma_cfg_rx = { | |
468 | .mode = STEDMA40_MODE_LOGICAL, | |
469 | .dir = STEDMA40_PERIPH_TO_MEM, | |
470 | .src_dev_type = DB8500_DMA_DEV8_SSP0_RX, | |
471 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
472 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
473 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
474 | }; | |
475 | ||
476 | static struct stedma40_chan_cfg ssp0_dma_cfg_tx = { | |
477 | .mode = STEDMA40_MODE_LOGICAL, | |
478 | .dir = STEDMA40_MEM_TO_PERIPH, | |
479 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
480 | .dst_dev_type = DB8500_DMA_DEV8_SSP0_TX, | |
481 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
482 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
483 | }; | |
484 | #endif | |
485 | ||
15daf691 | 486 | static struct pl022_ssp_controller ssp0_plat = { |
5d7b8467 LW |
487 | .bus_id = 0, |
488 | #ifdef CONFIG_STE_DMA40 | |
489 | .enable_dma = 1, | |
490 | .dma_filter = stedma40_filter, | |
491 | .dma_rx_param = &ssp0_dma_cfg_rx, | |
492 | .dma_tx_param = &ssp0_dma_cfg_tx, | |
493 | #else | |
494 | .enable_dma = 0, | |
495 | #endif | |
496 | /* on this platform, gpio 31,142,144,214 & | |
497 | * 224 are connected as chip selects | |
498 | */ | |
499 | .num_chipselect = 5, | |
500 | }; | |
501 | ||
18403424 | 502 | static void __init mop500_spi_init(struct device *parent) |
aa44ef4d | 503 | { |
15daf691 | 504 | db8500_add_ssp0(parent, &ssp0_plat); |
fbf1eadf | 505 | } |
aa44ef4d | 506 | |
5d7b8467 LW |
507 | #ifdef CONFIG_STE_DMA40 |
508 | static struct stedma40_chan_cfg uart0_dma_cfg_rx = { | |
509 | .mode = STEDMA40_MODE_LOGICAL, | |
510 | .dir = STEDMA40_PERIPH_TO_MEM, | |
511 | .src_dev_type = DB8500_DMA_DEV13_UART0_RX, | |
512 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
513 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
514 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
515 | }; | |
516 | ||
517 | static struct stedma40_chan_cfg uart0_dma_cfg_tx = { | |
518 | .mode = STEDMA40_MODE_LOGICAL, | |
519 | .dir = STEDMA40_MEM_TO_PERIPH, | |
520 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
521 | .dst_dev_type = DB8500_DMA_DEV13_UART0_TX, | |
522 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
523 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
524 | }; | |
525 | ||
526 | static struct stedma40_chan_cfg uart1_dma_cfg_rx = { | |
527 | .mode = STEDMA40_MODE_LOGICAL, | |
528 | .dir = STEDMA40_PERIPH_TO_MEM, | |
529 | .src_dev_type = DB8500_DMA_DEV12_UART1_RX, | |
530 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
531 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
532 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
533 | }; | |
534 | ||
535 | static struct stedma40_chan_cfg uart1_dma_cfg_tx = { | |
536 | .mode = STEDMA40_MODE_LOGICAL, | |
537 | .dir = STEDMA40_MEM_TO_PERIPH, | |
538 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
539 | .dst_dev_type = DB8500_DMA_DEV12_UART1_TX, | |
540 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
541 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
542 | }; | |
543 | ||
544 | static struct stedma40_chan_cfg uart2_dma_cfg_rx = { | |
545 | .mode = STEDMA40_MODE_LOGICAL, | |
546 | .dir = STEDMA40_PERIPH_TO_MEM, | |
547 | .src_dev_type = DB8500_DMA_DEV11_UART2_RX, | |
548 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | |
549 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
550 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
551 | }; | |
552 | ||
553 | static struct stedma40_chan_cfg uart2_dma_cfg_tx = { | |
554 | .mode = STEDMA40_MODE_LOGICAL, | |
555 | .dir = STEDMA40_MEM_TO_PERIPH, | |
556 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | |
557 | .dst_dev_type = DB8500_DMA_DEV11_UART2_TX, | |
558 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | |
559 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | |
560 | }; | |
561 | #endif | |
562 | ||
1a7d4369 SKS |
563 | #define PRCC_K_SOFTRST_SET 0x18 |
564 | #define PRCC_K_SOFTRST_CLEAR 0x1C | |
565 | static void ux500_uart0_reset(void) | |
566 | { | |
567 | void __iomem *prcc_rst_set, *prcc_rst_clr; | |
568 | ||
569 | prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE + | |
570 | PRCC_K_SOFTRST_SET); | |
571 | prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE + | |
572 | PRCC_K_SOFTRST_CLEAR); | |
573 | ||
574 | /* Activate soft reset PRCC_K_SOFTRST_CLEAR */ | |
575 | writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr); | |
576 | udelay(1); | |
577 | ||
578 | /* Release soft reset PRCC_K_SOFTRST_SET */ | |
579 | writel((readl(prcc_rst_set) | 0x1), prcc_rst_set); | |
580 | udelay(1); | |
581 | } | |
582 | ||
5d7b8467 LW |
583 | static struct amba_pl011_data uart0_plat = { |
584 | #ifdef CONFIG_STE_DMA40 | |
585 | .dma_filter = stedma40_filter, | |
586 | .dma_rx_param = &uart0_dma_cfg_rx, | |
587 | .dma_tx_param = &uart0_dma_cfg_tx, | |
588 | #endif | |
1a7d4369 | 589 | .reset = ux500_uart0_reset, |
5d7b8467 LW |
590 | }; |
591 | ||
592 | static struct amba_pl011_data uart1_plat = { | |
593 | #ifdef CONFIG_STE_DMA40 | |
594 | .dma_filter = stedma40_filter, | |
595 | .dma_rx_param = &uart1_dma_cfg_rx, | |
596 | .dma_tx_param = &uart1_dma_cfg_tx, | |
597 | #endif | |
598 | }; | |
599 | ||
600 | static struct amba_pl011_data uart2_plat = { | |
601 | #ifdef CONFIG_STE_DMA40 | |
602 | .dma_filter = stedma40_filter, | |
603 | .dma_rx_param = &uart2_dma_cfg_rx, | |
604 | .dma_tx_param = &uart2_dma_cfg_tx, | |
605 | #endif | |
606 | }; | |
607 | ||
18403424 | 608 | static void __init mop500_uart_init(struct device *parent) |
fbf1eadf | 609 | { |
78d80c5a | 610 | db8500_add_uart0(parent, &uart0_plat); |
18403424 LJ |
611 | db8500_add_uart1(parent, &uart1_plat); |
612 | db8500_add_uart2(parent, &uart2_plat); | |
fbf1eadf RV |
613 | } |
614 | ||
585d188f AW |
615 | static void __init u8500_cryp1_hash1_init(struct device *parent) |
616 | { | |
617 | db8500_add_cryp1(parent, &u8500_cryp1_platform_data); | |
618 | db8500_add_hash1(parent, &u8500_hash1_platform_data); | |
619 | } | |
620 | ||
350abe03 RM |
621 | static struct platform_device *snowball_platform_devs[] __initdata = { |
622 | &snowball_led_dev, | |
623 | &snowball_key_dev, | |
e6fada59 | 624 | &snowball_sbnet_dev, |
350abe03 RM |
625 | &ab8500_device, |
626 | }; | |
627 | ||
11a0b5f0 LJ |
628 | static struct platform_device *snowball_of_platform_devs[] __initdata = { |
629 | &snowball_led_dev, | |
630 | &snowball_key_dev, | |
11a0b5f0 LJ |
631 | }; |
632 | ||
4b4f757c | 633 | static void __init mop500_init_machine(void) |
fbf1eadf | 634 | { |
18403424 | 635 | struct device *parent = NULL; |
cf568c58 | 636 | int i2c0_devs; |
b024a0c8 | 637 | int i; |
cf568c58 | 638 | |
110c2c2f LJ |
639 | mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR; |
640 | ||
ed781d39 | 641 | mop500_pinmaps_init(); |
18403424 | 642 | parent = u8500_init_devices(); |
110c2c2f | 643 | |
7e0ce270 | 644 | /* FIXME: parent of ab8500 should be prcmu */ |
b024a0c8 LJ |
645 | for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) |
646 | mop500_platform_devs[i]->dev.parent = parent; | |
647 | ||
110c2c2f LJ |
648 | platform_add_devices(mop500_platform_devs, |
649 | ARRAY_SIZE(mop500_platform_devs)); | |
650 | ||
18403424 LJ |
651 | mop500_i2c_init(parent); |
652 | mop500_sdi_init(parent); | |
653 | mop500_spi_init(parent); | |
c0af14d3 | 654 | mop500_msp_init(parent); |
18403424 | 655 | mop500_uart_init(parent); |
110c2c2f | 656 | |
585d188f AW |
657 | u8500_cryp1_hash1_init(parent); |
658 | ||
110c2c2f LJ |
659 | i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); |
660 | ||
661 | i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); | |
662 | i2c_register_board_info(2, mop500_i2c2_devices, | |
663 | ARRAY_SIZE(mop500_i2c2_devices)); | |
664 | ||
665 | /* This board has full regulator constraints */ | |
666 | regulator_has_full_constraints(); | |
fd6948bb LJ |
667 | |
668 | mop500_uib_init(); | |
110c2c2f LJ |
669 | } |
670 | ||
671 | static void __init snowball_init_machine(void) | |
672 | { | |
18403424 | 673 | struct device *parent = NULL; |
b024a0c8 | 674 | int i; |
110c2c2f | 675 | |
ed781d39 | 676 | snowball_pinmaps_init(); |
18403424 | 677 | parent = u8500_init_devices(); |
110c2c2f | 678 | |
b024a0c8 LJ |
679 | for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++) |
680 | snowball_platform_devs[i]->dev.parent = parent; | |
681 | ||
110c2c2f LJ |
682 | platform_add_devices(snowball_platform_devs, |
683 | ARRAY_SIZE(snowball_platform_devs)); | |
684 | ||
18403424 LJ |
685 | mop500_i2c_init(parent); |
686 | snowball_sdi_init(parent); | |
687 | mop500_spi_init(parent); | |
c0af14d3 | 688 | mop500_msp_init(parent); |
18403424 | 689 | mop500_uart_init(parent); |
110c2c2f | 690 | |
110c2c2f LJ |
691 | /* This board has full regulator constraints */ |
692 | regulator_has_full_constraints(); | |
693 | } | |
694 | ||
695 | static void __init hrefv60_init_machine(void) | |
696 | { | |
18403424 | 697 | struct device *parent = NULL; |
110c2c2f | 698 | int i2c0_devs; |
b024a0c8 | 699 | int i; |
110c2c2f | 700 | |
4b4f757c LW |
701 | /* |
702 | * The HREFv60 board removed a GPIO expander and routed | |
703 | * all these GPIO pins to the internal GPIO controller | |
704 | * instead. | |
705 | */ | |
110c2c2f | 706 | mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO; |
4b4f757c | 707 | |
ed781d39 | 708 | hrefv60_pinmaps_init(); |
18403424 | 709 | parent = u8500_init_devices(); |
ea05a57f | 710 | |
b024a0c8 LJ |
711 | for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) |
712 | mop500_platform_devs[i]->dev.parent = parent; | |
713 | ||
110c2c2f LJ |
714 | platform_add_devices(mop500_platform_devs, |
715 | ARRAY_SIZE(mop500_platform_devs)); | |
d48a41c1 | 716 | |
18403424 LJ |
717 | mop500_i2c_init(parent); |
718 | hrefv60_sdi_init(parent); | |
719 | mop500_spi_init(parent); | |
c0af14d3 | 720 | mop500_msp_init(parent); |
18403424 | 721 | mop500_uart_init(parent); |
008f8a2f | 722 | |
cf568c58 | 723 | i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); |
110c2c2f LJ |
724 | |
725 | i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES; | |
cf568c58 LW |
726 | |
727 | i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); | |
dd7b2a05 PL |
728 | i2c_register_board_info(2, mop500_i2c2_devices, |
729 | ARRAY_SIZE(mop500_i2c2_devices)); | |
db24520f LW |
730 | |
731 | /* This board has full regulator constraints */ | |
732 | regulator_has_full_constraints(); | |
fd6948bb LJ |
733 | |
734 | mop500_uib_init(); | |
aa44ef4d SK |
735 | } |
736 | ||
737 | MACHINE_START(U8500, "ST-Ericsson MOP500 platform") | |
738 | /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */ | |
bc77b1aa | 739 | .atag_offset = 0x100, |
aa44ef4d | 740 | .map_io = u8500_map_io, |
178980f9 | 741 | .init_irq = ux500_init_irq, |
aa44ef4d | 742 | /* we re-use nomadik timer here */ |
41ac329f | 743 | .timer = &ux500_timer, |
bbf5f385 | 744 | .handle_irq = gic_handle_irq, |
4b4f757c | 745 | .init_machine = mop500_init_machine, |
a010bc2b | 746 | .init_late = ux500_init_late, |
4b4f757c LW |
747 | MACHINE_END |
748 | ||
749 | MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+") | |
bc77b1aa | 750 | .atag_offset = 0x100, |
4b4f757c LW |
751 | .map_io = u8500_map_io, |
752 | .init_irq = ux500_init_irq, | |
753 | .timer = &ux500_timer, | |
bbf5f385 | 754 | .handle_irq = gic_handle_irq, |
110c2c2f | 755 | .init_machine = hrefv60_init_machine, |
a010bc2b | 756 | .init_late = ux500_init_late, |
aa44ef4d | 757 | MACHINE_END |
350abe03 RM |
758 | |
759 | MACHINE_START(SNOWBALL, "Calao Systems Snowball platform") | |
bc77b1aa | 760 | .atag_offset = 0x100, |
350abe03 RM |
761 | .map_io = u8500_map_io, |
762 | .init_irq = ux500_init_irq, | |
763 | /* we re-use nomadik timer here */ | |
764 | .timer = &ux500_timer, | |
bbf5f385 | 765 | .handle_irq = gic_handle_irq, |
110c2c2f | 766 | .init_machine = snowball_init_machine, |
a010bc2b | 767 | .init_late = ux500_init_late, |
350abe03 | 768 | MACHINE_END |
2d334297 AB |
769 | |
770 | #ifdef CONFIG_MACH_UX500_DT | |
7e0ce270 LJ |
771 | |
772 | struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { | |
513c27f8 | 773 | /* Requires DMA and call-back bindings. */ |
4905af0e LJ |
774 | OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat), |
775 | OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat), | |
776 | OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat), | |
513c27f8 | 777 | /* Requires DMA bindings. */ |
15daf691 | 778 | OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat), |
513c27f8 LJ |
779 | /* Requires clock name bindings. */ |
780 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL), | |
781 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL), | |
782 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL), | |
783 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL), | |
784 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL), | |
785 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL), | |
786 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL), | |
787 | OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL), | |
788 | OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL), | |
7e0ce270 LJ |
789 | {}, |
790 | }; | |
791 | ||
2cfaa62d | 792 | static const struct of_device_id u8500_local_bus_nodes[] = { |
7e0ce270 LJ |
793 | /* only create devices below soc node */ |
794 | { .compatible = "stericsson,db8500", }, | |
48a4ea62 | 795 | { .compatible = "stericsson,db8500-prcmu", }, |
890d84fa | 796 | { .compatible = "stericsson,db8500-prcmu-regulator", }, |
48a4ea62 LJ |
797 | { .compatible = "stericsson,ab8500", }, |
798 | { .compatible = "stericsson,ab8500-regulator", }, | |
2cfaa62d | 799 | { .compatible = "simple-bus"}, |
7e0ce270 LJ |
800 | { }, |
801 | }; | |
802 | ||
2d334297 AB |
803 | static void __init u8500_init_machine(void) |
804 | { | |
7734fed8 AB |
805 | struct device *parent = NULL; |
806 | int i2c0_devs; | |
807 | int i; | |
808 | ||
ed781d39 LW |
809 | /* Pinmaps must be in place before devices register */ |
810 | if (of_machine_is_compatible("st-ericsson,mop500")) | |
811 | mop500_pinmaps_init(); | |
812 | else if (of_machine_is_compatible("calaosystems,snowball-a9500")) | |
813 | snowball_pinmaps_init(); | |
814 | else if (of_machine_is_compatible("st-ericsson,hrefv60+")) | |
815 | hrefv60_pinmaps_init(); | |
816 | ||
f65c1982 | 817 | parent = u8500_of_init_devices(); |
7734fed8 AB |
818 | |
819 | for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++) | |
820 | mop500_platform_devs[i]->dev.parent = parent; | |
821 | for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++) | |
822 | snowball_platform_devs[i]->dev.parent = parent; | |
823 | ||
7e0ce270 | 824 | /* automatically probe child nodes of db8500 device */ |
2cfaa62d | 825 | of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent); |
7734fed8 AB |
826 | |
827 | if (of_machine_is_compatible("st-ericsson,mop500")) { | |
828 | mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR; | |
7734fed8 AB |
829 | |
830 | platform_add_devices(mop500_platform_devs, | |
831 | ARRAY_SIZE(mop500_platform_devs)); | |
832 | ||
833 | mop500_sdi_init(parent); | |
4809f90a LJ |
834 | i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); |
835 | i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); | |
836 | i2c_register_board_info(2, mop500_i2c2_devices, | |
837 | ARRAY_SIZE(mop500_i2c2_devices)); | |
838 | ||
fd6948bb LJ |
839 | mop500_uib_init(); |
840 | ||
7734fed8 | 841 | } else if (of_machine_is_compatible("calaosystems,snowball-a9500")) { |
11a0b5f0 LJ |
842 | /* |
843 | * Devices to be DT:ed: | |
844 | * snowball_led_dev = todo | |
845 | * snowball_key_dev = todo | |
ada46cda | 846 | * snowball_sbnet_dev = done |
48a4ea62 | 847 | * ab8500_device = done |
11a0b5f0 LJ |
848 | */ |
849 | platform_add_devices(snowball_of_platform_devs, | |
850 | ARRAY_SIZE(snowball_of_platform_devs)); | |
7734fed8 AB |
851 | |
852 | snowball_sdi_init(parent); | |
853 | } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) { | |
854 | /* | |
855 | * The HREFv60 board removed a GPIO expander and routed | |
856 | * all these GPIO pins to the internal GPIO controller | |
857 | * instead. | |
858 | */ | |
859 | mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO; | |
7734fed8 AB |
860 | platform_add_devices(mop500_platform_devs, |
861 | ARRAY_SIZE(mop500_platform_devs)); | |
862 | ||
863 | hrefv60_sdi_init(parent); | |
4809f90a LJ |
864 | |
865 | i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); | |
866 | i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES; | |
867 | ||
868 | i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); | |
869 | i2c_register_board_info(2, mop500_i2c2_devices, | |
870 | ARRAY_SIZE(mop500_i2c2_devices)); | |
fd6948bb LJ |
871 | |
872 | mop500_uib_init(); | |
7734fed8 AB |
873 | } |
874 | mop500_i2c_init(parent); | |
7734fed8 | 875 | |
7734fed8 AB |
876 | /* This board has full regulator constraints */ |
877 | regulator_has_full_constraints(); | |
2d334297 AB |
878 | } |
879 | ||
880 | static const char * u8500_dt_board_compat[] = { | |
881 | "calaosystems,snowball-a9500", | |
882 | "st-ericsson,hrefv60+", | |
883 | "st-ericsson,u8500", | |
884 | "st-ericsson,mop500", | |
885 | NULL, | |
886 | }; | |
887 | ||
888 | ||
889 | DT_MACHINE_START(U8500_DT, "ST-Ericsson U8500 platform (Device Tree Support)") | |
890 | .map_io = u8500_map_io, | |
891 | .init_irq = ux500_init_irq, | |
892 | /* we re-use nomadik timer here */ | |
893 | .timer = &ux500_timer, | |
894 | .handle_irq = gic_handle_irq, | |
895 | .init_machine = u8500_init_machine, | |
a010bc2b | 896 | .init_late = ux500_init_late, |
2d334297 AB |
897 | .dt_compat = u8500_dt_board_compat, |
898 | MACHINE_END | |
899 | #endif |