[deliverable/linux.git] / arch / arm / mach-ux500 / cpu-db8500.c

/*
 * Copyright (C) 2008-2009 ST-Ericsson SA
 *
 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2, as
 * published by the Free Software Foundation.
 *
 */
#include <linux/types.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/amba/bus.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqchip.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/platform_data/arm-ux500-pm.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/perf/arm_pmu.h>
#include <linux/regulator/machine.h>

#include <asm/outercache.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/map.h>
#include <asm/mach/arch.h>

#include "setup.h"

#include "board-mop500.h"
#include "db8500-regs.h"

static int __init ux500_l2x0_unlock(void)
{
	int i;
	struct device_node *np;
	void __iomem *l2x0_base;

	np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
	l2x0_base = of_iomap(np, 0);
	of_node_put(np);
	if (!l2x0_base)
		return -ENODEV;

	/*
	 * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
	 * apparently locks both caches before jumping to the kernel. The
	 * l2x0 core will not touch the unlock registers if the l2x0 is
	 * already enabled, so we do it right here instead. The PL310 has
	 * 8 sets of registers, one per possible CPU.
	 */
	for (i = 0; i < 8; i++) {
		writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
			       i * L2X0_LOCKDOWN_STRIDE);
		writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
			       i * L2X0_LOCKDOWN_STRIDE);
	}
	iounmap(l2x0_base);
	return 0;
}

static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
{
	/*
	 * We can't write to secure registers as we are in non-secure
	 * mode, until we have some SMI service available.
	 */
}

/*
 * FIXME: Should we set up the GPIO domain here?
 *
 * The problem is that we cannot put the interrupt resources into the platform
 * device until the irqdomain has been added. Right now, we set the GIC interrupt
 * domain from init_irq(), then load the gpio driver from
 * core_initcall(nmk_gpio_init) and add the platform devices from
 * arch_initcall(customize_machine).
 *
 * This feels fragile because it depends on the gpio device getting probed
 * _before_ any device uses the gpio interrupts.
*/
static void __init ux500_init_irq(void)
{
	struct device_node *np;
	struct resource r;

	irqchip_init();
	np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
	of_address_to_resource(np, 0, &r);
	of_node_put(np);
	if (!r.start) {
		pr_err("could not find PRCMU base resource\n");
		return;
	}
	prcmu_early_init(r.start, r.end-r.start);
	ux500_pm_init(r.start, r.end-r.start);

	/* Unlock before init */
	ux500_l2x0_unlock();
	outer_cache.write_sec = ux500_l2c310_write_sec;
}

static void ux500_restart(enum reboot_mode mode, const char *cmd)
{
	local_irq_disable();
	local_fiq_disable();

	prcmu_system_reset(0);
}

/*
 * The PMU IRQ lines of two cores are wired together into a single interrupt.
 * Bounce the interrupt to the other core if it's not ours.
 */
static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
{
	irqreturn_t ret = handler(irq, dev);
	int other = !smp_processor_id();

	if (ret == IRQ_NONE && cpu_online(other))
		irq_set_affinity(irq, cpumask_of(other));

	/*
	 * We should be able to get away with the amount of IRQ_NONEs we give,
	 * while still having the spurious IRQ detection code kick in if the
	 * interrupt really starts hitting spuriously.
	 */
	return ret;
}

static struct arm_pmu_platdata db8500_pmu_platdata = {
	.handle_irq		= db8500_pmu_handler,
};

static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
	/* Requires call-back bindings. */
	OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
	/* Requires DMA bindings. */
	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
		       "ux500-msp-i2s.0", &msp0_platform_data),
	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
		       "ux500-msp-i2s.1", &msp1_platform_data),
	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
		       "ux500-msp-i2s.2", &msp2_platform_data),
	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
		       "ux500-msp-i2s.3", &msp3_platform_data),
	/* Requires non-DT:able platform data. */
	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL),
	OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
	OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
	OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
			NULL),
	{},
};

static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL),
	{},
};

static const struct of_device_id u8500_local_bus_nodes[] = {
	/* only create devices below soc node */
	{ .compatible = "stericsson,db8500", },
	{ .compatible = "stericsson,db8500-prcmu", },
	{ .compatible = "simple-bus"},
	{ },
};

static void __init u8500_init_machine(void)
{
	/* automatically probe child nodes of dbx5x0 devices */
	if (of_machine_is_compatible("st-ericsson,u8540"))
		of_platform_populate(NULL, u8500_local_bus_nodes,
				     u8540_auxdata_lookup, NULL);
	else
		of_platform_populate(NULL, u8500_local_bus_nodes,
				     u8500_auxdata_lookup, NULL);
}

static const char * stericsson_dt_platform_compat[] = {
	"st-ericsson,u8500",
	"st-ericsson,u8540",
	"st-ericsson,u9500",
	"st-ericsson,u9540",
	NULL,
};

DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
	.l2c_aux_val    = 0,
	.l2c_aux_mask	= ~0,
	.init_irq	= ux500_init_irq,
	.init_machine	= u8500_init_machine,
	.dt_compat      = stericsson_dt_platform_compat,
	.restart        = ux500_restart,
MACHINE_END
Commit	Line	Data
aa44ef4d	1	/*
c15def1c	2	* Copyright (C) 2008-2009 ST-Ericsson SA
aa44ef4d SK	3	*
	4	* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2, as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11	#include <linux/types.h>
	12	#include <linux/init.h>
	13	#include <linux/device.h>
	14	#include <linux/amba/bus.h>
a16729ea	15	#include <linux/init.h>
aa90eb9d	16	#include <linux/interrupt.h>
aa44ef4d	17	#include <linux/irq.h>
a16729ea AB	18	#include <linux/irqchip.h>
	19	#include <linux/irqchip/arm-gic.h>
	20	#include <linux/mfd/dbx500-prcmu.h>
	21	#include <linux/platform_data/arm-ux500-pm.h>
aa44ef4d	22	#include <linux/platform_device.h>
cc2c1334	23	#include <linux/io.h>
fa86a764	24	#include <linux/of.h>
a16729ea	25	#include <linux/of_address.h>
fa86a764	26	#include <linux/of_platform.h>
fa8ad788	27	#include <linux/perf/arm_pmu.h>
fa86a764	28	#include <linux/regulator/machine.h>
aa44ef4d	29
a16729ea AB	30	#include <asm/outercache.h>
a16729ea AB	31	#include <asm/hardware/cache-l2x0.h>
aa44ef4d	32	#include <asm/mach/map.h>
a16729ea	33	#include <asm/mach/arch.h>
b8edf848	34
e657bcf6	35	#include "setup.h"
94bdc0e2	36
fa86a764	37	#include "board-mop500.h"
6f6d6433	38	#include "db8500-regs.h"
aa44ef4d	39
a16729ea AB	40	static int __init ux500_l2x0_unlock(void)
	41	{
	42	int i;
	43	struct device_node *np;
	44	void __iomem *l2x0_base;
	45
	46	np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
	47	l2x0_base = of_iomap(np, 0);
	48	of_node_put(np);
	49	if (!l2x0_base)
	50	return -ENODEV;
	51
	52	/*
	53	* Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
	54	* apparently locks both caches before jumping to the kernel. The
	55	* l2x0 core will not touch the unlock registers if the l2x0 is
	56	* already enabled, so we do it right here instead. The PL310 has
	57	* 8 sets of registers, one per possible CPU.
	58	*/
	59	for (i = 0; i < 8; i++) {
	60	writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
	61	i * L2X0_LOCKDOWN_STRIDE);
	62	writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
	63	i * L2X0_LOCKDOWN_STRIDE);
	64	}
	65	iounmap(l2x0_base);
	66	return 0;
	67	}
	68
	69	static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
	70	{
	71	/*
	72	* We can't write to secure registers as we are in non-secure
	73	* mode, until we have some SMI service available.
	74	*/
	75	}
	76
	77	/*
	78	* FIXME: Should we set up the GPIO domain here?
	79	*
	80	* The problem is that we cannot put the interrupt resources into the platform
	81	* device until the irqdomain has been added. Right now, we set the GIC interrupt
	82	* domain from init_irq(), then load the gpio driver from
	83	* core_initcall(nmk_gpio_init) and add the platform devices from
	84	* arch_initcall(customize_machine).
	85	*
	86	* This feels fragile because it depends on the gpio device getting probed
	87	* _before_ any device uses the gpio interrupts.
	88	*/
	89	static void __init ux500_init_irq(void)
	90	{
	91	struct device_node *np;
	92	struct resource r;
	93
	94	irqchip_init();
	95	np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
	96	of_address_to_resource(np, 0, &r);
	97	of_node_put(np);
	98	if (!r.start) {
	99	pr_err("could not find PRCMU base resource\n");
	100	return;
	101	}
	102	prcmu_early_init(r.start, r.end-r.start);
	103	ux500_pm_init(r.start, r.end-r.start);
104
105	/* Unlock before init */
106	ux500_l2x0_unlock();
107	outer_cache.write_sec = ux500_l2c310_write_sec;
108	}
109
110	static void ux500_restart(enum reboot_mode mode, const char *cmd)
111	{
112	local_irq_disable();
113	local_fiq_disable();
114
115	prcmu_system_reset(0);
116	}
117
aa90eb9d RV	118	/*
	119	* The PMU IRQ lines of two cores are wired together into a single interrupt.
	120	* Bounce the interrupt to the other core if it's not ours.
	121	*/
	122	static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
	123	{
	124	irqreturn_t ret = handler(irq, dev);
	125	int other = !smp_processor_id();
	126
	127	if (ret == IRQ_NONE && cpu_online(other))
	128	irq_set_affinity(irq, cpumask_of(other));
	129
	130	/*
	131	* We should be able to get away with the amount of IRQ_NONEs we give,
	132	* while still having the spurious IRQ detection code kick in if the
	133	* interrupt really starts hitting spuriously.
	134	*/
	135	return ret;
	136	}
	137
0d01ab3a	138	static struct arm_pmu_platdata db8500_pmu_platdata = {
aa90eb9d RV	139	.handle_irq = db8500_pmu_handler,
	140	};
	141
fa86a764 LJ	142	static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
	143	/* Requires call-back bindings. */
	144	OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
cece5c40	145	/* Requires DMA bindings. */
acab2f6f LJ	146	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
	147	"ux500-msp-i2s.0", &msp0_platform_data),
	148	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
	149	"ux500-msp-i2s.1", &msp1_platform_data),
	150	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
	151	"ux500-msp-i2s.2", &msp2_platform_data),
	152	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
	153	"ux500-msp-i2s.3", &msp3_platform_data),
1b1d2e83	154	/* Requires non-DT:able platform data. */
4e657946	155	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL),
946cc7dd	156	OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
f016d440	157	OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
ef95f7ff FB	158	OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
ef95f7ff FB	159	NULL),
fa86a764 LJ	160	{},
	161	};
	162
c21a43b7	163	static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
4e657946	164	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL),
c21a43b7 LJ	165	{},
	166	};
	167
fa86a764 LJ	168	static const struct of_device_id u8500_local_bus_nodes[] = {
	169	/* only create devices below soc node */
	170	{ .compatible = "stericsson,db8500", },
	171	{ .compatible = "stericsson,db8500-prcmu", },
	172	{ .compatible = "simple-bus"},
	173	{ },
	174	};
	175
	176	static void __init u8500_init_machine(void)
	177	{
c21a43b7 LJ	178	/* automatically probe child nodes of dbx5x0 devices */
	179	if (of_machine_is_compatible("st-ericsson,u8540"))
	180	of_platform_populate(NULL, u8500_local_bus_nodes,
18a99278	181	u8540_auxdata_lookup, NULL);
c21a43b7 LJ	182	else
c21a43b7 LJ	183	of_platform_populate(NULL, u8500_local_bus_nodes,
18a99278	184	u8500_auxdata_lookup, NULL);
fa86a764 LJ	185	}
fa86a764 LJ	186
79b40753 LJ	187	static const char * stericsson_dt_platform_compat[] = {
	188	"st-ericsson,u8500",
	189	"st-ericsson,u8540",
	190	"st-ericsson,u9500",
	191	"st-ericsson,u9540",
fa86a764 LJ	192	NULL,
	193	};
	194
46c1bf81	195	DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
1e6cbc06 AB	196	.l2c_aux_val = 0,
1e6cbc06 AB	197	.l2c_aux_mask = ~0,
fa86a764	198	.init_irq = ux500_init_irq,
fa86a764	199	.init_machine = u8500_init_machine,
79b40753	200	.dt_compat = stericsson_dt_platform_compat,
bd93ec50	201	.restart = ux500_restart,
fa86a764	202	MACHINE_END