[deliverable/linux.git] / arch / arm / mach-ux500 / cpu-db8500.c

/*
 * Copyright (C) 2008-2009 ST-Ericsson SA
 *
 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2, as
 * published by the Free Software Foundation.
 *
 */
#include <linux/types.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/amba/bus.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mfd/abx500/ab8500.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/regulator/machine.h>
#include <linux/random.h>

#include <asm/pmu.h>
#include <asm/mach/map.h>

#include "setup.h"

#include "board-mop500-regulators.h"
#include "board-mop500.h"
#include "db8500-regs.h"
#include "id.h"

struct ab8500_platform_data ab8500_platdata = {
	.regulator	= &ab8500_regulator_plat_data,
};

struct prcmu_pdata db8500_prcmu_pdata = {
	.ab_platdata	= &ab8500_platdata,
	.version_offset	= DB8500_PRCMU_FW_VERSION_OFFSET,
	.legacy_offset	= DB8500_PRCMU_LEGACY_OFFSET,
};

/* minimum static i/o mapping required to boot U8500 platforms */
static struct map_desc u8500_uart_io_desc[] __initdata = {
	__IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
};
/*  U8500 and U9540 common io_desc */
static struct map_desc u8500_common_io_desc[] __initdata = {
	/* SCU base also covers GIC CPU BASE and TWD with its 4K page */
	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),

	__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
};

/* U8500 IO map specific description */
static struct map_desc u8500_io_desc[] __initdata = {
	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),

};

/* U9540 IO map specific description */
static struct map_desc u9540_io_desc[] __initdata = {
	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
};

void __init u8500_map_io(void)
{
	/*
	 * Map the UARTs early so that the DEBUG_LL stuff continues to work.
	 */
	iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));

	ux500_map_io();

	iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));

	if (cpu_is_ux540_family())
		iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
	else
		iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
}

/*
 * The PMU IRQ lines of two cores are wired together into a single interrupt.
 * Bounce the interrupt to the other core if it's not ours.
 */
static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
{
	irqreturn_t ret = handler(irq, dev);
	int other = !smp_processor_id();

	if (ret == IRQ_NONE && cpu_online(other))
		irq_set_affinity(irq, cpumask_of(other));

	/*
	 * We should be able to get away with the amount of IRQ_NONEs we give,
	 * while still having the spurious IRQ detection code kick in if the
	 * interrupt really starts hitting spuriously.
	 */
	return ret;
}

struct arm_pmu_platdata db8500_pmu_platdata = {
	.handle_irq		= db8500_pmu_handler,
};

static const char *db8500_read_soc_id(void)
{
	void __iomem *uid = __io_address(U8500_BB_UID_BASE);

	/* Throw these device-specific numbers into the entropy pool */
	add_device_randomness(uid, 0x14);
	return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
			 readl((u32 *)uid+0),
			 readl((u32 *)uid+1), readl((u32 *)uid+2),
			 readl((u32 *)uid+3), readl((u32 *)uid+4));
}

static struct device * __init db8500_soc_device_init(void)
{
	const char *soc_id = db8500_read_soc_id();

	return ux500_soc_device_init(soc_id);
}

static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
	/* Requires call-back bindings. */
	OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
	/* Requires DMA bindings. */
	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
		       "ux500-msp-i2s.0", &msp0_platform_data),
	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
		       "ux500-msp-i2s.1", &msp1_platform_data),
	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
		       "ux500-msp-i2s.2", &msp2_platform_data),
	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
		       "ux500-msp-i2s.3", &msp3_platform_data),
	/* Requires non-DT:able platform data. */
	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
			&db8500_prcmu_pdata),
	OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
	OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
	OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
			NULL),
	{},
};

static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
			&db8500_prcmu_pdata),
	{},
};

static const struct of_device_id u8500_local_bus_nodes[] = {
	/* only create devices below soc node */
	{ .compatible = "stericsson,db8500", },
	{ .compatible = "stericsson,db8500-prcmu", },
	{ .compatible = "simple-bus"},
	{ },
};

static void __init u8500_init_machine(void)
{
	struct device *parent = db8500_soc_device_init();

	/* automatically probe child nodes of dbx5x0 devices */
	if (of_machine_is_compatible("st-ericsson,u8540"))
		of_platform_populate(NULL, u8500_local_bus_nodes,
				     u8540_auxdata_lookup, parent);
	else
		of_platform_populate(NULL, u8500_local_bus_nodes,
				     u8500_auxdata_lookup, parent);
}

static const char * stericsson_dt_platform_compat[] = {
	"st-ericsson,u8500",
	"st-ericsson,u8540",
	"st-ericsson,u9500",
	"st-ericsson,u9540",
	NULL,
};

DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
	.smp            = smp_ops(ux500_smp_ops),
	.map_io		= u8500_map_io,
	.init_irq	= ux500_init_irq,
	/* we re-use nomadik timer here */
	.init_time	= ux500_timer_init,
	.init_machine	= u8500_init_machine,
	.init_late	= NULL,
	.dt_compat      = stericsson_dt_platform_compat,
	.restart        = ux500_restart,
MACHINE_END
Commit	Line	Data
aa44ef4d	1	/*
c15def1c	2	* Copyright (C) 2008-2009 ST-Ericsson SA
aa44ef4d SK	3	*
	4	* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2, as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11	#include <linux/types.h>
	12	#include <linux/init.h>
	13	#include <linux/device.h>
	14	#include <linux/amba/bus.h>
aa90eb9d	15	#include <linux/interrupt.h>
aa44ef4d SK	16	#include <linux/irq.h>
aa44ef4d SK	17	#include <linux/platform_device.h>
cc2c1334	18	#include <linux/io.h>
3a8e39c9	19	#include <linux/mfd/abx500/ab8500.h>
661c6af0	20	#include <linux/mfd/dbx500-prcmu.h>
fa86a764 LJ	21	#include <linux/of.h>
	22	#include <linux/of_platform.h>
	23	#include <linux/regulator/machine.h>
4040d10a	24	#include <linux/random.h>
aa44ef4d	25
5caecb44	26	#include <asm/pmu.h>
aa44ef4d	27	#include <asm/mach/map.h>
b8edf848	28
e657bcf6	29	#include "setup.h"
94bdc0e2	30
6f6d6433	31	#include "board-mop500-regulators.h"
fa86a764	32	#include "board-mop500.h"
6f6d6433	33	#include "db8500-regs.h"
7a4f2609	34	#include "id.h"
fbf1eadf	35
6f6d6433	36	struct ab8500_platform_data ab8500_platdata = {
6f6d6433 LJ	37	.regulator = &ab8500_regulator_plat_data,
	38	};
	39
	40	struct prcmu_pdata db8500_prcmu_pdata = {
	41	.ab_platdata = &ab8500_platdata,
6f6d6433 LJ	42	.version_offset = DB8500_PRCMU_FW_VERSION_OFFSET,
	43	.legacy_offset = DB8500_PRCMU_LEGACY_OFFSET,
	44	};
	45
aa44ef4d	46	/* minimum static i/o mapping required to boot U8500 platforms */
abf12d71	47	static struct map_desc u8500_uart_io_desc[] __initdata = {
92389ca8 RV	48	__IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
92389ca8 RV	49	__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
abf12d71	50	};
bc71c096 LW	51	/* U8500 and U9540 common io_desc */
bc71c096 LW	52	static struct map_desc u8500_common_io_desc[] __initdata = {
215e83d9 LW	53	/* SCU base also covers GIC CPU BASE and TWD with its 4K page */
215e83d9 LW	54	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
92389ca8 RV	55	__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
92389ca8 RV	56	__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
92389ca8	57	__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
92389ca8 RV	58	__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
	59
	60	__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
	61	__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
	62	__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
	63	__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
	64	__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
	65
c9c09572	66	__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
94bdc0e2 RV	67	__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
	68	__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
	69	__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
ee9581d7 MJ	70	};
	71
	72	/* U8500 IO map specific description */
	73	static struct map_desc u8500_io_desc[] __initdata = {
	74	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
fcbd458e	75	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
ee9581d7 MJ	76
	77	};
	78
	79	/* U9540 IO map specific description */
	80	static struct map_desc u9540_io_desc[] __initdata = {
	81	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
	82	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
75a36ee0 RV	83	};
75a36ee0 RV	84
abf12d71	85	void __init u8500_map_io(void)
f946738c	86	{
abf12d71 RV	87	/*
	88	* Map the UARTs early so that the DEBUG_LL stuff continues to work.
	89	*/
	90	iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
f946738c	91
abf12d71	92	ux500_map_io();
f946738c	93
bc71c096	94	iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
75a36ee0	95
e1bbb55d	96	if (cpu_is_ux540_family())
ee9581d7 MJ	97	iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
	98	else
	99	iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
aa44ef4d SK	100	}
aa44ef4d SK	101
aa90eb9d RV	102	/*
	103	* The PMU IRQ lines of two cores are wired together into a single interrupt.
	104	* Bounce the interrupt to the other core if it's not ours.
	105	*/
	106	static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
	107	{
	108	irqreturn_t ret = handler(irq, dev);
	109	int other = !smp_processor_id();
	110
	111	if (ret == IRQ_NONE && cpu_online(other))
	112	irq_set_affinity(irq, cpumask_of(other));
	113
	114	/*
	115	* We should be able to get away with the amount of IRQ_NONEs we give,
	116	* while still having the spurious IRQ detection code kick in if the
	117	* interrupt really starts hitting spuriously.
	118	*/
	119	return ret;
	120	}
	121
3a8e39c9	122	struct arm_pmu_platdata db8500_pmu_platdata = {
aa90eb9d RV	123	.handle_irq = db8500_pmu_handler,
	124	};
	125
eda413c2 LJ	126	static const char *db8500_read_soc_id(void)
	127	{
	128	void __iomem *uid = __io_address(U8500_BB_UID_BASE);
	129
4040d10a LW	130	/* Throw these device-specific numbers into the entropy pool */
4040d10a LW	131	add_device_randomness(uid, 0x14);
eda413c2	132	return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
33c8abce	133	readl((u32 *)uid+0),
eda413c2 LJ	134	readl((u32 )uid+1), readl((u32 )uid+2),
	135	readl((u32 )uid+3), readl((u32 )uid+4));
	136	}
	137
	138	static struct device * __init db8500_soc_device_init(void)
	139	{
	140	const char *soc_id = db8500_read_soc_id();
	141
	142	return ux500_soc_device_init(soc_id);
	143	}
	144
fa86a764 LJ	145	static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
	146	/* Requires call-back bindings. */
	147	OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
cece5c40	148	/* Requires DMA bindings. */
acab2f6f LJ	149	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
	150	"ux500-msp-i2s.0", &msp0_platform_data),
	151	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
	152	"ux500-msp-i2s.1", &msp1_platform_data),
	153	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
	154	"ux500-msp-i2s.2", &msp2_platform_data),
	155	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
	156	"ux500-msp-i2s.3", &msp3_platform_data),
1b1d2e83	157	/* Requires non-DT:able platform data. */
05ec260e LW	158	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
05ec260e LW	159	&db8500_prcmu_pdata),
946cc7dd	160	OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
f016d440	161	OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
ef95f7ff FB	162	OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
ef95f7ff FB	163	NULL),
fa86a764 LJ	164	{},
	165	};
	166
c21a43b7	167	static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
c21a43b7 LJ	168	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
	169	&db8500_prcmu_pdata),
	170	{},
	171	};
	172
fa86a764 LJ	173	static const struct of_device_id u8500_local_bus_nodes[] = {
	174	/* only create devices below soc node */
	175	{ .compatible = "stericsson,db8500", },
	176	{ .compatible = "stericsson,db8500-prcmu", },
	177	{ .compatible = "simple-bus"},
	178	{ },
	179	};
	180
	181	static void __init u8500_init_machine(void)
	182	{
1e74043a	183	struct device *parent = db8500_soc_device_init();
fa86a764	184
c21a43b7 LJ	185	/* automatically probe child nodes of dbx5x0 devices */
	186	if (of_machine_is_compatible("st-ericsson,u8540"))
	187	of_platform_populate(NULL, u8500_local_bus_nodes,
	188	u8540_auxdata_lookup, parent);
	189	else
	190	of_platform_populate(NULL, u8500_local_bus_nodes,
	191	u8500_auxdata_lookup, parent);
fa86a764 LJ	192	}
fa86a764 LJ	193
79b40753 LJ	194	static const char * stericsson_dt_platform_compat[] = {
	195	"st-ericsson,u8500",
	196	"st-ericsson,u8540",
	197	"st-ericsson,u9500",
	198	"st-ericsson,u9540",
fa86a764 LJ	199	NULL,
	200	};
	201
46c1bf81	202	DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
f44c5fd1	203	.smp = smp_ops(ux500_smp_ops),
fa86a764 LJ	204	.map_io = u8500_map_io,
	205	.init_irq = ux500_init_irq,
	206	/* we re-use nomadik timer here */
6bb27d73	207	.init_time = ux500_timer_init,
fa86a764	208	.init_machine = u8500_init_machine,
74a1c9ab	209	.init_late = NULL,
79b40753	210	.dt_compat = stericsson_dt_platform_compat,
bd93ec50	211	.restart = ux500_restart,
fa86a764	212	MACHINE_END