[deliverable/linux.git] / arch / arm / mach-ux500 / cpu-db8500.c

/*
 * Copyright (C) 2008-2009 ST-Ericsson SA
 *
 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2, as
 * published by the Free Software Foundation.
 *
 */
#include <linux/types.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/amba/bus.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mfd/abx500/ab8500.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/regulator/machine.h>
#include <linux/platform_data/pinctrl-nomadik.h>
#include <linux/random.h>

#include <asm/pmu.h>
#include <asm/mach/map.h>

#include "setup.h"
#include "devices.h"
#include "irqs.h"

#include "devices-db8500.h"
#include "db8500-regs.h"
#include "board-mop500.h"
#include "id.h"

/* minimum static i/o mapping required to boot U8500 platforms */
static struct map_desc u8500_uart_io_desc[] __initdata = {
	__IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
};
/*  U8500 and U9540 common io_desc */
static struct map_desc u8500_common_io_desc[] __initdata = {
	/* SCU base also covers GIC CPU BASE and TWD with its 4K page */
	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),

	__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
};

/* U8500 IO map specific description */
static struct map_desc u8500_io_desc[] __initdata = {
	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),

};

/* U9540 IO map specific description */
static struct map_desc u9540_io_desc[] __initdata = {
	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
};

void __init u8500_map_io(void)
{
	/*
	 * Map the UARTs early so that the DEBUG_LL stuff continues to work.
	 */
	iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));

	ux500_map_io();

	iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));

	if (cpu_is_ux540_family())
		iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
	else
		iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
}

/*
 * The PMU IRQ lines of two cores are wired together into a single interrupt.
 * Bounce the interrupt to the other core if it's not ours.
 */
static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
{
	irqreturn_t ret = handler(irq, dev);
	int other = !smp_processor_id();

	if (ret == IRQ_NONE && cpu_online(other))
		irq_set_affinity(irq, cpumask_of(other));

	/*
	 * We should be able to get away with the amount of IRQ_NONEs we give,
	 * while still having the spurious IRQ detection code kick in if the
	 * interrupt really starts hitting spuriously.
	 */
	return ret;
}

struct arm_pmu_platdata db8500_pmu_platdata = {
	.handle_irq		= db8500_pmu_handler,
};

static const char *db8500_read_soc_id(void)
{
	void __iomem *uid = __io_address(U8500_BB_UID_BASE);

	/* Throw these device-specific numbers into the entropy pool */
	add_device_randomness(uid, 0x14);
	return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
			 readl((u32 *)uid+0),
			 readl((u32 *)uid+1), readl((u32 *)uid+2),
			 readl((u32 *)uid+3), readl((u32 *)uid+4));
}

static struct device * __init db8500_soc_device_init(void)
{
	const char *soc_id = db8500_read_soc_id();

	return ux500_soc_device_init(soc_id);
}

#ifdef CONFIG_MACH_UX500_DT
static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
	/* Requires call-back bindings. */
	OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
	/* Requires DMA bindings. */
	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
		       "ux500-msp-i2s.0", &msp0_platform_data),
	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
		       "ux500-msp-i2s.1", &msp1_platform_data),
	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
		       "ux500-msp-i2s.2", &msp2_platform_data),
	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
		       "ux500-msp-i2s.3", &msp3_platform_data),
	/* Requires non-DT:able platform data. */
	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
			&db8500_prcmu_pdata),
	OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
	OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
	OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
			NULL),
	/* Requires device name bindings. */
	OF_DEV_AUXDATA("stericsson,db8500-pinctrl", U8500_PRCMU_BASE,
		"pinctrl-db8500", NULL),
	{},
};

static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
	/* Requires DMA bindings. */
	OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", NULL),
	OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", NULL),
	OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", NULL),
	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
			&db8500_prcmu_pdata),
	{},
};

static const struct of_device_id u8500_local_bus_nodes[] = {
	/* only create devices below soc node */
	{ .compatible = "stericsson,db8500", },
	{ .compatible = "stericsson,db8500-prcmu", },
	{ .compatible = "simple-bus"},
	{ },
};

static void __init u8500_init_machine(void)
{
	struct device *parent = db8500_soc_device_init();

	/* Pinmaps must be in place before devices register */
	if (of_machine_is_compatible("st-ericsson,mop500"))
		mop500_pinmaps_init();
	else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
		snowball_pinmaps_init();
	} else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
		hrefv60_pinmaps_init();
	else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
		/* TODO: Add pinmaps for ccu9540 board. */

	/* automatically probe child nodes of dbx5x0 devices */
	if (of_machine_is_compatible("st-ericsson,u8540"))
		of_platform_populate(NULL, u8500_local_bus_nodes,
				     u8540_auxdata_lookup, parent);
	else
		of_platform_populate(NULL, u8500_local_bus_nodes,
				     u8500_auxdata_lookup, parent);
}

static const char * stericsson_dt_platform_compat[] = {
	"st-ericsson,u8500",
	"st-ericsson,u8540",
	"st-ericsson,u9500",
	"st-ericsson,u9540",
	NULL,
};

DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
	.smp            = smp_ops(ux500_smp_ops),
	.map_io		= u8500_map_io,
	.init_irq	= ux500_init_irq,
	/* we re-use nomadik timer here */
	.init_time	= ux500_timer_init,
	.init_machine	= u8500_init_machine,
	.init_late	= NULL,
	.dt_compat      = stericsson_dt_platform_compat,
	.restart        = ux500_restart,
MACHINE_END

#endif
Commit	Line	Data
aa44ef4d	1	/*
c15def1c	2	* Copyright (C) 2008-2009 ST-Ericsson SA
aa44ef4d SK	3	*
	4	* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2, as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11	#include <linux/types.h>
	12	#include <linux/init.h>
	13	#include <linux/device.h>
	14	#include <linux/amba/bus.h>
aa90eb9d	15	#include <linux/interrupt.h>
aa44ef4d SK	16	#include <linux/irq.h>
aa44ef4d SK	17	#include <linux/platform_device.h>
cc2c1334	18	#include <linux/io.h>
3a8e39c9	19	#include <linux/mfd/abx500/ab8500.h>
661c6af0	20	#include <linux/mfd/dbx500-prcmu.h>
fa86a764 LJ	21	#include <linux/of.h>
	22	#include <linux/of_platform.h>
	23	#include <linux/regulator/machine.h>
7cb15e10	24	#include <linux/platform_data/pinctrl-nomadik.h>
4040d10a	25	#include <linux/random.h>
aa44ef4d	26
5caecb44	27	#include <asm/pmu.h>
aa44ef4d	28	#include <asm/mach/map.h>
b8edf848	29
e657bcf6 AB	30	#include "setup.h"
e657bcf6 AB	31	#include "devices.h"
eba52748	32	#include "irqs.h"
94bdc0e2	33
fbf1eadf	34	#include "devices-db8500.h"
174e7796	35	#include "db8500-regs.h"
fa86a764	36	#include "board-mop500.h"
7a4f2609	37	#include "id.h"
fbf1eadf	38
aa44ef4d	39	/* minimum static i/o mapping required to boot U8500 platforms */
abf12d71	40	static struct map_desc u8500_uart_io_desc[] __initdata = {
92389ca8 RV	41	__IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
92389ca8 RV	42	__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
abf12d71	43	};
bc71c096 LW	44	/* U8500 and U9540 common io_desc */
bc71c096 LW	45	static struct map_desc u8500_common_io_desc[] __initdata = {
215e83d9 LW	46	/* SCU base also covers GIC CPU BASE and TWD with its 4K page */
215e83d9 LW	47	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
92389ca8 RV	48	__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
92389ca8 RV	49	__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
92389ca8	50	__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
92389ca8 RV	51	__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
	52
	53	__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
	54	__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
	55	__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
	56	__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
	57	__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
	58
c9c09572	59	__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
94bdc0e2 RV	60	__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
	61	__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
	62	__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
ee9581d7 MJ	63	};
	64
	65	/* U8500 IO map specific description */
	66	static struct map_desc u8500_io_desc[] __initdata = {
	67	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
fcbd458e	68	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
ee9581d7 MJ	69
	70	};
	71
	72	/* U9540 IO map specific description */
	73	static struct map_desc u9540_io_desc[] __initdata = {
	74	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
	75	__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
75a36ee0 RV	76	};
75a36ee0 RV	77
abf12d71	78	void __init u8500_map_io(void)
f946738c	79	{
abf12d71 RV	80	/*
	81	* Map the UARTs early so that the DEBUG_LL stuff continues to work.
	82	*/
	83	iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
f946738c	84
abf12d71	85	ux500_map_io();
f946738c	86
bc71c096	87	iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
75a36ee0	88
e1bbb55d	89	if (cpu_is_ux540_family())
ee9581d7 MJ	90	iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
	91	else
	92	iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
aa44ef4d SK	93	}
aa44ef4d SK	94
aa90eb9d RV	95	/*
	96	* The PMU IRQ lines of two cores are wired together into a single interrupt.
	97	* Bounce the interrupt to the other core if it's not ours.
	98	*/
	99	static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
	100	{
	101	irqreturn_t ret = handler(irq, dev);
	102	int other = !smp_processor_id();
	103
	104	if (ret == IRQ_NONE && cpu_online(other))
	105	irq_set_affinity(irq, cpumask_of(other));
	106
	107	/*
	108	* We should be able to get away with the amount of IRQ_NONEs we give,
	109	* while still having the spurious IRQ detection code kick in if the
	110	* interrupt really starts hitting spuriously.
	111	*/
	112	return ret;
	113	}
	114
3a8e39c9	115	struct arm_pmu_platdata db8500_pmu_platdata = {
aa90eb9d RV	116	.handle_irq = db8500_pmu_handler,
	117	};
	118
eda413c2 LJ	119	static const char *db8500_read_soc_id(void)
	120	{
	121	void __iomem *uid = __io_address(U8500_BB_UID_BASE);
	122
4040d10a LW	123	/* Throw these device-specific numbers into the entropy pool */
4040d10a LW	124	add_device_randomness(uid, 0x14);
eda413c2	125	return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
33c8abce	126	readl((u32 *)uid+0),
eda413c2 LJ	127	readl((u32 )uid+1), readl((u32 )uid+2),
	128	readl((u32 )uid+3), readl((u32 )uid+4));
	129	}
	130
	131	static struct device * __init db8500_soc_device_init(void)
	132	{
	133	const char *soc_id = db8500_read_soc_id();
	134
	135	return ux500_soc_device_init(soc_id);
	136	}
	137
fa86a764	138	#ifdef CONFIG_MACH_UX500_DT
fa86a764 LJ	139	static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
	140	/* Requires call-back bindings. */
	141	OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
cece5c40	142	/* Requires DMA bindings. */
acab2f6f LJ	143	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
	144	"ux500-msp-i2s.0", &msp0_platform_data),
	145	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
	146	"ux500-msp-i2s.1", &msp1_platform_data),
	147	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
	148	"ux500-msp-i2s.2", &msp2_platform_data),
	149	OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
	150	"ux500-msp-i2s.3", &msp3_platform_data),
1b1d2e83	151	/* Requires non-DT:able platform data. */
05ec260e LW	152	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
05ec260e LW	153	&db8500_prcmu_pdata),
946cc7dd	154	OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
f016d440	155	OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
ef95f7ff FB	156	OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
ef95f7ff FB	157	NULL),
fa86a764	158	/* Requires device name bindings. */
79d1d62c	159	OF_DEV_AUXDATA("stericsson,db8500-pinctrl", U8500_PRCMU_BASE,
9fcb4cc2	160	"pinctrl-db8500", NULL),
fa86a764 LJ	161	{},
	162	};
	163
c21a43b7 LJ	164	static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
	165	/* Requires DMA bindings. */
	166	OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", NULL),
	167	OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", NULL),
	168	OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", NULL),
	169	OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
	170	&db8500_prcmu_pdata),
	171	{},
	172	};
	173
fa86a764 LJ	174	static const struct of_device_id u8500_local_bus_nodes[] = {
	175	/* only create devices below soc node */
	176	{ .compatible = "stericsson,db8500", },
	177	{ .compatible = "stericsson,db8500-prcmu", },
	178	{ .compatible = "simple-bus"},
	179	{ },
	180	};
	181
	182	static void __init u8500_init_machine(void)
	183	{
1e74043a	184	struct device *parent = db8500_soc_device_init();
fa86a764 LJ	185
	186	/* Pinmaps must be in place before devices register */
	187	if (of_machine_is_compatible("st-ericsson,mop500"))
	188	mop500_pinmaps_init();
265c3c0a	189	else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
fa86a764	190	snowball_pinmaps_init();
265c3c0a	191	} else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
fa86a764	192	hrefv60_pinmaps_init();
58e5b9e3 LJ	193	else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
58e5b9e3 LJ	194	/* TODO: Add pinmaps for ccu9540 board. */
fa86a764	195
c21a43b7 LJ	196	/* automatically probe child nodes of dbx5x0 devices */
	197	if (of_machine_is_compatible("st-ericsson,u8540"))
	198	of_platform_populate(NULL, u8500_local_bus_nodes,
	199	u8540_auxdata_lookup, parent);
	200	else
	201	of_platform_populate(NULL, u8500_local_bus_nodes,
	202	u8500_auxdata_lookup, parent);
fa86a764 LJ	203	}
fa86a764 LJ	204
79b40753 LJ	205	static const char * stericsson_dt_platform_compat[] = {
	206	"st-ericsson,u8500",
	207	"st-ericsson,u8540",
	208	"st-ericsson,u9500",
	209	"st-ericsson,u9540",
fa86a764 LJ	210	NULL,
	211	};
	212
46c1bf81	213	DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
f44c5fd1	214	.smp = smp_ops(ux500_smp_ops),
fa86a764 LJ	215	.map_io = u8500_map_io,
	216	.init_irq = ux500_init_irq,
	217	/* we re-use nomadik timer here */
6bb27d73	218	.init_time = ux500_timer_init,
fa86a764	219	.init_machine = u8500_init_machine,
74a1c9ab	220	.init_late = NULL,
79b40753	221	.dt_compat = stericsson_dt_platform_compat,
bd93ec50	222	.restart = ux500_restart,
fa86a764 LJ	223	MACHINE_END
	224
	225	#endif