[deliverable/linux.git] / arch / arm / mach-ux500 / devices-db8500.c

/*
 * Copyright (C) ST-Ericsson SA 2010
 *
 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
 * License terms: GNU General Public License (GPL) version 2
 */

#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/amba/bus.h>

#include <plat/ste_dma40.h>

#include <mach/hardware.h>
#include <mach/setup.h>

#include "ste-dma40-db8500.h"

static struct nmk_gpio_platform_data u8500_gpio_data[] = {
	GPIO_DATA("GPIO-0-31", 0),
	GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
	GPIO_DATA("GPIO-64-95", 64),
	GPIO_DATA("GPIO-96-127", 96), /* 98..127 not routed to pin */
	GPIO_DATA("GPIO-128-159", 128),
	GPIO_DATA("GPIO-160-191", 160), /* 172..191 not routed to pin */
	GPIO_DATA("GPIO-192-223", 192),
	GPIO_DATA("GPIO-224-255", 224), /* 231..255 not routed to pin */
	GPIO_DATA("GPIO-256-288", 256), /* 268..288 not routed to pin */
};

static struct resource u8500_gpio_resources[] = {
	GPIO_RESOURCE(0),
	GPIO_RESOURCE(1),
	GPIO_RESOURCE(2),
	GPIO_RESOURCE(3),
	GPIO_RESOURCE(4),
	GPIO_RESOURCE(5),
	GPIO_RESOURCE(6),
	GPIO_RESOURCE(7),
	GPIO_RESOURCE(8),
};

struct platform_device u8500_gpio_devs[] = {
	GPIO_DEVICE(0),
	GPIO_DEVICE(1),
	GPIO_DEVICE(2),
	GPIO_DEVICE(3),
	GPIO_DEVICE(4),
	GPIO_DEVICE(5),
	GPIO_DEVICE(6),
	GPIO_DEVICE(7),
	GPIO_DEVICE(8),
};

struct amba_device u8500_ssp0_device = {
	.dev = {
		.coherent_dma_mask = ~0,
		.init_name = "ssp0",
	},
	.res = {
		.start = U8500_SSP0_BASE,
		.end   = U8500_SSP0_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	.irq = {IRQ_DB8500_SSP0, NO_IRQ },
	/* ST-Ericsson modified id */
	.periphid = SSP_PER_ID,
};

static struct resource u8500_i2c0_resources[] = {
	[0] = {
		.start	= U8500_I2C0_BASE,
		.end	= U8500_I2C0_BASE + SZ_4K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_DB8500_I2C0,
		.end	= IRQ_DB8500_I2C0,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device u8500_i2c0_device = {
	.name		= "nmk-i2c",
	.id		= 0,
	.resource	= u8500_i2c0_resources,
	.num_resources	= ARRAY_SIZE(u8500_i2c0_resources),
};

static struct resource u8500_i2c4_resources[] = {
	[0] = {
		.start	= U8500_I2C4_BASE,
		.end	= U8500_I2C4_BASE + SZ_4K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_DB8500_I2C4,
		.end	= IRQ_DB8500_I2C4,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device u8500_i2c4_device = {
	.name		= "nmk-i2c",
	.id		= 4,
	.resource	= u8500_i2c4_resources,
	.num_resources	= ARRAY_SIZE(u8500_i2c4_resources),
};

static struct resource dma40_resources[] = {
	[0] = {
		.start = U8500_DMA_BASE,
		.end   = U8500_DMA_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
		.name  = "base",
	},
	[1] = {
		.start = U8500_DMA_LCPA_BASE,
		.end   = U8500_DMA_LCPA_BASE + 2 * SZ_1K - 1,
		.flags = IORESOURCE_MEM,
		.name  = "lcpa",
	},
	[2] = {
		.start = IRQ_DB8500_DMA,
		.end   = IRQ_DB8500_DMA,
		.flags = IORESOURCE_IRQ,
	}
};

/* Default configuration for physcial memcpy */
struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
	.mode = STEDMA40_MODE_PHYSICAL,
	.dir = STEDMA40_MEM_TO_MEM,

	.src_info.endianess = STEDMA40_LITTLE_ENDIAN,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.src_info.psize = STEDMA40_PSIZE_PHY_1,
	.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,

	.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.psize = STEDMA40_PSIZE_PHY_1,
	.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
};
/* Default configuration for logical memcpy */
struct stedma40_chan_cfg dma40_memcpy_conf_log = {
	.channel_type = STEDMA40_NO_TIM_FOR_LINK,
	.dir = STEDMA40_MEM_TO_MEM,

	.src_info.endianess = STEDMA40_LITTLE_ENDIAN,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.src_info.psize = STEDMA40_PSIZE_LOG_1,
	.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,

	.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.psize = STEDMA40_PSIZE_LOG_1,
	.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
};

/*
 * Mapping between destination event lines and physical device address.
 * The event line is tied to a device and therefor the address is constant.
 */
static const dma_addr_t dma40_tx_map[STEDMA40_NR_DEV];

/* Mapping between source event lines and physical device address */
static const dma_addr_t dma40_rx_map[STEDMA40_NR_DEV];

/* Reserved event lines for memcpy only */
static int dma40_memcpy_event[] = {
	STEDMA40_MEMCPY_TX_0,
	STEDMA40_MEMCPY_TX_1,
	STEDMA40_MEMCPY_TX_2,
	STEDMA40_MEMCPY_TX_3,
	STEDMA40_MEMCPY_TX_4,
	STEDMA40_MEMCPY_TX_5,
};

static struct stedma40_platform_data dma40_plat_data = {
	.dev_len = STEDMA40_NR_DEV,
	.dev_rx = dma40_rx_map,
	.dev_tx = dma40_tx_map,
	.memcpy = dma40_memcpy_event,
	.memcpy_len = ARRAY_SIZE(dma40_memcpy_event),
	.memcpy_conf_phy = &dma40_memcpy_conf_phy,
	.memcpy_conf_log = &dma40_memcpy_conf_log,
	.disabled_channels = {-1},
};

struct platform_device u8500_dma40_device = {
	.dev = {
		.platform_data = &dma40_plat_data,
	},
	.name = "dma40",
	.id = 0,
	.num_resources = ARRAY_SIZE(dma40_resources),
	.resource = dma40_resources
};

void dma40_u8500ed_fixup(void)
{
	dma40_plat_data.memcpy = NULL;
	dma40_plat_data.memcpy_len = 0;
	dma40_resources[0].start = U8500_DMA_BASE_ED;
	dma40_resources[0].end = U8500_DMA_BASE_ED + SZ_4K - 1;
	dma40_resources[1].start = U8500_DMA_LCPA_BASE_ED;
	dma40_resources[1].end = U8500_DMA_LCPA_BASE_ED + 2 * SZ_1K - 1;
}
Commit	Line	Data
9e4e7fe1 RV	1	/*
	2	* Copyright (C) ST-Ericsson SA 2010
	3	*
	4	* Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
	5	* License terms: GNU General Public License (GPL) version 2
	6	*/
	7
	8	#include <linux/kernel.h>
	9	#include <linux/platform_device.h>
	10	#include <linux/interrupt.h>
	11	#include <linux/io.h>
5b1f7ddf	12	#include <linux/gpio.h>
9e4e7fe1 RV	13	#include <linux/amba/bus.h>
9e4e7fe1 RV	14
7b8ddb06 LW	15	#include <plat/ste_dma40.h>
7b8ddb06 LW	16
9e4e7fe1 RV	17	#include <mach/hardware.h>
	18	#include <mach/setup.h>
	19
7b8ddb06 LW	20	#include "ste-dma40-db8500.h"
7b8ddb06 LW	21
5b1f7ddf RV	22	static struct nmk_gpio_platform_data u8500_gpio_data[] = {
	23	GPIO_DATA("GPIO-0-31", 0),
	24	GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
	25	GPIO_DATA("GPIO-64-95", 64),
	26	GPIO_DATA("GPIO-96-127", 96), /* 98..127 not routed to pin */
	27	GPIO_DATA("GPIO-128-159", 128),
	28	GPIO_DATA("GPIO-160-191", 160), /* 172..191 not routed to pin */
	29	GPIO_DATA("GPIO-192-223", 192),
	30	GPIO_DATA("GPIO-224-255", 224), /* 231..255 not routed to pin */
	31	GPIO_DATA("GPIO-256-288", 256), /* 268..288 not routed to pin */
	32	};
	33
	34	static struct resource u8500_gpio_resources[] = {
	35	GPIO_RESOURCE(0),
	36	GPIO_RESOURCE(1),
	37	GPIO_RESOURCE(2),
	38	GPIO_RESOURCE(3),
	39	GPIO_RESOURCE(4),
	40	GPIO_RESOURCE(5),
	41	GPIO_RESOURCE(6),
	42	GPIO_RESOURCE(7),
	43	GPIO_RESOURCE(8),
	44	};
	45
	46	struct platform_device u8500_gpio_devs[] = {
	47	GPIO_DEVICE(0),
	48	GPIO_DEVICE(1),
	49	GPIO_DEVICE(2),
	50	GPIO_DEVICE(3),
	51	GPIO_DEVICE(4),
	52	GPIO_DEVICE(5),
	53	GPIO_DEVICE(6),
	54	GPIO_DEVICE(7),
	55	GPIO_DEVICE(8),
	56	};
	57
9e4e7fe1 RV	58	struct amba_device u8500_ssp0_device = {
	59	.dev = {
	60	.coherent_dma_mask = ~0,
	61	.init_name = "ssp0",
	62	},
	63	.res = {
	64	.start = U8500_SSP0_BASE,
	65	.end = U8500_SSP0_BASE + SZ_4K - 1,
	66	.flags = IORESOURCE_MEM,
	67	},
6055930c	68	.irq = {IRQ_DB8500_SSP0, NO_IRQ },
9e4e7fe1 RV	69	/* ST-Ericsson modified id */
	70	.periphid = SSP_PER_ID,
	71	};
f9faf237 RV	72
	73	static struct resource u8500_i2c0_resources[] = {
	74	[0] = {
	75	.start = U8500_I2C0_BASE,
	76	.end = U8500_I2C0_BASE + SZ_4K - 1,
	77	.flags = IORESOURCE_MEM,
	78	},
	79	[1] = {
6055930c RV	80	.start = IRQ_DB8500_I2C0,
6055930c RV	81	.end = IRQ_DB8500_I2C0,
f9faf237 RV	82	.flags = IORESOURCE_IRQ,
	83	}
	84	};
	85
	86	struct platform_device u8500_i2c0_device = {
	87	.name = "nmk-i2c",
	88	.id = 0,
	89	.resource = u8500_i2c0_resources,
	90	.num_resources = ARRAY_SIZE(u8500_i2c0_resources),
	91	};
	92
	93	static struct resource u8500_i2c4_resources[] = {
	94	[0] = {
	95	.start = U8500_I2C4_BASE,
	96	.end = U8500_I2C4_BASE + SZ_4K - 1,
	97	.flags = IORESOURCE_MEM,
	98	},
	99	[1] = {
6055930c RV	100	.start = IRQ_DB8500_I2C4,
6055930c RV	101	.end = IRQ_DB8500_I2C4,
f9faf237 RV	102	.flags = IORESOURCE_IRQ,
	103	}
	104	};
	105
	106	struct platform_device u8500_i2c4_device = {
	107	.name = "nmk-i2c",
	108	.id = 4,
	109	.resource = u8500_i2c4_resources,
	110	.num_resources = ARRAY_SIZE(u8500_i2c4_resources),
	111	};
7b8ddb06 LW	112
	113	static struct resource dma40_resources[] = {
	114	[0] = {
	115	.start = U8500_DMA_BASE,
5aa12e8c	116	.end = U8500_DMA_BASE + SZ_4K - 1,
7b8ddb06	117	.flags = IORESOURCE_MEM,
5aa12e8c	118	.name = "base",
7b8ddb06 LW	119	},
	120	[1] = {
	121	.start = U8500_DMA_LCPA_BASE,
5aa12e8c	122	.end = U8500_DMA_LCPA_BASE + 2 * SZ_1K - 1,
7b8ddb06	123	.flags = IORESOURCE_MEM,
5aa12e8c	124	.name = "lcpa",
7b8ddb06 LW	125	},
7b8ddb06 LW	126	[2] = {
6055930c RV	127	.start = IRQ_DB8500_DMA,
6055930c RV	128	.end = IRQ_DB8500_DMA,
5aa12e8c JA	129	.flags = IORESOURCE_IRQ,
5aa12e8c JA	130	}
7b8ddb06 LW	131	};
	132
	133	/* Default configuration for physcial memcpy */
	134	struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
38bdbf02	135	.mode = STEDMA40_MODE_PHYSICAL,
7b8ddb06 LW	136	.dir = STEDMA40_MEM_TO_MEM,
	137
	138	.src_info.endianess = STEDMA40_LITTLE_ENDIAN,
	139	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	140	.src_info.psize = STEDMA40_PSIZE_PHY_1,
ef934aea	141	.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
7b8ddb06 LW	142
	143	.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
	144	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
	145	.dst_info.psize = STEDMA40_PSIZE_PHY_1,
ef934aea	146	.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
7b8ddb06 LW	147	};
	148	/* Default configuration for logical memcpy */
	149	struct stedma40_chan_cfg dma40_memcpy_conf_log = {
20a5b6d0	150	.channel_type = STEDMA40_NO_TIM_FOR_LINK,
7b8ddb06 LW	151	.dir = STEDMA40_MEM_TO_MEM,
	152
	153	.src_info.endianess = STEDMA40_LITTLE_ENDIAN,
	154	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	155	.src_info.psize = STEDMA40_PSIZE_LOG_1,
ef934aea	156	.src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
7b8ddb06 LW	157
	158	.dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
	159	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
	160	.dst_info.psize = STEDMA40_PSIZE_LOG_1,
ef934aea	161	.dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,
7b8ddb06 LW	162	};
	163
	164	/*
	165	* Mapping between destination event lines and physical device address.
	166	* The event line is tied to a device and therefor the address is constant.
	167	*/
	168	static const dma_addr_t dma40_tx_map[STEDMA40_NR_DEV];
	169
	170	/* Mapping between source event lines and physical device address */
	171	static const dma_addr_t dma40_rx_map[STEDMA40_NR_DEV];
	172
	173	/* Reserved event lines for memcpy only */
	174	static int dma40_memcpy_event[] = {
8bc68fa5	175	STEDMA40_MEMCPY_TX_0,
7b8ddb06 LW	176	STEDMA40_MEMCPY_TX_1,
	177	STEDMA40_MEMCPY_TX_2,
	178	STEDMA40_MEMCPY_TX_3,
	179	STEDMA40_MEMCPY_TX_4,
8bc68fa5	180	STEDMA40_MEMCPY_TX_5,
7b8ddb06 LW	181	};
	182
	183	static struct stedma40_platform_data dma40_plat_data = {
	184	.dev_len = STEDMA40_NR_DEV,
	185	.dev_rx = dma40_rx_map,
	186	.dev_tx = dma40_tx_map,
	187	.memcpy = dma40_memcpy_event,
	188	.memcpy_len = ARRAY_SIZE(dma40_memcpy_event),
	189	.memcpy_conf_phy = &dma40_memcpy_conf_phy,
	190	.memcpy_conf_log = &dma40_memcpy_conf_log,
59516725	191	.disabled_channels = {-1},
7b8ddb06 LW	192	};
	193
	194	struct platform_device u8500_dma40_device = {
	195	.dev = {
	196	.platform_data = &dma40_plat_data,
	197	},
	198	.name = "dma40",
	199	.id = 0,
	200	.num_resources = ARRAY_SIZE(dma40_resources),
	201	.resource = dma40_resources
	202	};
	203
	204	void dma40_u8500ed_fixup(void)
	205	{
	206	dma40_plat_data.memcpy = NULL;
	207	dma40_plat_data.memcpy_len = 0;
	208	dma40_resources[0].start = U8500_DMA_BASE_ED;
	209	dma40_resources[0].end = U8500_DMA_BASE_ED + SZ_4K - 1;
f4185592 LW	210	dma40_resources[1].start = U8500_DMA_LCPA_BASE_ED;
f4185592 LW	211	dma40_resources[1].end = U8500_DMA_LCPA_BASE_ED + 2 * SZ_1K - 1;
7b8ddb06	212	}