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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-versatile/versatile_pb.c | |
3 | * | |
4 | * Copyright (C) 2004 ARM Limited | |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | */ | |
21 | ||
1da177e4 LT |
22 | #include <linux/init.h> |
23 | #include <linux/device.h> | |
24 | #include <linux/sysdev.h> | |
a62c80e5 | 25 | #include <linux/amba/bus.h> |
fced80c7 | 26 | #include <linux/io.h> |
1da177e4 | 27 | |
a09e64fb | 28 | #include <mach/hardware.h> |
1da177e4 LT |
29 | #include <asm/irq.h> |
30 | #include <asm/mach-types.h> | |
1da177e4 LT |
31 | |
32 | #include <asm/mach/arch.h> | |
33 | #include <asm/mach/mmc.h> | |
34 | ||
35 | #include "core.h" | |
36 | ||
37 | #if 1 | |
38 | #define IRQ_MMCI1A IRQ_VICSOURCE23 | |
39 | #else | |
40 | #define IRQ_MMCI1A IRQ_SIC_MMCI1A | |
41 | #endif | |
42 | ||
43 | static struct mmc_platform_data mmc1_plat_data = { | |
44 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | |
45 | .status = mmc_status, | |
46 | }; | |
47 | ||
48 | #define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } | |
49 | #define UART3_DMA { 0x86, 0x87 } | |
50 | #define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } | |
51 | #define SCI1_DMA { 0x88, 0x89 } | |
52 | #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } | |
53 | #define MMCI1_DMA { 0x85, 0 } | |
54 | ||
55 | /* | |
56 | * These devices are connected via the core APB bridge | |
57 | */ | |
58 | #define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } | |
59 | #define GPIO2_DMA { 0, 0 } | |
60 | #define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } | |
61 | #define GPIO3_DMA { 0, 0 } | |
62 | ||
63 | /* | |
64 | * These devices are connected via the DMA APB bridge | |
65 | */ | |
66 | ||
67 | /* FPGA Primecells */ | |
68 | AMBA_DEVICE(uart3, "fpga:09", UART3, NULL); | |
69 | AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL); | |
70 | AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); | |
71 | ||
72 | /* DevChip Primecells */ | |
73 | AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL); | |
74 | AMBA_DEVICE(gpio3, "dev:e7", GPIO3, NULL); | |
75 | ||
76 | static struct amba_device *amba_devs[] __initdata = { | |
77 | &uart3_device, | |
78 | &gpio2_device, | |
79 | &gpio3_device, | |
80 | &sci1_device, | |
81 | &mmc1_device, | |
82 | }; | |
83 | ||
4e4e520f | 84 | static void __init versatile_pb_init(void) |
1da177e4 LT |
85 | { |
86 | int i; | |
87 | ||
4e4e520f | 88 | versatile_init(); |
1da177e4 | 89 | |
4e4e520f RK |
90 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
91 | struct amba_device *d = amba_devs[i]; | |
92 | amba_device_register(d, &iomem_resource); | |
93 | } | |
1da177e4 LT |
94 | } |
95 | ||
1da177e4 | 96 | MACHINE_START(VERSATILE_PB, "ARM-Versatile PB") |
e9dea0c6 | 97 | /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ |
e9dea0c6 RK |
98 | .phys_io = 0x101f1000, |
99 | .io_pg_offst = ((0xf11f1000) >> 18) & 0xfffc, | |
100 | .boot_params = 0x00000100, | |
101 | .map_io = versatile_map_io, | |
102 | .init_irq = versatile_init_irq, | |
1da177e4 | 103 | .timer = &versatile_timer, |
4e4e520f | 104 | .init_machine = versatile_pb_init, |
1da177e4 | 105 | MACHINE_END |