Commit | Line | Data |
---|---|---|
21278aea | 1 | menuconfig ARCH_VEXPRESS |
61727630 | 2 | bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7 |
38669e04 | 3 | select ARCH_REQUIRE_GPIOLIB |
98dec91f | 4 | select ARCH_SUPPORTS_BIG_ENDIAN |
61727630 | 5 | select ARM_AMBA |
fef88f10 | 6 | select ARM_GIC |
7e13c654 | 7 | select ARM_GLOBAL_TIMER |
61727630 | 8 | select ARM_TIMER_SP804 |
38669e04 | 9 | select COMMON_CLK_VERSATILE |
4c3ffffd | 10 | select HAVE_ARM_SCU if SMP |
a894fcc2 | 11 | select HAVE_ARM_TWD if SMP |
61727630 | 12 | select HAVE_PATA_PLATFORM |
61727630 | 13 | select ICST |
ce816fa8 | 14 | select NO_IOPORT_MAP |
61727630 | 15 | select PLAT_VERSATILE |
2655f51d CM |
16 | select POWER_RESET |
17 | select POWER_RESET_VEXPRESS | |
18 | select POWER_SUPPLY | |
1f1dd588 | 19 | select REGULATOR if MMC_ARMMMCI |
61727630 | 20 | select REGULATOR_FIXED_VOLTAGE if REGULATOR |
38669e04 | 21 | select VEXPRESS_CONFIG |
b33cdd28 AB |
22 | select VEXPRESS_SYSCFG |
23 | select MFD_VEXPRESS_SYSREG | |
8deed178 | 24 | help |
8deed178 PM |
25 | This option enables support for systems using Cortex processor based |
26 | ARM core and logic (FPGA) tiles on the Versatile Express motherboard, | |
27 | for example: | |
28 | ||
29 | - CoreTile Express A5x2 (V2P-CA5s) | |
30 | - CoreTile Express A9x4 (V2P-CA9) | |
31 | - CoreTile Express A15x2 (V2P-CA15) | |
32 | - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs | |
33 | (Soft Macrocell Models) | |
34 | - Versatile Express RTSMs (Models) | |
35 | ||
36 | You must boot using a Flattened Device Tree in order to use these | |
37 | platforms. The traditional (ATAGs) boot method is not usable on | |
38 | these boards with this option. | |
39 | ||
21278aea | 40 | if ARCH_VEXPRESS |
61727630 RH |
41 | |
42 | config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA | |
43 | bool "Enable A5 and A9 only errata work-arounds" | |
44 | default y | |
45 | select ARM_ERRATA_720789 | |
a641f3a6 | 46 | select PL310_ERRATA_753970 if CACHE_L2X0 |
61727630 RH |
47 | help |
48 | Provides common dependencies for Versatile Express platforms | |
49 | based on Cortex-A5 and Cortex-A9 processors. In order to | |
50 | build a working kernel, you must also enable relevant core | |
51 | tile support or Flattened Device Tree based support options. | |
52 | ||
1e904e1b NP |
53 | config ARCH_VEXPRESS_DCSCB |
54 | bool "Dual Cluster System Control Block (DCSCB) support" | |
55 | depends on MCPM | |
d41418c0 | 56 | select ARM_CCI |
1e904e1b NP |
57 | help |
58 | Support for the Dual Cluster System Configuration Block (DCSCB). | |
59 | This is needed to provide CPU and cluster power management | |
60 | on RTSM implementing big.LITTLE. | |
61 | ||
f7cd2d83 SK |
62 | config ARCH_VEXPRESS_SPC |
63 | bool "Versatile Express Serial Power Controller (SPC)" | |
f7cd2d83 SK |
64 | select PM_OPP |
65 | help | |
66 | The TC2 (A15x2 A7x3) versatile express core tile integrates a logic | |
67 | block called Serial Power Controller (SPC) that provides the interface | |
68 | between the dual cluster test-chip and the M3 microcontroller that | |
69 | carries out power management. | |
70 | ||
11b277ea NP |
71 | config ARCH_VEXPRESS_TC2_PM |
72 | bool "Versatile Express TC2 power management" | |
73 | depends on MCPM | |
74 | select ARM_CCI | |
f7cd2d83 | 75 | select ARCH_VEXPRESS_SPC |
11b277ea NP |
76 | help |
77 | Support for CPU and cluster power management on Versatile Express | |
78 | with a TC2 (A15x2 A7x3) big.LITTLE core tile. | |
79 | ||
21278aea | 80 | endif |