projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 21278aea | 1 | menuconfig ARCH_VEXPRESS |
| 61727630 | 2 | bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7 |
| 38669e04 | 3 | select ARCH_REQUIRE_GPIOLIB |
| 98dec91f | 4 | select ARCH_SUPPORTS_BIG_ENDIAN |
| 61727630 | 5 | select ARM_AMBA |
| fef88f10 | 6 | select ARM_GIC |
| 7e13c654 | 7 | select ARM_GLOBAL_TIMER |
| 61727630 | 8 | select ARM_TIMER_SP804 |
| 38669e04 | 9 | select COMMON_CLK_VERSATILE |
| 4c3ffffd | 10 | select HAVE_ARM_SCU if SMP |
| a894fcc2 | 11 | select HAVE_ARM_TWD if SMP |
| 61727630 | 12 | select HAVE_PATA_PLATFORM |
| 61727630 | 13 | select ICST |
| ce816fa8 | 14 | select NO_IOPORT_MAP |
| 61727630 | 15 | select PLAT_VERSATILE |
| 2655f51d CM |
16 | select POWER_RESET |
| 17 | select POWER_RESET_VEXPRESS | |
| 18 | select POWER_SUPPLY | |
| 61727630 | 19 | select REGULATOR_FIXED_VOLTAGE if REGULATOR |
| 38669e04 | 20 | select VEXPRESS_CONFIG |
| b33cdd28 AB |
21 | select VEXPRESS_SYSCFG |
| 22 | select MFD_VEXPRESS_SYSREG | |
| 8deed178 | 23 | help |
| 8deed178 PM |
24 | This option enables support for systems using Cortex processor based |
| 25 | ARM core and logic (FPGA) tiles on the Versatile Express motherboard, | |
| 26 | for example: | |
| 27 | ||
| 28 | - CoreTile Express A5x2 (V2P-CA5s) | |
| 29 | - CoreTile Express A9x4 (V2P-CA9) | |
| 30 | - CoreTile Express A15x2 (V2P-CA15) | |
| 31 | - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs | |
| 32 | (Soft Macrocell Models) | |
| 33 | - Versatile Express RTSMs (Models) | |
| 34 | ||
| 35 | You must boot using a Flattened Device Tree in order to use these | |
| 36 | platforms. The traditional (ATAGs) boot method is not usable on | |
| 37 | these boards with this option. | |
| 38 | ||
| 21278aea | 39 | if ARCH_VEXPRESS |
| 61727630 RH |
40 | |
| 41 | config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA | |
| 42 | bool "Enable A5 and A9 only errata work-arounds" | |
| 43 | default y | |
| 44 | select ARM_ERRATA_720789 | |
| a641f3a6 | 45 | select PL310_ERRATA_753970 if CACHE_L2X0 |
| 61727630 RH |
46 | help |
| 47 | Provides common dependencies for Versatile Express platforms | |
| 48 | based on Cortex-A5 and Cortex-A9 processors. In order to | |
| 49 | build a working kernel, you must also enable relevant core | |
| 50 | tile support or Flattened Device Tree based support options. | |
| 51 | ||
| 52 | config ARCH_VEXPRESS_CA9X4 | |
| 53 | bool "Versatile Express Cortex-A9x4 tile" | |
| fef88f10 | 54 | |
| 1e904e1b NP |
55 | config ARCH_VEXPRESS_DCSCB |
| 56 | bool "Dual Cluster System Control Block (DCSCB) support" | |
| 57 | depends on MCPM | |
| d41418c0 | 58 | select ARM_CCI |
| 1e904e1b NP |
59 | help |
| 60 | Support for the Dual Cluster System Configuration Block (DCSCB). | |
| 61 | This is needed to provide CPU and cluster power management | |
| 62 | on RTSM implementing big.LITTLE. | |
| 63 | ||
| f7cd2d83 SK |
64 | config ARCH_VEXPRESS_SPC |
| 65 | bool "Versatile Express Serial Power Controller (SPC)" | |
| f7cd2d83 SK |
66 | select ARCH_HAS_OPP |
| 67 | select PM_OPP | |
| 68 | help | |
| 69 | The TC2 (A15x2 A7x3) versatile express core tile integrates a logic | |
| 70 | block called Serial Power Controller (SPC) that provides the interface | |
| 71 | between the dual cluster test-chip and the M3 microcontroller that | |
| 72 | carries out power management. | |
| 73 | ||
| 11b277ea NP |
74 | config ARCH_VEXPRESS_TC2_PM |
| 75 | bool "Versatile Express TC2 power management" | |
| 76 | depends on MCPM | |
| 77 | select ARM_CCI | |
| f7cd2d83 | 78 | select ARCH_VEXPRESS_SPC |
| 11b277ea NP |
79 | help |
| 80 | Support for CPU and cluster power management on Versatile Express | |
| 81 | with a TC2 (A15x2 A7x3) big.LITTLE core tile. | |
| 82 | ||
| 21278aea | 83 | endif |