[deliverable/linux.git] / arch / arm / mach-vexpress / v2m.c

/*
 * Versatile Express V2M Motherboard Support
 */
#include <linux/device.h>
#include <linux/amba/bus.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
#include <linux/smsc911x.h>
#include <linux/spinlock.h>
#include <linux/sysdev.h>
#include <linux/usb/isp1760.h>
#include <linux/clkdev.h>

#include <asm/sizes.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/timer-sp.h>
#include <asm/hardware/sp810.h>

#include <mach/motherboard.h>

#include <plat/sched_clock.h>

#include "core.h"

#define V2M_PA_CS0	0x40000000
#define V2M_PA_CS1	0x44000000
#define V2M_PA_CS2	0x48000000
#define V2M_PA_CS3	0x4c000000
#define V2M_PA_CS7	0x10000000

static struct map_desc v2m_io_desc[] __initdata = {
	{
		.virtual	= __MMIO_P2V(V2M_PA_CS7),
		.pfn		= __phys_to_pfn(V2M_PA_CS7),
		.length		= SZ_128K,
		.type		= MT_DEVICE,
	},
};

void __init v2m_map_io(struct map_desc *tile, size_t num)
{
	iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
	iotable_init(tile, num);
}

void __init v2m_init_early(void)
{
	versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
}

static void __init v2m_timer_init(void)
{
	u32 scctrl;

	/* Select 1MHz TIMCLK as the reference clock for SP804 timers */
	scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
	scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
	scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
	writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL));

	writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
	writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);

	sp804_clocksource_init(MMIO_P2V(V2M_TIMER1));
	sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0);
}

struct sys_timer v2m_timer = {
	.init	= v2m_timer_init,
};


static DEFINE_SPINLOCK(v2m_cfg_lock);

int v2m_cfg_write(u32 devfn, u32 data)
{
	/* Configuration interface broken? */
	u32 val;

	printk("%s: writing %08x to %08x\n", __func__, data, devfn);

	devfn |= SYS_CFG_START | SYS_CFG_WRITE;

	spin_lock(&v2m_cfg_lock);
	val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
	writel(val & ~SYS_CFG_COMPLETE, MMIO_P2V(V2M_SYS_CFGSTAT));

	writel(data, MMIO_P2V(V2M_SYS_CFGDATA));
	writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));

	do {
		val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
	} while (val == 0);
	spin_unlock(&v2m_cfg_lock);

	return !!(val & SYS_CFG_ERR);
}

int v2m_cfg_read(u32 devfn, u32 *data)
{
	u32 val;

	devfn |= SYS_CFG_START;

	spin_lock(&v2m_cfg_lock);
	writel(0, MMIO_P2V(V2M_SYS_CFGSTAT));
	writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));

	mb();

	do {
		cpu_relax();
		val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
	} while (val == 0);

	*data = readl(MMIO_P2V(V2M_SYS_CFGDATA));
	spin_unlock(&v2m_cfg_lock);

	return !!(val & SYS_CFG_ERR);
}


static struct resource v2m_pcie_i2c_resource = {
	.start	= V2M_SERIAL_BUS_PCI,
	.end	= V2M_SERIAL_BUS_PCI + SZ_4K - 1,
	.flags	= IORESOURCE_MEM,
};

static struct platform_device v2m_pcie_i2c_device = {
	.name		= "versatile-i2c",
	.id		= 0,
	.num_resources	= 1,
	.resource	= &v2m_pcie_i2c_resource,
};

static struct resource v2m_ddc_i2c_resource = {
	.start	= V2M_SERIAL_BUS_DVI,
	.end	= V2M_SERIAL_BUS_DVI + SZ_4K - 1,
	.flags	= IORESOURCE_MEM,
};

static struct platform_device v2m_ddc_i2c_device = {
	.name		= "versatile-i2c",
	.id		= 1,
	.num_resources	= 1,
	.resource	= &v2m_ddc_i2c_resource,
};

static struct resource v2m_eth_resources[] = {
	{
		.start	= V2M_LAN9118,
		.end	= V2M_LAN9118 + SZ_64K - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_V2M_LAN9118,
		.end	= IRQ_V2M_LAN9118,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct smsc911x_platform_config v2m_eth_config = {
	.flags		= SMSC911X_USE_32BIT,
	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
	.phy_interface	= PHY_INTERFACE_MODE_MII,
};

static struct platform_device v2m_eth_device = {
	.name		= "smsc911x",
	.id		= -1,
	.resource	= v2m_eth_resources,
	.num_resources	= ARRAY_SIZE(v2m_eth_resources),
	.dev.platform_data = &v2m_eth_config,
};

static struct resource v2m_usb_resources[] = {
	{
		.start	= V2M_ISP1761,
		.end	= V2M_ISP1761 + SZ_128K - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_V2M_ISP1761,
		.end	= IRQ_V2M_ISP1761,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct isp1760_platform_data v2m_usb_config = {
	.is_isp1761		= true,
	.bus_width_16		= false,
	.port1_otg		= true,
	.analog_oc		= false,
	.dack_polarity_high	= false,
	.dreq_polarity_high	= false,
};

static struct platform_device v2m_usb_device = {
	.name		= "isp1760",
	.id		= -1,
	.resource	= v2m_usb_resources,
	.num_resources	= ARRAY_SIZE(v2m_usb_resources),
	.dev.platform_data = &v2m_usb_config,
};

static int v2m_flash_init(void)
{
	writel(0, MMIO_P2V(V2M_SYS_FLASH));
	return 0;
}

static void v2m_flash_exit(void)
{
	writel(0, MMIO_P2V(V2M_SYS_FLASH));
}

static void v2m_flash_set_vpp(int on)
{
	writel(on != 0, MMIO_P2V(V2M_SYS_FLASH));
}

static struct flash_platform_data v2m_flash_data = {
	.map_name	= "cfi_probe",
	.width		= 4,
	.init		= v2m_flash_init,
	.exit		= v2m_flash_exit,
	.set_vpp	= v2m_flash_set_vpp,
};

static struct resource v2m_flash_resources[] = {
	{
		.start	= V2M_NOR0,
		.end	= V2M_NOR0 + SZ_64M - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= V2M_NOR1,
		.end	= V2M_NOR1 + SZ_64M - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device v2m_flash_device = {
	.name		= "armflash",
	.id		= -1,
	.resource	= v2m_flash_resources,
	.num_resources	= ARRAY_SIZE(v2m_flash_resources),
	.dev.platform_data = &v2m_flash_data,
};

static struct pata_platform_info v2m_pata_data = {
	.ioport_shift	= 2,
};

static struct resource v2m_pata_resources[] = {
	{
		.start	= V2M_CF,
		.end	= V2M_CF + 0xff,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= V2M_CF + 0x100,
		.end	= V2M_CF + SZ_4K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device v2m_cf_device = {
	.name		= "pata_platform",
	.id		= -1,
	.resource	= v2m_pata_resources,
	.num_resources	= ARRAY_SIZE(v2m_pata_resources),
	.dev.platform_data = &v2m_pata_data,
};

static unsigned int v2m_mmci_status(struct device *dev)
{
	return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0);
}

static struct mmci_platform_data v2m_mmci_data = {
	.ocr_mask	= MMC_VDD_32_33|MMC_VDD_33_34,
	.status		= v2m_mmci_status,
};

static AMBA_DEVICE(aaci,  "mb:aaci",  V2M_AACI, NULL);
static AMBA_DEVICE(mmci,  "mb:mmci",  V2M_MMCI, &v2m_mmci_data);
static AMBA_DEVICE(kmi0,  "mb:kmi0",  V2M_KMI0, NULL);
static AMBA_DEVICE(kmi1,  "mb:kmi1",  V2M_KMI1, NULL);
static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
static AMBA_DEVICE(wdt,   "mb:wdt",   V2M_WDT, NULL);
static AMBA_DEVICE(rtc,   "mb:rtc",   V2M_RTC, NULL);

static struct amba_device *v2m_amba_devs[] __initdata = {
	&aaci_device,
	&mmci_device,
	&kmi0_device,
	&kmi1_device,
	&uart0_device,
	&uart1_device,
	&uart2_device,
	&uart3_device,
	&wdt_device,
	&rtc_device,
};


static long v2m_osc_round(struct clk *clk, unsigned long rate)
{
	return rate;
}

static int v2m_osc1_set(struct clk *clk, unsigned long rate)
{
	return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_MB | 1, rate);
}

static const struct clk_ops osc1_clk_ops = {
	.round	= v2m_osc_round,
	.set	= v2m_osc1_set,
};

static struct clk osc1_clk = {
	.ops	= &osc1_clk_ops,
	.rate	= 24000000,
};

static struct clk osc2_clk = {
	.rate	= 24000000,
};

static struct clk dummy_apb_pclk;

static struct clk_lookup v2m_lookups[] = {
	{	/* AMBA bus clock */
		.con_id		= "apb_pclk",
		.clk		= &dummy_apb_pclk,
	}, {	/* UART0 */
		.dev_id		= "mb:uart0",
		.clk		= &osc2_clk,
	}, {	/* UART1 */
		.dev_id		= "mb:uart1",
		.clk		= &osc2_clk,
	}, {	/* UART2 */
		.dev_id		= "mb:uart2",
		.clk		= &osc2_clk,
	}, {	/* UART3 */
		.dev_id		= "mb:uart3",
		.clk		= &osc2_clk,
	}, {	/* KMI0 */
		.dev_id		= "mb:kmi0",
		.clk		= &osc2_clk,
	}, {	/* KMI1 */
		.dev_id		= "mb:kmi1",
		.clk		= &osc2_clk,
	}, {	/* MMC0 */
		.dev_id		= "mb:mmci",
		.clk		= &osc2_clk,
	}, {	/* CLCD */
		.dev_id		= "mb:clcd",
		.clk		= &osc1_clk,
	},
};

static void v2m_power_off(void)
{
	if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE_MB, 0))
		printk(KERN_EMERG "Unable to shutdown\n");
}

static void v2m_restart(char str, const char *cmd)
{
	if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
		printk(KERN_EMERG "Unable to reboot\n");
}

static int __init v2m_init(void)
{
	int i;

	clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));

	platform_device_register(&v2m_pcie_i2c_device);
	platform_device_register(&v2m_ddc_i2c_device);
	platform_device_register(&v2m_flash_device);
	platform_device_register(&v2m_cf_device);
	platform_device_register(&v2m_eth_device);
	platform_device_register(&v2m_usb_device);

	for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
		amba_device_register(v2m_amba_devs[i], &iomem_resource);

	pm_power_off = v2m_power_off;
	arm_pm_restart = v2m_restart;

	return 0;
}
arch_initcall(v2m_init);
Commit	Line	Data
ceade897 RK	1	/*
	2	* Versatile Express V2M Motherboard Support
	3	*/
	4	#include <linux/device.h>
	5	#include <linux/amba/bus.h>
	6	#include <linux/amba/mmci.h>
	7	#include <linux/io.h>
	8	#include <linux/init.h>
	9	#include <linux/platform_device.h>
95c34f83	10	#include <linux/ata_platform.h>
ceade897 RK	11	#include <linux/smsc911x.h>
	12	#include <linux/spinlock.h>
	13	#include <linux/sysdev.h>
	14	#include <linux/usb/isp1760.h>
6d803ba7	15	#include <linux/clkdev.h>
ceade897	16
ceade897 RK	17	#include <asm/sizes.h>
	18	#include <asm/mach/flash.h>
	19	#include <asm/mach/map.h>
	20	#include <asm/mach/time.h>
	21	#include <asm/hardware/arm_timer.h>
58daf18c	22	#include <asm/hardware/timer-sp.h>
baaece22	23	#include <asm/hardware/sp810.h>
ceade897	24
ceade897 RK	25	#include <mach/motherboard.h>
ceade897 RK	26
0af85dda	27	#include <plat/sched_clock.h>
ceade897 RK	28
	29	#include "core.h"
	30
	31	#define V2M_PA_CS0 0x40000000
	32	#define V2M_PA_CS1 0x44000000
	33	#define V2M_PA_CS2 0x48000000
	34	#define V2M_PA_CS3 0x4c000000
	35	#define V2M_PA_CS7 0x10000000
	36
	37	static struct map_desc v2m_io_desc[] __initdata = {
	38	{
	39	.virtual = __MMIO_P2V(V2M_PA_CS7),
	40	.pfn = __phys_to_pfn(V2M_PA_CS7),
	41	.length = SZ_128K,
	42	.type = MT_DEVICE,
	43	},
	44	};
	45
	46	void __init v2m_map_io(struct map_desc *tile, size_t num)
	47	{
	48	iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
	49	iotable_init(tile, num);
	50	}
	51
493a451b RK	52	void __init v2m_init_early(void)
	53	{
	54	versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
	55	}
ceade897	56
cdaf9a2f	57	static void __init v2m_timer_init(void)
ceade897	58	{
baaece22 PM	59	u32 scctrl;
baaece22 PM	60
baaece22 PM	61	/* Select 1MHz TIMCLK as the reference clock for SP804 timers */
	62	scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
	63	scctrl \|= SCCTRL_TIMEREN0SEL_TIMCLK;
	64	scctrl \|= SCCTRL_TIMEREN1SEL_TIMCLK;
	65	writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL));
	66
ceade897 RK	67	writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
	68	writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
	69
	70	sp804_clocksource_init(MMIO_P2V(V2M_TIMER1));
	71	sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0);
	72	}
	73
	74	struct sys_timer v2m_timer = {
	75	.init = v2m_timer_init,
	76	};
	77
	78
	79	static DEFINE_SPINLOCK(v2m_cfg_lock);
	80
	81	int v2m_cfg_write(u32 devfn, u32 data)
	82	{
	83	/* Configuration interface broken? */
	84	u32 val;
	85
	86	printk("%s: writing %08x to %08x\n", __func__, data, devfn);
	87
	88	devfn \|= SYS_CFG_START \| SYS_CFG_WRITE;
	89
	90	spin_lock(&v2m_cfg_lock);
	91	val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
	92	writel(val & ~SYS_CFG_COMPLETE, MMIO_P2V(V2M_SYS_CFGSTAT));
	93
	94	writel(data, MMIO_P2V(V2M_SYS_CFGDATA));
	95	writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
	96
	97	do {
	98	val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
	99	} while (val == 0);
	100	spin_unlock(&v2m_cfg_lock);
	101
	102	return !!(val & SYS_CFG_ERR);
	103	}
	104
	105	int v2m_cfg_read(u32 devfn, u32 *data)
	106	{
	107	u32 val;
	108
	109	devfn \|= SYS_CFG_START;
	110
	111	spin_lock(&v2m_cfg_lock);
	112	writel(0, MMIO_P2V(V2M_SYS_CFGSTAT));
	113	writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
	114
	115	mb();
	116
	117	do {
	118	cpu_relax();
	119	val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
	120	} while (val == 0);
	121
	122	*data = readl(MMIO_P2V(V2M_SYS_CFGDATA));
	123	spin_unlock(&v2m_cfg_lock);
	124
	125	return !!(val & SYS_CFG_ERR);
	126	}
	127
	128
	129	static struct resource v2m_pcie_i2c_resource = {
	130	.start = V2M_SERIAL_BUS_PCI,
131	.end = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
132	.flags = IORESOURCE_MEM,
133	};
134
135	static struct platform_device v2m_pcie_i2c_device = {
136	.name = "versatile-i2c",
137	.id = 0,
138	.num_resources = 1,
139	.resource = &v2m_pcie_i2c_resource,
140	};
141
142	static struct resource v2m_ddc_i2c_resource = {
143	.start = V2M_SERIAL_BUS_DVI,
144	.end = V2M_SERIAL_BUS_DVI + SZ_4K - 1,
145	.flags = IORESOURCE_MEM,
146	};
147
148	static struct platform_device v2m_ddc_i2c_device = {
149	.name = "versatile-i2c",
150	.id = 1,
151	.num_resources = 1,
152	.resource = &v2m_ddc_i2c_resource,
153	};
154
155	static struct resource v2m_eth_resources[] = {
156	{
157	.start = V2M_LAN9118,
158	.end = V2M_LAN9118 + SZ_64K - 1,
159	.flags = IORESOURCE_MEM,
160	}, {
161	.start = IRQ_V2M_LAN9118,
162	.end = IRQ_V2M_LAN9118,
163	.flags = IORESOURCE_IRQ,
164	},
165	};
166
167	static struct smsc911x_platform_config v2m_eth_config = {
168	.flags = SMSC911X_USE_32BIT,
169	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
170	.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
171	.phy_interface = PHY_INTERFACE_MODE_MII,
172	};
173
174	static struct platform_device v2m_eth_device = {
175	.name = "smsc911x",
176	.id = -1,
177	.resource = v2m_eth_resources,
178	.num_resources = ARRAY_SIZE(v2m_eth_resources),
179	.dev.platform_data = &v2m_eth_config,
180	};
181
182	static struct resource v2m_usb_resources[] = {
183	{
184	.start = V2M_ISP1761,
185	.end = V2M_ISP1761 + SZ_128K - 1,
186	.flags = IORESOURCE_MEM,
187	}, {
188	.start = IRQ_V2M_ISP1761,
189	.end = IRQ_V2M_ISP1761,
190	.flags = IORESOURCE_IRQ,
191	},
192	};
193
194	static struct isp1760_platform_data v2m_usb_config = {
195	.is_isp1761 = true,
196	.bus_width_16 = false,
197	.port1_otg = true,
198	.analog_oc = false,
199	.dack_polarity_high = false,
200	.dreq_polarity_high = false,
201	};
202
203	static struct platform_device v2m_usb_device = {
204	.name = "isp1760",
205	.id = -1,
206	.resource = v2m_usb_resources,
207	.num_resources = ARRAY_SIZE(v2m_usb_resources),
208	.dev.platform_data = &v2m_usb_config,
209	};
210
211	static int v2m_flash_init(void)
212	{
213	writel(0, MMIO_P2V(V2M_SYS_FLASH));
214	return 0;
215	}
216
217	static void v2m_flash_exit(void)
218	{
219	writel(0, MMIO_P2V(V2M_SYS_FLASH));
220	}
221
222	static void v2m_flash_set_vpp(int on)
223	{
224	writel(on != 0, MMIO_P2V(V2M_SYS_FLASH));
225	}
226
227	static struct flash_platform_data v2m_flash_data = {
228	.map_name = "cfi_probe",
229	.width = 4,
230	.init = v2m_flash_init,
231	.exit = v2m_flash_exit,
232	.set_vpp = v2m_flash_set_vpp,
233	};
234
235	static struct resource v2m_flash_resources[] = {
236	{
237	.start = V2M_NOR0,
238	.end = V2M_NOR0 + SZ_64M - 1,
239	.flags = IORESOURCE_MEM,
240	}, {
241	.start = V2M_NOR1,
242	.end = V2M_NOR1 + SZ_64M - 1,
243	.flags = IORESOURCE_MEM,
244	},
245	};
246
247	static struct platform_device v2m_flash_device = {
248	.name = "armflash",
249	.id = -1,
250	.resource = v2m_flash_resources,
251	.num_resources = ARRAY_SIZE(v2m_flash_resources),
252	.dev.platform_data = &v2m_flash_data,
253	};
254
95c34f83 NB	255	static struct pata_platform_info v2m_pata_data = {
	256	.ioport_shift = 2,
	257	};
	258
	259	static struct resource v2m_pata_resources[] = {
	260	{
	261	.start = V2M_CF,
	262	.end = V2M_CF + 0xff,
	263	.flags = IORESOURCE_MEM,
	264	}, {
	265	.start = V2M_CF + 0x100,
	266	.end = V2M_CF + SZ_4K - 1,
	267	.flags = IORESOURCE_MEM,
	268	},
	269	};
	270
	271	static struct platform_device v2m_cf_device = {
	272	.name = "pata_platform",
	273	.id = -1,
	274	.resource = v2m_pata_resources,
	275	.num_resources = ARRAY_SIZE(v2m_pata_resources),
	276	.dev.platform_data = &v2m_pata_data,
	277	};
ceade897 RK	278
	279	static unsigned int v2m_mmci_status(struct device *dev)
	280	{
74bc8093	281	return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0);
ceade897 RK	282	}
	283
	284	static struct mmci_platform_data v2m_mmci_data = {
	285	.ocr_mask = MMC_VDD_32_33\|MMC_VDD_33_34,
	286	.status = v2m_mmci_status,
	287	};
	288
	289	static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL);
	290	static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data);
	291	static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL);
	292	static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL);
	293	static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
	294	static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
	295	static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
	296	static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
	297	static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL);
	298	static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL);
	299
	300	static struct amba_device *v2m_amba_devs[] __initdata = {
	301	&aaci_device,
	302	&mmci_device,
	303	&kmi0_device,
	304	&kmi1_device,
	305	&uart0_device,
	306	&uart1_device,
	307	&uart2_device,
	308	&uart3_device,
	309	&wdt_device,
	310	&rtc_device,
	311	};
	312
	313
	314	static long v2m_osc_round(struct clk *clk, unsigned long rate)
	315	{
	316	return rate;
	317	}
	318
	319	static int v2m_osc1_set(struct clk *clk, unsigned long rate)
	320	{
	321	return v2m_cfg_write(SYS_CFG_OSC \| SYS_CFG_SITE_MB \| 1, rate);
	322	}
	323
	324	static const struct clk_ops osc1_clk_ops = {
	325	.round = v2m_osc_round,
	326	.set = v2m_osc1_set,
	327	};
	328
	329	static struct clk osc1_clk = {
	330	.ops = &osc1_clk_ops,
	331	.rate = 24000000,
	332	};
	333
	334	static struct clk osc2_clk = {
	335	.rate = 24000000,
	336	};
	337
3126c7bc RK	338	static struct clk dummy_apb_pclk;
3126c7bc RK	339
ceade897	340	static struct clk_lookup v2m_lookups[] = {
3126c7bc RK	341	{ /* AMBA bus clock */
	342	.con_id = "apb_pclk",
	343	.clk = &dummy_apb_pclk,
	344	}, { /* UART0 */
ceade897 RK	345	.dev_id = "mb:uart0",
	346	.clk = &osc2_clk,
	347	}, { /* UART1 */
	348	.dev_id = "mb:uart1",
	349	.clk = &osc2_clk,
	350	}, { /* UART2 */
	351	.dev_id = "mb:uart2",
	352	.clk = &osc2_clk,
	353	}, { /* UART3 */
	354	.dev_id = "mb:uart3",
	355	.clk = &osc2_clk,
	356	}, { /* KMI0 */
	357	.dev_id = "mb:kmi0",
	358	.clk = &osc2_clk,
	359	}, { /* KMI1 */
	360	.dev_id = "mb:kmi1",
	361	.clk = &osc2_clk,
	362	}, { /* MMC0 */
	363	.dev_id = "mb:mmci",
	364	.clk = &osc2_clk,
	365	}, { /* CLCD */
	366	.dev_id = "mb:clcd",
	367	.clk = &osc1_clk,
	368	},
	369	};
	370
	371	static void v2m_power_off(void)
	372	{
	373	if (v2m_cfg_write(SYS_CFG_SHUTDOWN \| SYS_CFG_SITE_MB, 0))
	374	printk(KERN_EMERG "Unable to shutdown\n");
	375	}
	376
	377	static void v2m_restart(char str, const char *cmd)
	378	{
	379	if (v2m_cfg_write(SYS_CFG_REBOOT \| SYS_CFG_SITE_MB, 0))
	380	printk(KERN_EMERG "Unable to reboot\n");
	381	}
	382
	383	static int __init v2m_init(void)
	384	{
	385	int i;
	386
	387	clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
	388
	389	platform_device_register(&v2m_pcie_i2c_device);
	390	platform_device_register(&v2m_ddc_i2c_device);
	391	platform_device_register(&v2m_flash_device);
95c34f83	392	platform_device_register(&v2m_cf_device);
ceade897 RK	393	platform_device_register(&v2m_eth_device);
	394	platform_device_register(&v2m_usb_device);
	395
	396	for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
	397	amba_device_register(v2m_amba_devs[i], &iomem_resource);
	398
	399	pm_power_off = v2m_power_off;
	400	arm_pm_restart = v2m_restart;
	401
	402	return 0;
	403	}
	404	arch_initcall(v2m_init);