[deliverable/linux.git] / arch / arm / mach-vexpress / v2m.c

/*
 * Versatile Express V2M Motherboard Support
 */
#include <linux/device.h>
#include <linux/amba/bus.h>
#include <linux/amba/mmci.h>
#include <linux/io.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
#include <linux/smsc911x.h>
#include <linux/spinlock.h>
#include <linux/sysdev.h>
#include <linux/usb/isp1760.h>
#include <linux/clkdev.h>
#include <linux/mtd/physmap.h>

#include <asm/mach-types.h>
#include <asm/sizes.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/timer-sp.h>
#include <asm/hardware/sp810.h>

#include <mach/ct-ca9x4.h>
#include <mach/motherboard.h>

#include <plat/sched_clock.h>

#include "core.h"

#define V2M_PA_CS0	0x40000000
#define V2M_PA_CS1	0x44000000
#define V2M_PA_CS2	0x48000000
#define V2M_PA_CS3	0x4c000000
#define V2M_PA_CS7	0x10000000

static struct map_desc v2m_io_desc[] __initdata = {
	{
		.virtual	= __MMIO_P2V(V2M_PA_CS7),
		.pfn		= __phys_to_pfn(V2M_PA_CS7),
		.length		= SZ_128K,
		.type		= MT_DEVICE,
	},
};

static void __init v2m_timer_init(void)
{
	u32 scctrl;

	/* Select 1MHz TIMCLK as the reference clock for SP804 timers */
	scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
	scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
	scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
	writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL));

	writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
	writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);

	sp804_clocksource_init(MMIO_P2V(V2M_TIMER1), "v2m-timer1");
	sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0,
		"v2m-timer0");
}

static struct sys_timer v2m_timer = {
	.init	= v2m_timer_init,
};


static DEFINE_SPINLOCK(v2m_cfg_lock);

int v2m_cfg_write(u32 devfn, u32 data)
{
	/* Configuration interface broken? */
	u32 val;

	printk("%s: writing %08x to %08x\n", __func__, data, devfn);

	devfn |= SYS_CFG_START | SYS_CFG_WRITE;

	spin_lock(&v2m_cfg_lock);
	val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
	writel(val & ~SYS_CFG_COMPLETE, MMIO_P2V(V2M_SYS_CFGSTAT));

	writel(data, MMIO_P2V(V2M_SYS_CFGDATA));
	writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));

	do {
		val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
	} while (val == 0);
	spin_unlock(&v2m_cfg_lock);

	return !!(val & SYS_CFG_ERR);
}

int v2m_cfg_read(u32 devfn, u32 *data)
{
	u32 val;

	devfn |= SYS_CFG_START;

	spin_lock(&v2m_cfg_lock);
	writel(0, MMIO_P2V(V2M_SYS_CFGSTAT));
	writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));

	mb();

	do {
		cpu_relax();
		val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
	} while (val == 0);

	*data = readl(MMIO_P2V(V2M_SYS_CFGDATA));
	spin_unlock(&v2m_cfg_lock);

	return !!(val & SYS_CFG_ERR);
}


static struct resource v2m_pcie_i2c_resource = {
	.start	= V2M_SERIAL_BUS_PCI,
	.end	= V2M_SERIAL_BUS_PCI + SZ_4K - 1,
	.flags	= IORESOURCE_MEM,
};

static struct platform_device v2m_pcie_i2c_device = {
	.name		= "versatile-i2c",
	.id		= 0,
	.num_resources	= 1,
	.resource	= &v2m_pcie_i2c_resource,
};

static struct resource v2m_ddc_i2c_resource = {
	.start	= V2M_SERIAL_BUS_DVI,
	.end	= V2M_SERIAL_BUS_DVI + SZ_4K - 1,
	.flags	= IORESOURCE_MEM,
};

static struct platform_device v2m_ddc_i2c_device = {
	.name		= "versatile-i2c",
	.id		= 1,
	.num_resources	= 1,
	.resource	= &v2m_ddc_i2c_resource,
};

static struct resource v2m_eth_resources[] = {
	{
		.start	= V2M_LAN9118,
		.end	= V2M_LAN9118 + SZ_64K - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_V2M_LAN9118,
		.end	= IRQ_V2M_LAN9118,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct smsc911x_platform_config v2m_eth_config = {
	.flags		= SMSC911X_USE_32BIT,
	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
	.phy_interface	= PHY_INTERFACE_MODE_MII,
};

static struct platform_device v2m_eth_device = {
	.name		= "smsc911x",
	.id		= -1,
	.resource	= v2m_eth_resources,
	.num_resources	= ARRAY_SIZE(v2m_eth_resources),
	.dev.platform_data = &v2m_eth_config,
};

static struct resource v2m_usb_resources[] = {
	{
		.start	= V2M_ISP1761,
		.end	= V2M_ISP1761 + SZ_128K - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_V2M_ISP1761,
		.end	= IRQ_V2M_ISP1761,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct isp1760_platform_data v2m_usb_config = {
	.is_isp1761		= true,
	.bus_width_16		= false,
	.port1_otg		= true,
	.analog_oc		= false,
	.dack_polarity_high	= false,
	.dreq_polarity_high	= false,
};

static struct platform_device v2m_usb_device = {
	.name		= "isp1760",
	.id		= -1,
	.resource	= v2m_usb_resources,
	.num_resources	= ARRAY_SIZE(v2m_usb_resources),
	.dev.platform_data = &v2m_usb_config,
};

static void v2m_flash_set_vpp(struct platform_device *pdev, int on)
{
	writel(on != 0, MMIO_P2V(V2M_SYS_FLASH));
}

static struct physmap_flash_data v2m_flash_data = {
	.width		= 4,
	.set_vpp	= v2m_flash_set_vpp,
};

static struct resource v2m_flash_resources[] = {
	{
		.start	= V2M_NOR0,
		.end	= V2M_NOR0 + SZ_64M - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= V2M_NOR1,
		.end	= V2M_NOR1 + SZ_64M - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device v2m_flash_device = {
	.name		= "physmap-flash",
	.id		= -1,
	.resource	= v2m_flash_resources,
	.num_resources	= ARRAY_SIZE(v2m_flash_resources),
	.dev.platform_data = &v2m_flash_data,
};

static struct pata_platform_info v2m_pata_data = {
	.ioport_shift	= 2,
};

static struct resource v2m_pata_resources[] = {
	{
		.start	= V2M_CF,
		.end	= V2M_CF + 0xff,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= V2M_CF + 0x100,
		.end	= V2M_CF + SZ_4K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device v2m_cf_device = {
	.name		= "pata_platform",
	.id		= -1,
	.resource	= v2m_pata_resources,
	.num_resources	= ARRAY_SIZE(v2m_pata_resources),
	.dev.platform_data = &v2m_pata_data,
};

static unsigned int v2m_mmci_status(struct device *dev)
{
	return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0);
}

static struct mmci_platform_data v2m_mmci_data = {
	.ocr_mask	= MMC_VDD_32_33|MMC_VDD_33_34,
	.status		= v2m_mmci_status,
};

static AMBA_DEVICE(aaci,  "mb:aaci",  V2M_AACI, NULL);
static AMBA_DEVICE(mmci,  "mb:mmci",  V2M_MMCI, &v2m_mmci_data);
static AMBA_DEVICE(kmi0,  "mb:kmi0",  V2M_KMI0, NULL);
static AMBA_DEVICE(kmi1,  "mb:kmi1",  V2M_KMI1, NULL);
static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
static AMBA_DEVICE(wdt,   "mb:wdt",   V2M_WDT, NULL);
static AMBA_DEVICE(rtc,   "mb:rtc",   V2M_RTC, NULL);

static struct amba_device *v2m_amba_devs[] __initdata = {
	&aaci_device,
	&mmci_device,
	&kmi0_device,
	&kmi1_device,
	&uart0_device,
	&uart1_device,
	&uart2_device,
	&uart3_device,
	&wdt_device,
	&rtc_device,
};


static long v2m_osc_round(struct clk *clk, unsigned long rate)
{
	return rate;
}

static int v2m_osc1_set(struct clk *clk, unsigned long rate)
{
	return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_MB | 1, rate);
}

static const struct clk_ops osc1_clk_ops = {
	.round	= v2m_osc_round,
	.set	= v2m_osc1_set,
};

static struct clk osc1_clk = {
	.ops	= &osc1_clk_ops,
	.rate	= 24000000,
};

static struct clk osc2_clk = {
	.rate	= 24000000,
};

static struct clk v2m_sp804_clk = {
	.rate	= 1000000,
};

static struct clk dummy_apb_pclk;

static struct clk_lookup v2m_lookups[] = {
	{	/* AMBA bus clock */
		.con_id		= "apb_pclk",
		.clk		= &dummy_apb_pclk,
	}, {	/* UART0 */
		.dev_id		= "mb:uart0",
		.clk		= &osc2_clk,
	}, {	/* UART1 */
		.dev_id		= "mb:uart1",
		.clk		= &osc2_clk,
	}, {	/* UART2 */
		.dev_id		= "mb:uart2",
		.clk		= &osc2_clk,
	}, {	/* UART3 */
		.dev_id		= "mb:uart3",
		.clk		= &osc2_clk,
	}, {	/* KMI0 */
		.dev_id		= "mb:kmi0",
		.clk		= &osc2_clk,
	}, {	/* KMI1 */
		.dev_id		= "mb:kmi1",
		.clk		= &osc2_clk,
	}, {	/* MMC0 */
		.dev_id		= "mb:mmci",
		.clk		= &osc2_clk,
	}, {	/* CLCD */
		.dev_id		= "mb:clcd",
		.clk		= &osc1_clk,
	}, {	/* SP804 timers */
		.dev_id		= "sp804",
		.con_id		= "v2m-timer0",
		.clk		= &v2m_sp804_clk,
	}, {	/* SP804 timers */
		.dev_id		= "sp804",
		.con_id		= "v2m-timer1",
		.clk		= &v2m_sp804_clk,
	},
};

static void __init v2m_init_early(void)
{
	ct_desc->init_early();
	clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
	versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
}

static void v2m_power_off(void)
{
	if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE_MB, 0))
		printk(KERN_EMERG "Unable to shutdown\n");
}

static void v2m_restart(char str, const char *cmd)
{
	if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
		printk(KERN_EMERG "Unable to reboot\n");
}

struct ct_desc *ct_desc;

static struct ct_desc *ct_descs[] __initdata = {
#ifdef CONFIG_ARCH_VEXPRESS_CA9X4
	&ct_ca9x4_desc,
#endif
};

static void __init v2m_populate_ct_desc(void)
{
	int i;
	u32 current_tile_id;

	ct_desc = NULL;
	current_tile_id = readl(MMIO_P2V(V2M_SYS_PROCID0)) & V2M_CT_ID_MASK;

	for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
		if (ct_descs[i]->id == current_tile_id)
			ct_desc = ct_descs[i];

	if (!ct_desc)
		panic("vexpress: failed to populate core tile description "
		      "for tile ID 0x%8x\n", current_tile_id);
}

static void __init v2m_map_io(void)
{
	iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
	v2m_populate_ct_desc();
	ct_desc->map_io();
}

static void __init v2m_init_irq(void)
{
	ct_desc->init_irq();
}

static void __init v2m_init(void)
{
	int i;

	platform_device_register(&v2m_pcie_i2c_device);
	platform_device_register(&v2m_ddc_i2c_device);
	platform_device_register(&v2m_flash_device);
	platform_device_register(&v2m_cf_device);
	platform_device_register(&v2m_eth_device);
	platform_device_register(&v2m_usb_device);

	for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
		amba_device_register(v2m_amba_devs[i], &iomem_resource);

	pm_power_off = v2m_power_off;
	arm_pm_restart = v2m_restart;

	ct_desc->init_tile();
}

MACHINE_START(VEXPRESS, "ARM-Versatile Express")
	.boot_params	= PLAT_PHYS_OFFSET + 0x00000100,
	.map_io		= v2m_map_io,
	.init_early	= v2m_init_early,
	.init_irq	= v2m_init_irq,
	.timer		= &v2m_timer,
	.init_machine	= v2m_init,
MACHINE_END
Commit	Line	Data
ceade897 RK	1	/*
	2	* Versatile Express V2M Motherboard Support
	3	*/
	4	#include <linux/device.h>
	5	#include <linux/amba/bus.h>
	6	#include <linux/amba/mmci.h>
	7	#include <linux/io.h>
	8	#include <linux/init.h>
	9	#include <linux/platform_device.h>
95c34f83	10	#include <linux/ata_platform.h>
ceade897 RK	11	#include <linux/smsc911x.h>
	12	#include <linux/spinlock.h>
	13	#include <linux/sysdev.h>
	14	#include <linux/usb/isp1760.h>
6d803ba7	15	#include <linux/clkdev.h>
0f71fd49	16	#include <linux/mtd/physmap.h>
ceade897	17
80b5efbd	18	#include <asm/mach-types.h>
ceade897	19	#include <asm/sizes.h>
80b5efbd	20	#include <asm/mach/arch.h>
ceade897 RK	21	#include <asm/mach/map.h>
	22	#include <asm/mach/time.h>
	23	#include <asm/hardware/arm_timer.h>
58daf18c	24	#include <asm/hardware/timer-sp.h>
baaece22	25	#include <asm/hardware/sp810.h>
ceade897	26
80b5efbd	27	#include <mach/ct-ca9x4.h>
ceade897 RK	28	#include <mach/motherboard.h>
ceade897 RK	29
0af85dda	30	#include <plat/sched_clock.h>
ceade897 RK	31
	32	#include "core.h"
	33
	34	#define V2M_PA_CS0 0x40000000
	35	#define V2M_PA_CS1 0x44000000
	36	#define V2M_PA_CS2 0x48000000
	37	#define V2M_PA_CS3 0x4c000000
	38	#define V2M_PA_CS7 0x10000000
	39
	40	static struct map_desc v2m_io_desc[] __initdata = {
	41	{
	42	.virtual = __MMIO_P2V(V2M_PA_CS7),
	43	.pfn = __phys_to_pfn(V2M_PA_CS7),
	44	.length = SZ_128K,
	45	.type = MT_DEVICE,
	46	},
	47	};
	48
cdaf9a2f	49	static void __init v2m_timer_init(void)
ceade897	50	{
baaece22 PM	51	u32 scctrl;
baaece22 PM	52
baaece22 PM	53	/* Select 1MHz TIMCLK as the reference clock for SP804 timers */
	54	scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
	55	scctrl \|= SCCTRL_TIMEREN0SEL_TIMCLK;
	56	scctrl \|= SCCTRL_TIMEREN1SEL_TIMCLK;
	57	writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL));
	58
ceade897 RK	59	writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
	60	writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
	61
fb593cf3	62	sp804_clocksource_init(MMIO_P2V(V2M_TIMER1), "v2m-timer1");
57cc4f7d RK	63	sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0,
57cc4f7d RK	64	"v2m-timer0");
ceade897 RK	65	}
ceade897 RK	66
80b5efbd	67	static struct sys_timer v2m_timer = {
ceade897 RK	68	.init = v2m_timer_init,
	69	};
	70
	71
	72	static DEFINE_SPINLOCK(v2m_cfg_lock);
	73
	74	int v2m_cfg_write(u32 devfn, u32 data)
	75	{
	76	/* Configuration interface broken? */
	77	u32 val;
	78
	79	printk("%s: writing %08x to %08x\n", __func__, data, devfn);
	80
	81	devfn \|= SYS_CFG_START \| SYS_CFG_WRITE;
	82
	83	spin_lock(&v2m_cfg_lock);
	84	val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
	85	writel(val & ~SYS_CFG_COMPLETE, MMIO_P2V(V2M_SYS_CFGSTAT));
	86
	87	writel(data, MMIO_P2V(V2M_SYS_CFGDATA));
	88	writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
	89
	90	do {
	91	val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
	92	} while (val == 0);
	93	spin_unlock(&v2m_cfg_lock);
	94
	95	return !!(val & SYS_CFG_ERR);
	96	}
	97
	98	int v2m_cfg_read(u32 devfn, u32 *data)
	99	{
	100	u32 val;
	101
	102	devfn \|= SYS_CFG_START;
	103
	104	spin_lock(&v2m_cfg_lock);
	105	writel(0, MMIO_P2V(V2M_SYS_CFGSTAT));
	106	writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
	107
	108	mb();
	109
	110	do {
	111	cpu_relax();
	112	val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
	113	} while (val == 0);
	114
	115	*data = readl(MMIO_P2V(V2M_SYS_CFGDATA));
	116	spin_unlock(&v2m_cfg_lock);
	117
	118	return !!(val & SYS_CFG_ERR);
	119	}
	120
	121
	122	static struct resource v2m_pcie_i2c_resource = {
	123	.start = V2M_SERIAL_BUS_PCI,
	124	.end = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
	125	.flags = IORESOURCE_MEM,
	126	};
	127
	128	static struct platform_device v2m_pcie_i2c_device = {
	129	.name = "versatile-i2c",
	130	.id = 0,
	131	.num_resources = 1,
132	.resource = &v2m_pcie_i2c_resource,
133	};
134
135	static struct resource v2m_ddc_i2c_resource = {
136	.start = V2M_SERIAL_BUS_DVI,
137	.end = V2M_SERIAL_BUS_DVI + SZ_4K - 1,
138	.flags = IORESOURCE_MEM,
139	};
140
141	static struct platform_device v2m_ddc_i2c_device = {
142	.name = "versatile-i2c",
143	.id = 1,
144	.num_resources = 1,
145	.resource = &v2m_ddc_i2c_resource,
146	};
147
148	static struct resource v2m_eth_resources[] = {
149	{
150	.start = V2M_LAN9118,
151	.end = V2M_LAN9118 + SZ_64K - 1,
152	.flags = IORESOURCE_MEM,
153	}, {
154	.start = IRQ_V2M_LAN9118,
155	.end = IRQ_V2M_LAN9118,
156	.flags = IORESOURCE_IRQ,
157	},
158	};
159
160	static struct smsc911x_platform_config v2m_eth_config = {
161	.flags = SMSC911X_USE_32BIT,
162	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
163	.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
164	.phy_interface = PHY_INTERFACE_MODE_MII,
165	};
166
167	static struct platform_device v2m_eth_device = {
168	.name = "smsc911x",
169	.id = -1,
170	.resource = v2m_eth_resources,
171	.num_resources = ARRAY_SIZE(v2m_eth_resources),
172	.dev.platform_data = &v2m_eth_config,
173	};
174
175	static struct resource v2m_usb_resources[] = {
176	{
177	.start = V2M_ISP1761,
178	.end = V2M_ISP1761 + SZ_128K - 1,
179	.flags = IORESOURCE_MEM,
180	}, {
181	.start = IRQ_V2M_ISP1761,
182	.end = IRQ_V2M_ISP1761,
183	.flags = IORESOURCE_IRQ,
184	},
185	};
186
187	static struct isp1760_platform_data v2m_usb_config = {
188	.is_isp1761 = true,
189	.bus_width_16 = false,
190	.port1_otg = true,
191	.analog_oc = false,
192	.dack_polarity_high = false,
193	.dreq_polarity_high = false,
194	};
195
196	static struct platform_device v2m_usb_device = {
197	.name = "isp1760",
198	.id = -1,
199	.resource = v2m_usb_resources,
200	.num_resources = ARRAY_SIZE(v2m_usb_resources),
201	.dev.platform_data = &v2m_usb_config,
202	};
203
667f390b	204	static void v2m_flash_set_vpp(struct platform_device *pdev, int on)
ceade897 RK	205	{
	206	writel(on != 0, MMIO_P2V(V2M_SYS_FLASH));
	207	}
	208
0f71fd49	209	static struct physmap_flash_data v2m_flash_data = {
ceade897	210	.width = 4,
ceade897 RK	211	.set_vpp = v2m_flash_set_vpp,
	212	};
	213
	214	static struct resource v2m_flash_resources[] = {
	215	{
	216	.start = V2M_NOR0,
	217	.end = V2M_NOR0 + SZ_64M - 1,
	218	.flags = IORESOURCE_MEM,
	219	}, {
	220	.start = V2M_NOR1,
	221	.end = V2M_NOR1 + SZ_64M - 1,
	222	.flags = IORESOURCE_MEM,
	223	},
	224	};
	225
	226	static struct platform_device v2m_flash_device = {
0f71fd49	227	.name = "physmap-flash",
ceade897 RK	228	.id = -1,
	229	.resource = v2m_flash_resources,
	230	.num_resources = ARRAY_SIZE(v2m_flash_resources),
	231	.dev.platform_data = &v2m_flash_data,
	232	};
	233
95c34f83 NB	234	static struct pata_platform_info v2m_pata_data = {
	235	.ioport_shift = 2,
	236	};
	237
	238	static struct resource v2m_pata_resources[] = {
	239	{
	240	.start = V2M_CF,
	241	.end = V2M_CF + 0xff,
	242	.flags = IORESOURCE_MEM,
	243	}, {
	244	.start = V2M_CF + 0x100,
	245	.end = V2M_CF + SZ_4K - 1,
	246	.flags = IORESOURCE_MEM,
	247	},
	248	};
	249
	250	static struct platform_device v2m_cf_device = {
	251	.name = "pata_platform",
	252	.id = -1,
	253	.resource = v2m_pata_resources,
	254	.num_resources = ARRAY_SIZE(v2m_pata_resources),
	255	.dev.platform_data = &v2m_pata_data,
	256	};
ceade897 RK	257
	258	static unsigned int v2m_mmci_status(struct device *dev)
	259	{
74bc8093	260	return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0);
ceade897 RK	261	}
	262
	263	static struct mmci_platform_data v2m_mmci_data = {
	264	.ocr_mask = MMC_VDD_32_33\|MMC_VDD_33_34,
	265	.status = v2m_mmci_status,
	266	};
	267
	268	static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL);
	269	static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data);
	270	static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL);
	271	static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL);
	272	static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
	273	static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
	274	static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
	275	static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
	276	static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL);
	277	static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL);
	278
	279	static struct amba_device *v2m_amba_devs[] __initdata = {
	280	&aaci_device,
	281	&mmci_device,
	282	&kmi0_device,
	283	&kmi1_device,
	284	&uart0_device,
	285	&uart1_device,
	286	&uart2_device,
	287	&uart3_device,
	288	&wdt_device,
	289	&rtc_device,
	290	};
	291
	292
	293	static long v2m_osc_round(struct clk *clk, unsigned long rate)
	294	{
	295	return rate;
	296	}
	297
	298	static int v2m_osc1_set(struct clk *clk, unsigned long rate)
	299	{
	300	return v2m_cfg_write(SYS_CFG_OSC \| SYS_CFG_SITE_MB \| 1, rate);
	301	}
	302
	303	static const struct clk_ops osc1_clk_ops = {
	304	.round = v2m_osc_round,
	305	.set = v2m_osc1_set,
	306	};
	307
	308	static struct clk osc1_clk = {
	309	.ops = &osc1_clk_ops,
	310	.rate = 24000000,
	311	};
	312
	313	static struct clk osc2_clk = {
	314	.rate = 24000000,
	315	};
	316
7ff550de RK	317	static struct clk v2m_sp804_clk = {
	318	.rate = 1000000,
	319	};
	320
3126c7bc RK	321	static struct clk dummy_apb_pclk;
3126c7bc RK	322
ceade897	323	static struct clk_lookup v2m_lookups[] = {
3126c7bc RK	324	{ /* AMBA bus clock */
	325	.con_id = "apb_pclk",
	326	.clk = &dummy_apb_pclk,
	327	}, { /* UART0 */
ceade897 RK	328	.dev_id = "mb:uart0",
	329	.clk = &osc2_clk,
	330	}, { /* UART1 */
	331	.dev_id = "mb:uart1",
	332	.clk = &osc2_clk,
	333	}, { /* UART2 */
	334	.dev_id = "mb:uart2",
	335	.clk = &osc2_clk,
	336	}, { /* UART3 */
	337	.dev_id = "mb:uart3",
	338	.clk = &osc2_clk,
	339	}, { /* KMI0 */
	340	.dev_id = "mb:kmi0",
	341	.clk = &osc2_clk,
	342	}, { /* KMI1 */
	343	.dev_id = "mb:kmi1",
	344	.clk = &osc2_clk,
	345	}, { /* MMC0 */
	346	.dev_id = "mb:mmci",
	347	.clk = &osc2_clk,
	348	}, { /* CLCD */
	349	.dev_id = "mb:clcd",
	350	.clk = &osc1_clk,
23828a7a RK	351	}, { /* SP804 timers */
	352	.dev_id = "sp804",
	353	.con_id = "v2m-timer0",
	354	.clk = &v2m_sp804_clk,
7ff550de RK	355	}, { /* SP804 timers */
	356	.dev_id = "sp804",
	357	.con_id = "v2m-timer1",
	358	.clk = &v2m_sp804_clk,
ceade897 RK	359	},
	360	};
	361
2fdf9993 RH	362	static void __init v2m_init_early(void)
	363	{
	364	ct_desc->init_early();
	365	clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
	366	versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
	367	}
	368
ceade897 RK	369	static void v2m_power_off(void)
	370	{
	371	if (v2m_cfg_write(SYS_CFG_SHUTDOWN \| SYS_CFG_SITE_MB, 0))
	372	printk(KERN_EMERG "Unable to shutdown\n");
	373	}
	374
	375	static void v2m_restart(char str, const char *cmd)
	376	{
	377	if (v2m_cfg_write(SYS_CFG_REBOOT \| SYS_CFG_SITE_MB, 0))
	378	printk(KERN_EMERG "Unable to reboot\n");
	379	}
	380
80b5efbd WD	381	struct ct_desc *ct_desc;
	382
	383	static struct ct_desc *ct_descs[] __initdata = {
	384	#ifdef CONFIG_ARCH_VEXPRESS_CA9X4
	385	&ct_ca9x4_desc,
	386	#endif
	387	};
	388
	389	static void __init v2m_populate_ct_desc(void)
	390	{
	391	int i;
	392	u32 current_tile_id;
	393
	394	ct_desc = NULL;
	395	current_tile_id = readl(MMIO_P2V(V2M_SYS_PROCID0)) & V2M_CT_ID_MASK;
	396
	397	for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
	398	if (ct_descs[i]->id == current_tile_id)
	399	ct_desc = ct_descs[i];
	400
	401	if (!ct_desc)
	402	panic("vexpress: failed to populate core tile description "
	403	"for tile ID 0x%8x\n", current_tile_id);
	404	}
	405
	406	static void __init v2m_map_io(void)
	407	{
	408	iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
	409	v2m_populate_ct_desc();
	410	ct_desc->map_io();
	411	}
	412
	413	static void __init v2m_init_irq(void)
	414	{
	415	ct_desc->init_irq();
	416	}
	417
	418	static void __init v2m_init(void)
ceade897 RK	419	{
	420	int i;
	421
ceade897 RK	422	platform_device_register(&v2m_pcie_i2c_device);
	423	platform_device_register(&v2m_ddc_i2c_device);
	424	platform_device_register(&v2m_flash_device);
95c34f83	425	platform_device_register(&v2m_cf_device);
ceade897 RK	426	platform_device_register(&v2m_eth_device);
	427	platform_device_register(&v2m_usb_device);
	428
	429	for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
	430	amba_device_register(v2m_amba_devs[i], &iomem_resource);
	431
	432	pm_power_off = v2m_power_off;
	433	arm_pm_restart = v2m_restart;
	434
80b5efbd	435	ct_desc->init_tile();
ceade897	436	}
80b5efbd WD	437
	438	MACHINE_START(VEXPRESS, "ARM-Versatile Express")
	439	.boot_params = PLAT_PHYS_OFFSET + 0x00000100,
	440	.map_io = v2m_map_io,
	441	.init_early = v2m_init_early,
	442	.init_irq = v2m_init_irq,
	443	.timer = &v2m_timer,
	444	.init_machine = v2m_init,
	445	MACHINE_END