Commit | Line | Data |
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ceade897 RK |
1 | /* |
2 | * Versatile Express V2M Motherboard Support | |
3 | */ | |
4 | #include <linux/device.h> | |
5 | #include <linux/amba/bus.h> | |
6 | #include <linux/amba/mmci.h> | |
7 | #include <linux/io.h> | |
8 | #include <linux/init.h> | |
8deed178 PM |
9 | #include <linux/of_address.h> |
10 | #include <linux/of_fdt.h> | |
11 | #include <linux/of_irq.h> | |
12 | #include <linux/of_platform.h> | |
ceade897 | 13 | #include <linux/platform_device.h> |
95c34f83 | 14 | #include <linux/ata_platform.h> |
ceade897 RK |
15 | #include <linux/smsc911x.h> |
16 | #include <linux/spinlock.h> | |
ceade897 | 17 | #include <linux/usb/isp1760.h> |
6d803ba7 | 18 | #include <linux/clkdev.h> |
0f71fd49 | 19 | #include <linux/mtd/physmap.h> |
ceade897 | 20 | |
120f3d6c | 21 | #include <asm/arch_timer.h> |
80b5efbd | 22 | #include <asm/mach-types.h> |
ceade897 | 23 | #include <asm/sizes.h> |
120f3d6c | 24 | #include <asm/smp_twd.h> |
80b5efbd | 25 | #include <asm/mach/arch.h> |
ceade897 RK |
26 | #include <asm/mach/map.h> |
27 | #include <asm/mach/time.h> | |
28 | #include <asm/hardware/arm_timer.h> | |
8deed178 PM |
29 | #include <asm/hardware/cache-l2x0.h> |
30 | #include <asm/hardware/gic.h> | |
58daf18c | 31 | #include <asm/hardware/timer-sp.h> |
baaece22 | 32 | #include <asm/hardware/sp810.h> |
ceade897 | 33 | |
80b5efbd | 34 | #include <mach/ct-ca9x4.h> |
ceade897 RK |
35 | #include <mach/motherboard.h> |
36 | ||
0af85dda | 37 | #include <plat/sched_clock.h> |
ceade897 RK |
38 | |
39 | #include "core.h" | |
40 | ||
41 | #define V2M_PA_CS0 0x40000000 | |
42 | #define V2M_PA_CS1 0x44000000 | |
43 | #define V2M_PA_CS2 0x48000000 | |
44 | #define V2M_PA_CS3 0x4c000000 | |
45 | #define V2M_PA_CS7 0x10000000 | |
46 | ||
47 | static struct map_desc v2m_io_desc[] __initdata = { | |
48 | { | |
98ed4ceb | 49 | .virtual = V2M_PERIPH, |
ceade897 RK |
50 | .pfn = __phys_to_pfn(V2M_PA_CS7), |
51 | .length = SZ_128K, | |
52 | .type = MT_DEVICE, | |
53 | }, | |
54 | }; | |
55 | ||
98ed4ceb PM |
56 | static void __iomem *v2m_sysreg_base; |
57 | ||
58 | static void __init v2m_sysctl_init(void __iomem *base) | |
ceade897 | 59 | { |
baaece22 PM |
60 | u32 scctrl; |
61 | ||
98ed4ceb PM |
62 | if (WARN_ON(!base)) |
63 | return; | |
64 | ||
baaece22 | 65 | /* Select 1MHz TIMCLK as the reference clock for SP804 timers */ |
98ed4ceb | 66 | scctrl = readl(base + SCCTRL); |
baaece22 PM |
67 | scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK; |
68 | scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK; | |
98ed4ceb PM |
69 | writel(scctrl, base + SCCTRL); |
70 | } | |
baaece22 | 71 | |
98ed4ceb PM |
72 | static void __init v2m_sp804_init(void __iomem *base, unsigned int irq) |
73 | { | |
74 | if (WARN_ON(!base || irq == NO_IRQ)) | |
75 | return; | |
76 | ||
77 | writel(0, base + TIMER_1_BASE + TIMER_CTRL); | |
78 | writel(0, base + TIMER_2_BASE + TIMER_CTRL); | |
baaece22 | 79 | |
98ed4ceb PM |
80 | sp804_clocksource_init(base + TIMER_2_BASE, "v2m-timer1"); |
81 | sp804_clockevents_init(base + TIMER_1_BASE, irq, "v2m-timer0"); | |
82 | } | |
ceade897 | 83 | |
98ed4ceb PM |
84 | static void __init v2m_timer_init(void) |
85 | { | |
86 | v2m_sysctl_init(ioremap(V2M_SYSCTL, SZ_4K)); | |
87 | v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0); | |
ceade897 RK |
88 | } |
89 | ||
80b5efbd | 90 | static struct sys_timer v2m_timer = { |
ceade897 RK |
91 | .init = v2m_timer_init, |
92 | }; | |
93 | ||
94 | ||
95 | static DEFINE_SPINLOCK(v2m_cfg_lock); | |
96 | ||
97 | int v2m_cfg_write(u32 devfn, u32 data) | |
98 | { | |
99 | /* Configuration interface broken? */ | |
100 | u32 val; | |
101 | ||
102 | printk("%s: writing %08x to %08x\n", __func__, data, devfn); | |
103 | ||
104 | devfn |= SYS_CFG_START | SYS_CFG_WRITE; | |
105 | ||
106 | spin_lock(&v2m_cfg_lock); | |
98ed4ceb PM |
107 | val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT); |
108 | writel(val & ~SYS_CFG_COMPLETE, v2m_sysreg_base + V2M_SYS_CFGSTAT); | |
ceade897 | 109 | |
98ed4ceb PM |
110 | writel(data, v2m_sysreg_base + V2M_SYS_CFGDATA); |
111 | writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL); | |
ceade897 RK |
112 | |
113 | do { | |
98ed4ceb | 114 | val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT); |
ceade897 RK |
115 | } while (val == 0); |
116 | spin_unlock(&v2m_cfg_lock); | |
117 | ||
118 | return !!(val & SYS_CFG_ERR); | |
119 | } | |
120 | ||
121 | int v2m_cfg_read(u32 devfn, u32 *data) | |
122 | { | |
123 | u32 val; | |
124 | ||
125 | devfn |= SYS_CFG_START; | |
126 | ||
127 | spin_lock(&v2m_cfg_lock); | |
98ed4ceb PM |
128 | writel(0, v2m_sysreg_base + V2M_SYS_CFGSTAT); |
129 | writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL); | |
ceade897 RK |
130 | |
131 | mb(); | |
132 | ||
133 | do { | |
134 | cpu_relax(); | |
98ed4ceb | 135 | val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT); |
ceade897 RK |
136 | } while (val == 0); |
137 | ||
98ed4ceb | 138 | *data = readl(v2m_sysreg_base + V2M_SYS_CFGDATA); |
ceade897 RK |
139 | spin_unlock(&v2m_cfg_lock); |
140 | ||
141 | return !!(val & SYS_CFG_ERR); | |
142 | } | |
143 | ||
98ed4ceb PM |
144 | void __init v2m_flags_set(u32 data) |
145 | { | |
146 | writel(~0, v2m_sysreg_base + V2M_SYS_FLAGSCLR); | |
147 | writel(data, v2m_sysreg_base + V2M_SYS_FLAGSSET); | |
148 | } | |
149 | ||
d927daf5 PM |
150 | int v2m_get_master_site(void) |
151 | { | |
152 | u32 misc = readl(v2m_sysreg_base + V2M_SYS_MISC); | |
153 | ||
154 | return misc & SYS_MISC_MASTERSITE ? SYS_CFG_SITE_DB2 : SYS_CFG_SITE_DB1; | |
155 | } | |
156 | ||
ceade897 RK |
157 | |
158 | static struct resource v2m_pcie_i2c_resource = { | |
159 | .start = V2M_SERIAL_BUS_PCI, | |
160 | .end = V2M_SERIAL_BUS_PCI + SZ_4K - 1, | |
161 | .flags = IORESOURCE_MEM, | |
162 | }; | |
163 | ||
164 | static struct platform_device v2m_pcie_i2c_device = { | |
165 | .name = "versatile-i2c", | |
166 | .id = 0, | |
167 | .num_resources = 1, | |
168 | .resource = &v2m_pcie_i2c_resource, | |
169 | }; | |
170 | ||
171 | static struct resource v2m_ddc_i2c_resource = { | |
172 | .start = V2M_SERIAL_BUS_DVI, | |
173 | .end = V2M_SERIAL_BUS_DVI + SZ_4K - 1, | |
174 | .flags = IORESOURCE_MEM, | |
175 | }; | |
176 | ||
177 | static struct platform_device v2m_ddc_i2c_device = { | |
178 | .name = "versatile-i2c", | |
179 | .id = 1, | |
180 | .num_resources = 1, | |
181 | .resource = &v2m_ddc_i2c_resource, | |
182 | }; | |
183 | ||
184 | static struct resource v2m_eth_resources[] = { | |
185 | { | |
186 | .start = V2M_LAN9118, | |
187 | .end = V2M_LAN9118 + SZ_64K - 1, | |
188 | .flags = IORESOURCE_MEM, | |
189 | }, { | |
190 | .start = IRQ_V2M_LAN9118, | |
191 | .end = IRQ_V2M_LAN9118, | |
192 | .flags = IORESOURCE_IRQ, | |
193 | }, | |
194 | }; | |
195 | ||
196 | static struct smsc911x_platform_config v2m_eth_config = { | |
197 | .flags = SMSC911X_USE_32BIT, | |
198 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, | |
199 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
200 | .phy_interface = PHY_INTERFACE_MODE_MII, | |
201 | }; | |
202 | ||
203 | static struct platform_device v2m_eth_device = { | |
204 | .name = "smsc911x", | |
205 | .id = -1, | |
206 | .resource = v2m_eth_resources, | |
207 | .num_resources = ARRAY_SIZE(v2m_eth_resources), | |
208 | .dev.platform_data = &v2m_eth_config, | |
209 | }; | |
210 | ||
211 | static struct resource v2m_usb_resources[] = { | |
212 | { | |
213 | .start = V2M_ISP1761, | |
214 | .end = V2M_ISP1761 + SZ_128K - 1, | |
215 | .flags = IORESOURCE_MEM, | |
216 | }, { | |
217 | .start = IRQ_V2M_ISP1761, | |
218 | .end = IRQ_V2M_ISP1761, | |
219 | .flags = IORESOURCE_IRQ, | |
220 | }, | |
221 | }; | |
222 | ||
223 | static struct isp1760_platform_data v2m_usb_config = { | |
224 | .is_isp1761 = true, | |
225 | .bus_width_16 = false, | |
226 | .port1_otg = true, | |
227 | .analog_oc = false, | |
228 | .dack_polarity_high = false, | |
229 | .dreq_polarity_high = false, | |
230 | }; | |
231 | ||
232 | static struct platform_device v2m_usb_device = { | |
233 | .name = "isp1760", | |
234 | .id = -1, | |
235 | .resource = v2m_usb_resources, | |
236 | .num_resources = ARRAY_SIZE(v2m_usb_resources), | |
237 | .dev.platform_data = &v2m_usb_config, | |
238 | }; | |
239 | ||
667f390b | 240 | static void v2m_flash_set_vpp(struct platform_device *pdev, int on) |
ceade897 | 241 | { |
98ed4ceb | 242 | writel(on != 0, v2m_sysreg_base + V2M_SYS_FLASH); |
ceade897 RK |
243 | } |
244 | ||
0f71fd49 | 245 | static struct physmap_flash_data v2m_flash_data = { |
ceade897 | 246 | .width = 4, |
ceade897 RK |
247 | .set_vpp = v2m_flash_set_vpp, |
248 | }; | |
249 | ||
250 | static struct resource v2m_flash_resources[] = { | |
251 | { | |
252 | .start = V2M_NOR0, | |
253 | .end = V2M_NOR0 + SZ_64M - 1, | |
254 | .flags = IORESOURCE_MEM, | |
255 | }, { | |
256 | .start = V2M_NOR1, | |
257 | .end = V2M_NOR1 + SZ_64M - 1, | |
258 | .flags = IORESOURCE_MEM, | |
259 | }, | |
260 | }; | |
261 | ||
262 | static struct platform_device v2m_flash_device = { | |
0f71fd49 | 263 | .name = "physmap-flash", |
ceade897 RK |
264 | .id = -1, |
265 | .resource = v2m_flash_resources, | |
266 | .num_resources = ARRAY_SIZE(v2m_flash_resources), | |
267 | .dev.platform_data = &v2m_flash_data, | |
268 | }; | |
269 | ||
95c34f83 NB |
270 | static struct pata_platform_info v2m_pata_data = { |
271 | .ioport_shift = 2, | |
272 | }; | |
273 | ||
274 | static struct resource v2m_pata_resources[] = { | |
275 | { | |
276 | .start = V2M_CF, | |
277 | .end = V2M_CF + 0xff, | |
278 | .flags = IORESOURCE_MEM, | |
279 | }, { | |
280 | .start = V2M_CF + 0x100, | |
281 | .end = V2M_CF + SZ_4K - 1, | |
282 | .flags = IORESOURCE_MEM, | |
283 | }, | |
284 | }; | |
285 | ||
286 | static struct platform_device v2m_cf_device = { | |
287 | .name = "pata_platform", | |
288 | .id = -1, | |
289 | .resource = v2m_pata_resources, | |
290 | .num_resources = ARRAY_SIZE(v2m_pata_resources), | |
291 | .dev.platform_data = &v2m_pata_data, | |
292 | }; | |
ceade897 RK |
293 | |
294 | static unsigned int v2m_mmci_status(struct device *dev) | |
295 | { | |
98ed4ceb | 296 | return readl(v2m_sysreg_base + V2M_SYS_MCI) & (1 << 0); |
ceade897 RK |
297 | } |
298 | ||
299 | static struct mmci_platform_data v2m_mmci_data = { | |
300 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | |
301 | .status = v2m_mmci_status, | |
302 | }; | |
303 | ||
cdd4e1a7 RK |
304 | static AMBA_APB_DEVICE(aaci, "mb:aaci", 0, V2M_AACI, IRQ_V2M_AACI, NULL); |
305 | static AMBA_APB_DEVICE(mmci, "mb:mmci", 0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data); | |
306 | static AMBA_APB_DEVICE(kmi0, "mb:kmi0", 0, V2M_KMI0, IRQ_V2M_KMI0, NULL); | |
307 | static AMBA_APB_DEVICE(kmi1, "mb:kmi1", 0, V2M_KMI1, IRQ_V2M_KMI1, NULL); | |
308 | static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL); | |
309 | static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL); | |
310 | static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL); | |
311 | static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL); | |
312 | static AMBA_APB_DEVICE(wdt, "mb:wdt", 0, V2M_WDT, IRQ_V2M_WDT, NULL); | |
313 | static AMBA_APB_DEVICE(rtc, "mb:rtc", 0, V2M_RTC, IRQ_V2M_RTC, NULL); | |
ceade897 RK |
314 | |
315 | static struct amba_device *v2m_amba_devs[] __initdata = { | |
316 | &aaci_device, | |
317 | &mmci_device, | |
318 | &kmi0_device, | |
319 | &kmi1_device, | |
320 | &uart0_device, | |
321 | &uart1_device, | |
322 | &uart2_device, | |
323 | &uart3_device, | |
324 | &wdt_device, | |
325 | &rtc_device, | |
326 | }; | |
327 | ||
328 | ||
329 | static long v2m_osc_round(struct clk *clk, unsigned long rate) | |
330 | { | |
331 | return rate; | |
332 | } | |
333 | ||
334 | static int v2m_osc1_set(struct clk *clk, unsigned long rate) | |
335 | { | |
d927daf5 PM |
336 | return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE(SYS_CFG_SITE_MB) | 1, |
337 | rate); | |
ceade897 RK |
338 | } |
339 | ||
340 | static const struct clk_ops osc1_clk_ops = { | |
341 | .round = v2m_osc_round, | |
342 | .set = v2m_osc1_set, | |
343 | }; | |
344 | ||
345 | static struct clk osc1_clk = { | |
346 | .ops = &osc1_clk_ops, | |
347 | .rate = 24000000, | |
348 | }; | |
349 | ||
350 | static struct clk osc2_clk = { | |
351 | .rate = 24000000, | |
352 | }; | |
353 | ||
7ff550de RK |
354 | static struct clk v2m_sp804_clk = { |
355 | .rate = 1000000, | |
356 | }; | |
357 | ||
0ebb962e NB |
358 | static struct clk v2m_ref_clk = { |
359 | .rate = 32768, | |
360 | }; | |
361 | ||
3126c7bc RK |
362 | static struct clk dummy_apb_pclk; |
363 | ||
ceade897 | 364 | static struct clk_lookup v2m_lookups[] = { |
3126c7bc RK |
365 | { /* AMBA bus clock */ |
366 | .con_id = "apb_pclk", | |
367 | .clk = &dummy_apb_pclk, | |
368 | }, { /* UART0 */ | |
ceade897 RK |
369 | .dev_id = "mb:uart0", |
370 | .clk = &osc2_clk, | |
371 | }, { /* UART1 */ | |
372 | .dev_id = "mb:uart1", | |
373 | .clk = &osc2_clk, | |
374 | }, { /* UART2 */ | |
375 | .dev_id = "mb:uart2", | |
376 | .clk = &osc2_clk, | |
377 | }, { /* UART3 */ | |
378 | .dev_id = "mb:uart3", | |
379 | .clk = &osc2_clk, | |
380 | }, { /* KMI0 */ | |
381 | .dev_id = "mb:kmi0", | |
382 | .clk = &osc2_clk, | |
383 | }, { /* KMI1 */ | |
384 | .dev_id = "mb:kmi1", | |
385 | .clk = &osc2_clk, | |
386 | }, { /* MMC0 */ | |
387 | .dev_id = "mb:mmci", | |
388 | .clk = &osc2_clk, | |
389 | }, { /* CLCD */ | |
390 | .dev_id = "mb:clcd", | |
391 | .clk = &osc1_clk, | |
0ebb962e NB |
392 | }, { /* SP805 WDT */ |
393 | .dev_id = "mb:wdt", | |
394 | .clk = &v2m_ref_clk, | |
23828a7a RK |
395 | }, { /* SP804 timers */ |
396 | .dev_id = "sp804", | |
397 | .con_id = "v2m-timer0", | |
398 | .clk = &v2m_sp804_clk, | |
7ff550de RK |
399 | }, { /* SP804 timers */ |
400 | .dev_id = "sp804", | |
401 | .con_id = "v2m-timer1", | |
402 | .clk = &v2m_sp804_clk, | |
ceade897 RK |
403 | }, |
404 | }; | |
405 | ||
2fdf9993 RH |
406 | static void __init v2m_init_early(void) |
407 | { | |
408 | ct_desc->init_early(); | |
409 | clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups)); | |
98ed4ceb | 410 | versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000); |
2fdf9993 RH |
411 | } |
412 | ||
ceade897 RK |
413 | static void v2m_power_off(void) |
414 | { | |
d927daf5 | 415 | if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE(SYS_CFG_SITE_MB), 0)) |
ceade897 RK |
416 | printk(KERN_EMERG "Unable to shutdown\n"); |
417 | } | |
418 | ||
419 | static void v2m_restart(char str, const char *cmd) | |
420 | { | |
d927daf5 | 421 | if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE(SYS_CFG_SITE_MB), 0)) |
ceade897 RK |
422 | printk(KERN_EMERG "Unable to reboot\n"); |
423 | } | |
424 | ||
80b5efbd WD |
425 | struct ct_desc *ct_desc; |
426 | ||
427 | static struct ct_desc *ct_descs[] __initdata = { | |
428 | #ifdef CONFIG_ARCH_VEXPRESS_CA9X4 | |
429 | &ct_ca9x4_desc, | |
430 | #endif | |
431 | }; | |
432 | ||
433 | static void __init v2m_populate_ct_desc(void) | |
434 | { | |
435 | int i; | |
436 | u32 current_tile_id; | |
437 | ||
438 | ct_desc = NULL; | |
98ed4ceb PM |
439 | current_tile_id = readl(v2m_sysreg_base + V2M_SYS_PROCID0) |
440 | & V2M_CT_ID_MASK; | |
80b5efbd WD |
441 | |
442 | for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i) | |
443 | if (ct_descs[i]->id == current_tile_id) | |
444 | ct_desc = ct_descs[i]; | |
445 | ||
446 | if (!ct_desc) | |
8deed178 PM |
447 | panic("vexpress: this kernel does not support core tile ID 0x%08x when booting via ATAGs.\n" |
448 | "You may need a device tree blob or a different kernel to boot on this board.\n", | |
449 | current_tile_id); | |
80b5efbd WD |
450 | } |
451 | ||
452 | static void __init v2m_map_io(void) | |
453 | { | |
454 | iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc)); | |
98ed4ceb | 455 | v2m_sysreg_base = ioremap(V2M_SYSREGS, SZ_4K); |
80b5efbd WD |
456 | v2m_populate_ct_desc(); |
457 | ct_desc->map_io(); | |
458 | } | |
459 | ||
460 | static void __init v2m_init_irq(void) | |
461 | { | |
462 | ct_desc->init_irq(); | |
463 | } | |
464 | ||
465 | static void __init v2m_init(void) | |
ceade897 RK |
466 | { |
467 | int i; | |
468 | ||
ceade897 RK |
469 | platform_device_register(&v2m_pcie_i2c_device); |
470 | platform_device_register(&v2m_ddc_i2c_device); | |
471 | platform_device_register(&v2m_flash_device); | |
95c34f83 | 472 | platform_device_register(&v2m_cf_device); |
ceade897 RK |
473 | platform_device_register(&v2m_eth_device); |
474 | platform_device_register(&v2m_usb_device); | |
475 | ||
476 | for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++) | |
477 | amba_device_register(v2m_amba_devs[i], &iomem_resource); | |
478 | ||
479 | pm_power_off = v2m_power_off; | |
ceade897 | 480 | |
80b5efbd | 481 | ct_desc->init_tile(); |
ceade897 | 482 | } |
80b5efbd WD |
483 | |
484 | MACHINE_START(VEXPRESS, "ARM-Versatile Express") | |
e9ce8e5b | 485 | .atag_offset = 0x100, |
80b5efbd WD |
486 | .map_io = v2m_map_io, |
487 | .init_early = v2m_init_early, | |
488 | .init_irq = v2m_init_irq, | |
489 | .timer = &v2m_timer, | |
abd3ca51 | 490 | .handle_irq = gic_handle_irq, |
80b5efbd | 491 | .init_machine = v2m_init, |
f5733a1e | 492 | .restart = v2m_restart, |
80b5efbd | 493 | MACHINE_END |
8deed178 PM |
494 | |
495 | #if defined(CONFIG_ARCH_VEXPRESS_DT) | |
496 | ||
6a371956 PM |
497 | static struct map_desc v2m_rs1_io_desc __initdata = { |
498 | .virtual = V2M_PERIPH, | |
499 | .pfn = __phys_to_pfn(0x1c000000), | |
500 | .length = SZ_2M, | |
501 | .type = MT_DEVICE, | |
502 | }; | |
503 | ||
504 | static int __init v2m_dt_scan_memory_map(unsigned long node, const char *uname, | |
505 | int depth, void *data) | |
506 | { | |
507 | const char **map = data; | |
508 | ||
509 | if (strcmp(uname, "motherboard") != 0) | |
510 | return 0; | |
511 | ||
512 | *map = of_get_flat_dt_prop(node, "arm,v2m-memory-map", NULL); | |
513 | ||
514 | return 1; | |
515 | } | |
516 | ||
8deed178 PM |
517 | void __init v2m_dt_map_io(void) |
518 | { | |
6a371956 PM |
519 | const char *map = NULL; |
520 | ||
521 | of_scan_flat_dt(v2m_dt_scan_memory_map, &map); | |
522 | ||
523 | if (map && strcmp(map, "rs1") == 0) | |
524 | iotable_init(&v2m_rs1_io_desc, 1); | |
525 | else | |
526 | iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc)); | |
8deed178 PM |
527 | |
528 | #if defined(CONFIG_SMP) | |
529 | vexpress_dt_smp_map_io(); | |
530 | #endif | |
531 | } | |
532 | ||
533 | static struct clk_lookup v2m_dt_lookups[] = { | |
534 | { /* AMBA bus clock */ | |
535 | .con_id = "apb_pclk", | |
536 | .clk = &dummy_apb_pclk, | |
537 | }, { /* SP804 timers */ | |
538 | .dev_id = "sp804", | |
539 | .con_id = "v2m-timer0", | |
540 | .clk = &v2m_sp804_clk, | |
541 | }, { /* SP804 timers */ | |
542 | .dev_id = "sp804", | |
543 | .con_id = "v2m-timer1", | |
544 | .clk = &v2m_sp804_clk, | |
545 | }, { /* PL180 MMCI */ | |
546 | .dev_id = "mb:mmci", /* 10005000.mmci */ | |
547 | .clk = &osc2_clk, | |
548 | }, { /* PL050 KMI0 */ | |
549 | .dev_id = "10006000.kmi", | |
550 | .clk = &osc2_clk, | |
551 | }, { /* PL050 KMI1 */ | |
552 | .dev_id = "10007000.kmi", | |
553 | .clk = &osc2_clk, | |
554 | }, { /* PL011 UART0 */ | |
555 | .dev_id = "10009000.uart", | |
556 | .clk = &osc2_clk, | |
557 | }, { /* PL011 UART1 */ | |
558 | .dev_id = "1000a000.uart", | |
559 | .clk = &osc2_clk, | |
560 | }, { /* PL011 UART2 */ | |
561 | .dev_id = "1000b000.uart", | |
562 | .clk = &osc2_clk, | |
563 | }, { /* PL011 UART3 */ | |
564 | .dev_id = "1000c000.uart", | |
565 | .clk = &osc2_clk, | |
566 | }, { /* SP805 WDT */ | |
567 | .dev_id = "1000f000.wdt", | |
568 | .clk = &v2m_ref_clk, | |
569 | }, { /* PL111 CLCD */ | |
570 | .dev_id = "1001f000.clcd", | |
571 | .clk = &osc1_clk, | |
572 | }, | |
6a371956 PM |
573 | /* RS1 memory map */ |
574 | { /* PL180 MMCI */ | |
575 | .dev_id = "mb:mmci", /* 1c050000.mmci */ | |
576 | .clk = &osc2_clk, | |
577 | }, { /* PL050 KMI0 */ | |
578 | .dev_id = "1c060000.kmi", | |
579 | .clk = &osc2_clk, | |
580 | }, { /* PL050 KMI1 */ | |
581 | .dev_id = "1c070000.kmi", | |
582 | .clk = &osc2_clk, | |
583 | }, { /* PL011 UART0 */ | |
584 | .dev_id = "1c090000.uart", | |
585 | .clk = &osc2_clk, | |
586 | }, { /* PL011 UART1 */ | |
587 | .dev_id = "1c0a0000.uart", | |
588 | .clk = &osc2_clk, | |
589 | }, { /* PL011 UART2 */ | |
590 | .dev_id = "1c0b0000.uart", | |
591 | .clk = &osc2_clk, | |
592 | }, { /* PL011 UART3 */ | |
593 | .dev_id = "1c0c0000.uart", | |
594 | .clk = &osc2_clk, | |
595 | }, { /* SP805 WDT */ | |
596 | .dev_id = "1c0f0000.wdt", | |
597 | .clk = &v2m_ref_clk, | |
598 | }, { /* PL111 CLCD */ | |
599 | .dev_id = "1c1f0000.clcd", | |
600 | .clk = &osc1_clk, | |
601 | }, | |
8deed178 PM |
602 | }; |
603 | ||
604 | void __init v2m_dt_init_early(void) | |
605 | { | |
606 | struct device_node *node; | |
607 | u32 dt_hbi; | |
608 | ||
609 | node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg"); | |
610 | v2m_sysreg_base = of_iomap(node, 0); | |
611 | if (WARN_ON(!v2m_sysreg_base)) | |
612 | return; | |
613 | ||
614 | /* Confirm board type against DT property, if available */ | |
615 | if (of_property_read_u32(allnodes, "arm,hbi", &dt_hbi) == 0) { | |
d927daf5 PM |
616 | int site = v2m_get_master_site(); |
617 | u32 id = readl(v2m_sysreg_base + (site == SYS_CFG_SITE_DB2 ? | |
8deed178 PM |
618 | V2M_SYS_PROCID1 : V2M_SYS_PROCID0)); |
619 | u32 hbi = id & SYS_PROCIDx_HBI_MASK; | |
620 | ||
621 | if (WARN_ON(dt_hbi != hbi)) | |
622 | pr_warning("vexpress: DT HBI (%x) is not matching " | |
623 | "hardware (%x)!\n", dt_hbi, hbi); | |
624 | } | |
625 | ||
626 | clkdev_add_table(v2m_dt_lookups, ARRAY_SIZE(v2m_dt_lookups)); | |
8deed178 PM |
627 | } |
628 | ||
629 | static struct of_device_id vexpress_irq_match[] __initdata = { | |
630 | { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, | |
631 | {} | |
632 | }; | |
633 | ||
634 | static void __init v2m_dt_init_irq(void) | |
635 | { | |
636 | of_irq_init(vexpress_irq_match); | |
637 | } | |
638 | ||
639 | static void __init v2m_dt_timer_init(void) | |
640 | { | |
641 | struct device_node *node; | |
642 | const char *path; | |
643 | int err; | |
644 | ||
645 | node = of_find_compatible_node(NULL, NULL, "arm,sp810"); | |
646 | v2m_sysctl_init(of_iomap(node, 0)); | |
647 | ||
648 | err = of_property_read_string(of_aliases, "arm,v2m_timer", &path); | |
649 | if (WARN_ON(err)) | |
650 | return; | |
651 | node = of_find_node_by_path(path); | |
652 | v2m_sp804_init(of_iomap(node, 0), irq_of_parse_and_map(node, 0)); | |
120f3d6c MZ |
653 | if (arch_timer_of_register() != 0) |
654 | twd_local_timer_of_register(); | |
655 | ||
656 | if (arch_timer_sched_clock_init() != 0) | |
657 | versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000); | |
8deed178 PM |
658 | } |
659 | ||
660 | static struct sys_timer v2m_dt_timer = { | |
661 | .init = v2m_dt_timer_init, | |
662 | }; | |
663 | ||
664 | static struct of_dev_auxdata v2m_dt_auxdata_lookup[] __initdata = { | |
665 | OF_DEV_AUXDATA("arm,vexpress-flash", V2M_NOR0, "physmap-flash", | |
666 | &v2m_flash_data), | |
667 | OF_DEV_AUXDATA("arm,primecell", V2M_MMCI, "mb:mmci", &v2m_mmci_data), | |
6a371956 PM |
668 | /* RS1 memory map */ |
669 | OF_DEV_AUXDATA("arm,vexpress-flash", 0x08000000, "physmap-flash", | |
670 | &v2m_flash_data), | |
671 | OF_DEV_AUXDATA("arm,primecell", 0x1c050000, "mb:mmci", &v2m_mmci_data), | |
8deed178 PM |
672 | {} |
673 | }; | |
674 | ||
675 | static void __init v2m_dt_init(void) | |
676 | { | |
677 | l2x0_of_init(0x00400000, 0xfe0fffff); | |
678 | of_platform_populate(NULL, of_default_bus_match_table, | |
679 | v2m_dt_auxdata_lookup, NULL); | |
680 | pm_power_off = v2m_power_off; | |
681 | } | |
682 | ||
683 | const static char *v2m_dt_match[] __initconst = { | |
684 | "arm,vexpress", | |
685 | NULL, | |
686 | }; | |
687 | ||
688 | DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express") | |
689 | .dt_compat = v2m_dt_match, | |
690 | .map_io = v2m_dt_map_io, | |
691 | .init_early = v2m_dt_init_early, | |
692 | .init_irq = v2m_dt_init_irq, | |
693 | .timer = &v2m_dt_timer, | |
694 | .init_machine = v2m_dt_init, | |
695 | .handle_irq = gic_handle_irq, | |
696 | .restart = v2m_restart, | |
697 | MACHINE_END | |
698 | ||
699 | #endif |