[deliverable/linux.git] / arch / arm / mach-vt8500 / vt8500.c

/*
 *  arch/arm/mach-vt8500/vt8500.c
 *
 *  Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/clocksource.h>
#include <linux/io.h>
#include <linux/pm.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>

#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>

#include "common.h"

#define LEGACY_GPIO_BASE	0xD8110000
#define LEGACY_PMC_BASE		0xD8130000

/* Registers in GPIO Controller */
#define VT8500_GPIO_MUX_REG	0x200

/* Registers in Power Management Controller */
#define VT8500_HCR_REG		0x12
#define VT8500_PMSR_REG		0x60

static void __iomem *pmc_base;

void vt8500_restart(char mode, const char *cmd)
{
	if (pmc_base)
		writel(1, pmc_base + VT8500_PMSR_REG);
}

static struct map_desc vt8500_io_desc[] __initdata = {
	/* SoC MMIO registers */
	[0] = {
		.virtual	= 0xf8000000,
		.pfn		= __phys_to_pfn(0xd8000000),
		.length		= 0x00390000, /* max of all chip variants */
		.type		= MT_DEVICE
	},
};

void __init vt8500_map_io(void)
{
	iotable_init(vt8500_io_desc, ARRAY_SIZE(vt8500_io_desc));
}

static void vt8500_power_off(void)
{
	local_irq_disable();
	writew(5, pmc_base + VT8500_HCR_REG);
	asm("mcr%? p15, 0, %0, c7, c0, 4" : : "r" (0));
}

void __init vt8500_init(void)
{
	struct device_node *np;
#if defined(CONFIG_FB_VT8500) || defined(CONFIG_FB_WM8505)
	struct device_node *fb;
	void __iomem *gpio_base;
#endif

#ifdef CONFIG_FB_VT8500
	fb = of_find_compatible_node(NULL, NULL, "via,vt8500-fb");
	if (fb) {
		np = of_find_compatible_node(NULL, NULL, "via,vt8500-gpio");
		if (np) {
			gpio_base = of_iomap(np, 0);

			if (!gpio_base)
				pr_err("%s: of_iomap(gpio_mux) failed\n",
								__func__);

			of_node_put(np);
		} else {
			gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
			if (!gpio_base)
				pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
								__func__);
		}
		if (gpio_base) {
			writel(readl(gpio_base + VT8500_GPIO_MUX_REG) | 1,
				gpio_base + VT8500_GPIO_MUX_REG);
			iounmap(gpio_base);
		} else
			pr_err("%s: Could not remap GPIO mux\n", __func__);

		of_node_put(fb);
	}
#endif

#ifdef CONFIG_FB_WM8505
	fb = of_find_compatible_node(NULL, NULL, "wm,wm8505-fb");
	if (fb) {
		np = of_find_compatible_node(NULL, NULL, "wm,wm8505-gpio");
		if (!np)
			np = of_find_compatible_node(NULL, NULL,
							"wm,wm8650-gpio");
		if (np) {
			gpio_base = of_iomap(np, 0);

			if (!gpio_base)
				pr_err("%s: of_iomap(gpio_mux) failed\n",
								__func__);

			of_node_put(np);
		} else {
			gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
			if (!gpio_base)
				pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
								__func__);
		}
		if (gpio_base) {
			writel(readl(gpio_base + VT8500_GPIO_MUX_REG) |
				0x80000000, gpio_base + VT8500_GPIO_MUX_REG);
			iounmap(gpio_base);
		} else
			pr_err("%s: Could not remap GPIO mux\n", __func__);

		of_node_put(fb);
	}
#endif

	np = of_find_compatible_node(NULL, NULL, "via,vt8500-pmc");
	if (np) {
		pmc_base = of_iomap(np, 0);

		if (!pmc_base)
			pr_err("%s:of_iomap(pmc) failed\n", __func__);

		of_node_put(np);
	} else {
		pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000);
		if (!pmc_base)
			pr_err("%s:ioremap(power_off) failed\n", __func__);
	}
	if (pmc_base)
		pm_power_off = &vt8500_power_off;
	else
		pr_err("%s: PMC Hibernation register could not be remapped, not enabling power off!\n", __func__);

	vtwm_clk_init(pmc_base);

	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}

static const char * const vt8500_dt_compat[] = {
	"via,vt8500",
	"wm,wm8650",
	"wm,wm8505",
	"wm,wm8750",
	"wm,wm8850",
	NULL
};

DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
	.dt_compat	= vt8500_dt_compat,
	.map_io		= vt8500_map_io,
	.init_machine	= vt8500_init,
	.init_time	= clocksource_of_init,
	.restart	= vt8500_restart,
MACHINE_END
Commit	Line	Data
e9a91de7 TP	1	/*
	2	* arch/arm/mach-vt8500/vt8500.c
	3	*
	4	* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20
41d16512	21	#include <linux/clocksource.h>
e9a91de7 TP	22	#include <linux/io.h>
	23	#include <linux/pm.h>
	24
	25	#include <asm/mach-types.h>
	26	#include <asm/mach/arch.h>
	27	#include <asm/mach/time.h>
	28	#include <asm/mach/map.h>
	29
	30	#include <linux/of.h>
	31	#include <linux/of_address.h>
	32	#include <linux/of_irq.h>
	33	#include <linux/of_platform.h>
	34
e9a91de7 TP	35	#include "common.h"
	36
	37	#define LEGACY_GPIO_BASE 0xD8110000
	38	#define LEGACY_PMC_BASE 0xD8130000
	39
	40	/* Registers in GPIO Controller */
	41	#define VT8500_GPIO_MUX_REG 0x200
	42
	43	/* Registers in Power Management Controller */
	44	#define VT8500_HCR_REG 0x12
	45	#define VT8500_PMSR_REG 0x60
	46
	47	static void __iomem *pmc_base;
	48
	49	void vt8500_restart(char mode, const char *cmd)
	50	{
	51	if (pmc_base)
	52	writel(1, pmc_base + VT8500_PMSR_REG);
	53	}
	54
	55	static struct map_desc vt8500_io_desc[] __initdata = {
	56	/* SoC MMIO registers */
	57	[0] = {
	58	.virtual = 0xf8000000,
	59	.pfn = __phys_to_pfn(0xd8000000),
	60	.length = 0x00390000, /* max of all chip variants */
	61	.type = MT_DEVICE
	62	},
	63	};
	64
	65	void __init vt8500_map_io(void)
	66	{
	67	iotable_init(vt8500_io_desc, ARRAY_SIZE(vt8500_io_desc));
	68	}
	69
	70	static void vt8500_power_off(void)
	71	{
	72	local_irq_disable();
	73	writew(5, pmc_base + VT8500_HCR_REG);
	74	asm("mcr%? p15, 0, %0, c7, c0, 4" : : "r" (0));
	75	}
	76
	77	void __init vt8500_init(void)
	78	{
a4ee7770 TP	79	struct device_node *np;
	80	#if defined(CONFIG_FB_VT8500) \|\| defined(CONFIG_FB_WM8505)
	81	struct device_node *fb;
e9a91de7	82	void __iomem *gpio_base;
a4ee7770	83	#endif
e9a91de7 TP	84
	85	#ifdef CONFIG_FB_VT8500
	86	fb = of_find_compatible_node(NULL, NULL, "via,vt8500-fb");
	87	if (fb) {
	88	np = of_find_compatible_node(NULL, NULL, "via,vt8500-gpio");
	89	if (np) {
	90	gpio_base = of_iomap(np, 0);
	91
	92	if (!gpio_base)
	93	pr_err("%s: of_iomap(gpio_mux) failed\n",
	94	__func__);
	95
	96	of_node_put(np);
	97	} else {
	98	gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
	99	if (!gpio_base)
	100	pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
	101	__func__);
	102	}
	103	if (gpio_base) {
	104	writel(readl(gpio_base + VT8500_GPIO_MUX_REG) \| 1,
	105	gpio_base + VT8500_GPIO_MUX_REG);
	106	iounmap(gpio_base);
	107	} else
	108	pr_err("%s: Could not remap GPIO mux\n", __func__);
	109
	110	of_node_put(fb);
	111	}
	112	#endif
	113
	114	#ifdef CONFIG_FB_WM8505
	115	fb = of_find_compatible_node(NULL, NULL, "wm,wm8505-fb");
	116	if (fb) {
	117	np = of_find_compatible_node(NULL, NULL, "wm,wm8505-gpio");
	118	if (!np)
	119	np = of_find_compatible_node(NULL, NULL,
	120	"wm,wm8650-gpio");
	121	if (np) {
	122	gpio_base = of_iomap(np, 0);
	123
	124	if (!gpio_base)
	125	pr_err("%s: of_iomap(gpio_mux) failed\n",
	126	__func__);
	127
	128	of_node_put(np);
	129	} else {
	130	gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
	131	if (!gpio_base)
	132	pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
	133	__func__);
	134	}
	135	if (gpio_base) {
	136	writel(readl(gpio_base + VT8500_GPIO_MUX_REG) \|
	137	0x80000000, gpio_base + VT8500_GPIO_MUX_REG);
	138	iounmap(gpio_base);
	139	} else
	140	pr_err("%s: Could not remap GPIO mux\n", __func__);
	141
	142	of_node_put(fb);
	143	}
	144	#endif
	145
	146	np = of_find_compatible_node(NULL, NULL, "via,vt8500-pmc");
	147	if (np) {
148	pmc_base = of_iomap(np, 0);
149
150	if (!pmc_base)
151	pr_err("%s:of_iomap(pmc) failed\n", __func__);
152
153	of_node_put(np);
154	} else {
155	pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000);
156	if (!pmc_base)
157	pr_err("%s:ioremap(power_off) failed\n", __func__);
158	}
159	if (pmc_base)
160	pm_power_off = &vt8500_power_off;
161	else
162	pr_err("%s: PMC Hibernation register could not be remapped, not enabling power off!\n", __func__);
163
164	vtwm_clk_init(pmc_base);
165
166	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
167	}
168
e9a91de7 TP	169	static const char * const vt8500_dt_compat[] = {
	170	"via,vt8500",
	171	"wm,wm8650",
	172	"wm,wm8505",
8d31bfa5 TP	173	"wm,wm8750",
8d31bfa5 TP	174	"wm,wm8850",
9f8466c6	175	NULL
e9a91de7 TP	176	};
	177
	178	DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
	179	.dt_compat = vt8500_dt_compat,
	180	.map_io = vt8500_map_io,
e9a91de7	181	.init_machine = vt8500_init,
41d16512	182	.init_time = clocksource_of_init,
e9a91de7 TP	183	.restart = vt8500_restart,
	184	MACHINE_END
	185