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1 | /* |
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2 | * linux/arch/arm/mach-w90x900/gpio.c |
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3 | * |
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4 | * Generic nuc900 GPIO handling |
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5 | * |
6 | * Wan ZongShun <mcuos.com@gmail.com> |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as |
10 | * published by the Free Software Foundation. |
11 | */ |
12 | |
13 | #include <linux/clk.h> |
14 | #include <linux/errno.h> |
15 | #include <linux/interrupt.h> |
16 | #include <linux/irq.h> |
17 | #include <linux/debugfs.h> |
18 | #include <linux/seq_file.h> |
19 | #include <linux/kernel.h> |
20 | #include <linux/list.h> |
21 | #include <linux/module.h> |
22 | #include <linux/io.h> |
23 | #include <linux/gpio.h> |
24 | |
25 | #include <mach/hardware.h> |
26 | |
27 | #define GPIO_BASE (W90X900_VA_GPIO) |
28 | #define GPIO_DIR (0x04) |
29 | #define GPIO_OUT (0x08) |
30 | #define GPIO_IN (0x0C) |
31 | #define GROUPINERV (0x10) |
32 | #define GPIO_GPIO(Nb) (0x00000001 << (Nb)) |
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33 | #define to_nuc900_gpio_chip(c) container_of(c, struct nuc900_gpio_chip, chip) |
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34 | |
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35 | #define NUC900_GPIO_CHIP(name, base_gpio, nr_gpio) \ |
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36 | { \ |
37 | .chip = { \ |
38 | .label = name, \ |
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39 | .direction_input = nuc900_dir_input, \ |
40 | .direction_output = nuc900_dir_output, \ |
41 | .get = nuc900_gpio_get, \ |
42 | .set = nuc900_gpio_set, \ |
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43 | .base = base_gpio, \ |
44 | .ngpio = nr_gpio, \ |
45 | } \ |
46 | } |
47 | |
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48 | struct nuc900_gpio_chip { |
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49 | struct gpio_chip chip; |
50 | void __iomem *regbase; /* Base of group register*/ |
51 | spinlock_t gpio_lock; |
52 | }; |
53 | |
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54 | static int nuc900_gpio_get(struct gpio_chip *chip, unsigned offset) |
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55 | { |
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56 | struct nuc900_gpio_chip *nuc900_gpio = to_nuc900_gpio_chip(chip); |
57 | void __iomem *pio = nuc900_gpio->regbase + GPIO_IN; |
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58 | unsigned int regval; |
59 | |
60 | regval = __raw_readl(pio); |
61 | regval &= GPIO_GPIO(offset); |
62 | |
63 | return (regval != 0); |
64 | } |
65 | |
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66 | static void nuc900_gpio_set(struct gpio_chip *chip, unsigned offset, int val) |
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67 | { |
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68 | struct nuc900_gpio_chip *nuc900_gpio = to_nuc900_gpio_chip(chip); |
69 | void __iomem *pio = nuc900_gpio->regbase + GPIO_OUT; |
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70 | unsigned int regval; |
71 | unsigned long flags; |
72 | |
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73 | spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags); |
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74 | |
75 | regval = __raw_readl(pio); |
76 | |
77 | if (val) |
78 | regval |= GPIO_GPIO(offset); |
79 | else |
80 | regval &= ~GPIO_GPIO(offset); |
81 | |
82 | __raw_writel(regval, pio); |
83 | |
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84 | spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags); |
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85 | } |
86 | |
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87 | static int nuc900_dir_input(struct gpio_chip *chip, unsigned offset) |
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88 | { |
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89 | struct nuc900_gpio_chip *nuc900_gpio = to_nuc900_gpio_chip(chip); |
90 | void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR; |
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91 | unsigned int regval; |
92 | unsigned long flags; |
93 | |
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94 | spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags); |
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95 | |
96 | regval = __raw_readl(pio); |
97 | regval &= ~GPIO_GPIO(offset); |
98 | __raw_writel(regval, pio); |
99 | |
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100 | spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags); |
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101 | |
102 | return 0; |
103 | } |
104 | |
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105 | static int nuc900_dir_output(struct gpio_chip *chip, unsigned offset, int val) |
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106 | { |
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107 | struct nuc900_gpio_chip *nuc900_gpio = to_nuc900_gpio_chip(chip); |
108 | void __iomem *outreg = nuc900_gpio->regbase + GPIO_OUT; |
109 | void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR; |
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110 | unsigned int regval; |
111 | unsigned long flags; |
112 | |
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113 | spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags); |
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114 | |
115 | regval = __raw_readl(pio); |
116 | regval |= GPIO_GPIO(offset); |
117 | __raw_writel(regval, pio); |
118 | |
119 | regval = __raw_readl(outreg); |
120 | |
121 | if (val) |
122 | regval |= GPIO_GPIO(offset); |
123 | else |
124 | regval &= ~GPIO_GPIO(offset); |
125 | |
126 | __raw_writel(regval, outreg); |
127 | |
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128 | spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags); |
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129 | |
130 | return 0; |
131 | } |
132 | |
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133 | static struct nuc900_gpio_chip nuc900_gpio[] = { |
134 | NUC900_GPIO_CHIP("GROUPC", 0, 16), |
135 | NUC900_GPIO_CHIP("GROUPD", 16, 10), |
136 | NUC900_GPIO_CHIP("GROUPE", 26, 14), |
137 | NUC900_GPIO_CHIP("GROUPF", 40, 10), |
138 | NUC900_GPIO_CHIP("GROUPG", 50, 17), |
139 | NUC900_GPIO_CHIP("GROUPH", 67, 8), |
140 | NUC900_GPIO_CHIP("GROUPI", 75, 17), |
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141 | }; |
142 | |
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143 | void __init nuc900_init_gpio(int nr_group) |
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144 | { |
145 | unsigned i; |
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146 | struct nuc900_gpio_chip *gpio_chip; |
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147 | |
148 | for (i = 0; i < nr_group; i++) { |
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149 | gpio_chip = &nuc900_gpio[i]; |
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150 | spin_lock_init(&gpio_chip->gpio_lock); |
151 | gpio_chip->regbase = GPIO_BASE + i * GROUPINERV; |
152 | gpiochip_add(&gpio_chip->chip); |
153 | } |
154 | } |