Merge tag 'stable/for-linus-3.14-rc2-tag' of git://git.kernel.org/pub/scm/linux/kerne...
[deliverable/linux.git] / arch / arm / mach-zynq / common.c
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1/*
2 * This file contains common code that is intended to be used across
3 * boards so that it's not replicated.
4 *
5 * Copyright (C) 2011 Xilinx
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/cpumask.h>
20#include <linux/platform_device.h>
21#include <linux/clk.h>
0f586fbf 22#include <linux/clk/zynq.h>
e932900a 23#include <linux/clocksource.h>
0f586fbf 24#include <linux/of_address.h>
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25#include <linux/of_irq.h>
26#include <linux/of_platform.h>
3d64b449 27#include <linux/of.h>
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28#include <linux/irqchip.h>
29#include <linux/irqchip/arm-gic.h>
b85a3ef4 30
3d64b449 31#include <asm/mach/arch.h>
b85a3ef4 32#include <asm/mach/map.h>
03e07595 33#include <asm/mach/time.h>
3d64b449 34#include <asm/mach-types.h>
b85a3ef4 35#include <asm/page.h>
9a45eb69 36#include <asm/pgtable.h>
732078c3 37#include <asm/smp_scu.h>
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38#include <asm/hardware/cache-l2x0.h>
39
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40#include "common.h"
41
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42void __iomem *zynq_scu_base;
43
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44static struct platform_device zynq_cpuidle_device = {
45 .name = "cpuidle-zynq",
46};
47
b85a3ef4 48/**
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49 * zynq_init_machine - System specific initialization, intended to be
50 * called from board specific initialization.
b85a3ef4 51 */
889faa88 52static void __init zynq_init_machine(void)
b85a3ef4 53{
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54 /*
55 * 64KB way size, 8-way associativity, parity disabled
56 */
0fcfdbca 57 l2x0_of_init(0x02060000, 0xF0F0FFFF);
b85a3ef4 58
f4d5d7b7 59 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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60
61 platform_device_register(&zynq_cpuidle_device);
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62}
63
889faa88 64static void __init zynq_timer_init(void)
03e07595 65{
64b889b3 66 zynq_slcr_init();
c5263bb8 67 clocksource_of_init();
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68}
69
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70static struct map_desc zynq_cortex_a9_scu_map __initdata = {
71 .length = SZ_256,
72 .type = MT_DEVICE,
73};
74
75static void __init zynq_scu_map_io(void)
76{
77 unsigned long base;
78
79 base = scu_a9_get_base();
80 zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base);
81 /* Expected address is in vmalloc area that's why simple assign here */
82 zynq_cortex_a9_scu_map.virtual = base;
83 iotable_init(&zynq_cortex_a9_scu_map, 1);
84 zynq_scu_base = (void __iomem *)base;
85 BUG_ON(!zynq_scu_base);
86}
87
b85a3ef4 88/**
889faa88 89 * zynq_map_io - Create memory mappings needed for early I/O.
b85a3ef4 90 */
889faa88 91static void __init zynq_map_io(void)
b85a3ef4 92{
385f02b1 93 debug_ll_io_init();
732078c3 94 zynq_scu_map_io();
b85a3ef4 95}
3d64b449 96
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97static void __init zynq_irq_init(void)
98{
99 gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
100 irqchip_init();
101}
102
fe08bf9f 103static void zynq_system_reset(enum reboot_mode mode, const char *cmd)
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104{
105 zynq_slcr_system_reset();
106}
107
889faa88 108static const char * const zynq_dt_match[] = {
e06f1a9e 109 "xlnx,zynq-7000",
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110 NULL
111};
112
514a5908 113DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
aa7eb2bb 114 .smp = smp_ops(zynq_smp_ops),
889faa88 115 .map_io = zynq_map_io,
9f4f5d26 116 .init_irq = zynq_irq_init,
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117 .init_machine = zynq_init_machine,
118 .init_time = zynq_timer_init,
119 .dt_compat = zynq_dt_match,
96790f0a 120 .restart = zynq_system_reset,
3d64b449 121MACHINE_END
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