arm: zynq: Add smp_twd timer
[deliverable/linux.git] / arch / arm / mach-zynq / common.c
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1/*
2 * This file contains common code that is intended to be used across
3 * boards so that it's not replicated.
4 *
5 * Copyright (C) 2011 Xilinx
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/cpumask.h>
20#include <linux/platform_device.h>
21#include <linux/clk.h>
0f586fbf 22#include <linux/clk/zynq.h>
e932900a 23#include <linux/clocksource.h>
0f586fbf 24#include <linux/of_address.h>
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25#include <linux/of_irq.h>
26#include <linux/of_platform.h>
3d64b449 27#include <linux/of.h>
c0675617 28#include <linux/irqchip.h>
b85a3ef4 29
3d64b449 30#include <asm/mach/arch.h>
b85a3ef4 31#include <asm/mach/map.h>
03e07595 32#include <asm/mach/time.h>
3d64b449 33#include <asm/mach-types.h>
b85a3ef4 34#include <asm/page.h>
9a45eb69 35#include <asm/pgtable.h>
732078c3 36#include <asm/smp_scu.h>
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37#include <asm/hardware/cache-l2x0.h>
38
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39#include "common.h"
40
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41void __iomem *zynq_scu_base;
42
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43static struct of_device_id zynq_of_bus_ids[] __initdata = {
44 { .compatible = "simple-bus", },
45 {}
46};
47
48/**
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49 * zynq_init_machine - System specific initialization, intended to be
50 * called from board specific initialization.
b85a3ef4 51 */
889faa88 52static void __init zynq_init_machine(void)
b85a3ef4 53{
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54 /*
55 * 64KB way size, 8-way associativity, parity disabled
56 */
0fcfdbca 57 l2x0_of_init(0x02060000, 0xF0F0FFFF);
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58
59 of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
60}
61
889faa88 62static void __init zynq_timer_init(void)
03e07595 63{
64b889b3 64 zynq_slcr_init();
c5263bb8 65 clocksource_of_init();
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66}
67
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68static struct map_desc zynq_cortex_a9_scu_map __initdata = {
69 .length = SZ_256,
70 .type = MT_DEVICE,
71};
72
73static void __init zynq_scu_map_io(void)
74{
75 unsigned long base;
76
77 base = scu_a9_get_base();
78 zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base);
79 /* Expected address is in vmalloc area that's why simple assign here */
80 zynq_cortex_a9_scu_map.virtual = base;
81 iotable_init(&zynq_cortex_a9_scu_map, 1);
82 zynq_scu_base = (void __iomem *)base;
83 BUG_ON(!zynq_scu_base);
84}
85
b85a3ef4 86/**
889faa88 87 * zynq_map_io - Create memory mappings needed for early I/O.
b85a3ef4 88 */
889faa88 89static void __init zynq_map_io(void)
b85a3ef4 90{
385f02b1 91 debug_ll_io_init();
732078c3 92 zynq_scu_map_io();
b85a3ef4 93}
3d64b449 94
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95static void zynq_system_reset(char mode, const char *cmd)
96{
97 zynq_slcr_system_reset();
98}
99
889faa88 100static const char * const zynq_dt_match[] = {
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101 "xlnx,zynq-zc702",
102 "xlnx,zynq-7000",
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103 NULL
104};
105
106MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
889faa88 107 .map_io = zynq_map_io,
0529e315 108 .init_irq = irqchip_init,
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109 .init_machine = zynq_init_machine,
110 .init_time = zynq_timer_init,
111 .dt_compat = zynq_dt_match,
96790f0a 112 .restart = zynq_system_reset,
3d64b449 113MACHINE_END
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