projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | #include <linux/linkage.h> |
| 2 | #include <asm/assembler.h> | |
| 3a1e5015 | 3 | #include "abort-macro.S" |
| 1da177e4 LT |
4 | /* |
| 5 | * Function: v6_early_abort | |
| 6 | * | |
| 7 | * Params : r2 = address of aborted instruction | |
| 8 | * : r3 = saved SPSR | |
| 9 | * | |
| 10 | * Returns : r0 = address of abort | |
| 11 | * : r1 = FSR, bit 11 = write | |
| 12 | * : r2-r8 = corrupted | |
| 13 | * : r9 = preserved | |
| 14 | * : sp = pointer to registers | |
| 15 | * | |
| 16 | * Purpose : obtain information about current aborted instruction. | |
| 3a1e5015 GD |
17 | * Note: we read user space. This means we might cause a data |
| 18 | * abort here if the I-TLB and D-TLB aren't seeing the same | |
| 19 | * picture. Unfortunately, this does happen. We live with it. | |
| 1da177e4 LT |
20 | */ |
| 21 | .align 5 | |
| 22 | ENTRY(v6_early_abort) | |
| 43cc1981 | 23 | #ifdef CONFIG_CPU_32v6K |
| 2c3a0540 CM |
24 | clrex |
| 25 | #else | |
| 26 | strex r0, r1, [sp] @ Clear the exclusive monitor | |
| 27 | #endif | |
| 1da177e4 LT |
28 | mrc p15, 0, r1, c5, c0, 0 @ get FSR |
| 29 | mrc p15, 0, r0, c6, c0, 0 @ get FAR | |
| 3a1e5015 GD |
30 | /* |
| 31 | * Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR. | |
| 32 | * The test below covers all the write situations, including Java bytecodes | |
| 33 | */ | |
| 34 | bic r1, r1, #1 << 11 | 1 << 10 @ clear bits 11 and 10 of FSR | |
| 35 | tst r3, #PSR_J_BIT @ Java? | |
| 36 | movne pc, lr | |
| 37 | do_thumb_abort | |
| 38 | ldreq r3, [r2] @ read aborted ARM instruction | |
| 39 | do_ldrd_abort | |
| 40 | tst r3, #1 << 20 @ L = 0 -> write | |
| 41 | orreq r1, r1, #1 << 11 @ yes. | |
| 1da177e4 LT |
42 | mov pc, lr |
| 43 | ||
| 44 |