Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
0ddbccd1 | 2 | * linux/arch/arm/mm/dma-mapping.c |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2000-2004 Russell King | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * DMA uncached mapping support. | |
11 | */ | |
12 | #include <linux/module.h> | |
13 | #include <linux/mm.h> | |
5a0e3ad6 | 14 | #include <linux/gfp.h> |
1da177e4 LT |
15 | #include <linux/errno.h> |
16 | #include <linux/list.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/device.h> | |
19 | #include <linux/dma-mapping.h> | |
39af22a7 | 20 | #include <linux/highmem.h> |
99d1717d | 21 | #include <linux/slab.h> |
1da177e4 | 22 | |
23759dc6 | 23 | #include <asm/memory.h> |
43377453 | 24 | #include <asm/highmem.h> |
1da177e4 | 25 | #include <asm/cacheflush.h> |
1da177e4 | 26 | #include <asm/tlbflush.h> |
37134cd5 | 27 | #include <asm/sizes.h> |
99d1717d | 28 | #include <asm/mach/arch.h> |
37134cd5 | 29 | |
022ae537 RK |
30 | #include "mm.h" |
31 | ||
ab6494f0 CM |
32 | static u64 get_coherent_dma_mask(struct device *dev) |
33 | { | |
022ae537 | 34 | u64 mask = (u64)arm_dma_limit; |
ab6494f0 CM |
35 | |
36 | if (dev) { | |
37 | mask = dev->coherent_dma_mask; | |
38 | ||
39 | /* | |
40 | * Sanity check the DMA mask - it must be non-zero, and | |
41 | * must be able to be satisfied by a DMA allocation. | |
42 | */ | |
43 | if (mask == 0) { | |
44 | dev_warn(dev, "coherent DMA mask is unset\n"); | |
45 | return 0; | |
46 | } | |
47 | ||
022ae537 | 48 | if ((~mask) & (u64)arm_dma_limit) { |
ab6494f0 CM |
49 | dev_warn(dev, "coherent DMA mask %#llx is smaller " |
50 | "than system GFP_DMA mask %#llx\n", | |
022ae537 | 51 | mask, (u64)arm_dma_limit); |
ab6494f0 CM |
52 | return 0; |
53 | } | |
54 | } | |
1da177e4 | 55 | |
ab6494f0 CM |
56 | return mask; |
57 | } | |
58 | ||
7a9a32a9 RK |
59 | /* |
60 | * Allocate a DMA buffer for 'dev' of size 'size' using the | |
61 | * specified gfp mask. Note that 'size' must be page aligned. | |
62 | */ | |
63 | static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp) | |
64 | { | |
65 | unsigned long order = get_order(size); | |
66 | struct page *page, *p, *e; | |
67 | void *ptr; | |
68 | u64 mask = get_coherent_dma_mask(dev); | |
69 | ||
70 | #ifdef CONFIG_DMA_API_DEBUG | |
71 | u64 limit = (mask + 1) & ~mask; | |
72 | if (limit && size >= limit) { | |
73 | dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n", | |
74 | size, mask); | |
75 | return NULL; | |
76 | } | |
77 | #endif | |
78 | ||
79 | if (!mask) | |
80 | return NULL; | |
81 | ||
82 | if (mask < 0xffffffffULL) | |
83 | gfp |= GFP_DMA; | |
84 | ||
85 | page = alloc_pages(gfp, order); | |
86 | if (!page) | |
87 | return NULL; | |
88 | ||
89 | /* | |
90 | * Now split the huge page and free the excess pages | |
91 | */ | |
92 | split_page(page, order); | |
93 | for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++) | |
94 | __free_page(p); | |
95 | ||
96 | /* | |
97 | * Ensure that the allocated pages are zeroed, and that any data | |
98 | * lurking in the kernel direct-mapped region is invalidated. | |
99 | */ | |
100 | ptr = page_address(page); | |
101 | memset(ptr, 0, size); | |
102 | dmac_flush_range(ptr, ptr + size); | |
103 | outer_flush_range(__pa(ptr), __pa(ptr) + size); | |
104 | ||
105 | return page; | |
106 | } | |
107 | ||
108 | /* | |
109 | * Free a DMA buffer. 'size' must be page aligned. | |
110 | */ | |
111 | static void __dma_free_buffer(struct page *page, size_t size) | |
112 | { | |
113 | struct page *e = page + (size >> PAGE_SHIFT); | |
114 | ||
115 | while (page < e) { | |
116 | __free_page(page); | |
117 | page++; | |
118 | } | |
119 | } | |
120 | ||
ab6494f0 | 121 | #ifdef CONFIG_MMU |
a5e9d38b | 122 | |
99d1717d | 123 | #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - consistent_base) >> PAGE_SHIFT) |
1fdb24e9 | 124 | #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - consistent_base) >> PMD_SHIFT) |
a5e9d38b | 125 | |
1da177e4 | 126 | /* |
37134cd5 | 127 | * These are the page tables (2MB each) covering uncached, DMA consistent allocations |
1da177e4 | 128 | */ |
99d1717d JM |
129 | static pte_t **consistent_pte; |
130 | ||
99d1717d | 131 | #define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M |
99d1717d JM |
132 | |
133 | unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE; | |
134 | ||
135 | void __init init_consistent_dma_size(unsigned long size) | |
136 | { | |
137 | unsigned long base = CONSISTENT_END - ALIGN(size, SZ_2M); | |
138 | ||
139 | BUG_ON(consistent_pte); /* Check we're called before DMA region init */ | |
140 | BUG_ON(base < VMALLOC_END); | |
141 | ||
142 | /* Grow region to accommodate specified size */ | |
143 | if (base < consistent_base) | |
144 | consistent_base = base; | |
145 | } | |
1da177e4 | 146 | |
13ccf3ad | 147 | #include "vmregion.h" |
1da177e4 | 148 | |
13ccf3ad RK |
149 | static struct arm_vmregion_head consistent_head = { |
150 | .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock), | |
1da177e4 | 151 | .vm_list = LIST_HEAD_INIT(consistent_head.vm_list), |
1da177e4 LT |
152 | .vm_end = CONSISTENT_END, |
153 | }; | |
154 | ||
1da177e4 LT |
155 | #ifdef CONFIG_HUGETLB_PAGE |
156 | #error ARM Coherent DMA allocator does not (yet) support huge TLB | |
157 | #endif | |
158 | ||
88c58f3b RK |
159 | /* |
160 | * Initialise the consistent memory allocation. | |
161 | */ | |
162 | static int __init consistent_init(void) | |
163 | { | |
164 | int ret = 0; | |
165 | pgd_t *pgd; | |
516295e5 | 166 | pud_t *pud; |
88c58f3b RK |
167 | pmd_t *pmd; |
168 | pte_t *pte; | |
169 | int i = 0; | |
99d1717d | 170 | unsigned long base = consistent_base; |
53cbcbcf | 171 | unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT; |
99d1717d JM |
172 | |
173 | consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL); | |
174 | if (!consistent_pte) { | |
175 | pr_err("%s: no memory\n", __func__); | |
176 | return -ENOMEM; | |
177 | } | |
178 | ||
179 | pr_debug("DMA memory: 0x%08lx - 0x%08lx:\n", base, CONSISTENT_END); | |
180 | consistent_head.vm_start = base; | |
88c58f3b RK |
181 | |
182 | do { | |
183 | pgd = pgd_offset(&init_mm, base); | |
516295e5 RK |
184 | |
185 | pud = pud_alloc(&init_mm, pgd, base); | |
186 | if (!pud) { | |
187 | printk(KERN_ERR "%s: no pud tables\n", __func__); | |
188 | ret = -ENOMEM; | |
189 | break; | |
190 | } | |
191 | ||
192 | pmd = pmd_alloc(&init_mm, pud, base); | |
88c58f3b RK |
193 | if (!pmd) { |
194 | printk(KERN_ERR "%s: no pmd tables\n", __func__); | |
195 | ret = -ENOMEM; | |
196 | break; | |
197 | } | |
198 | WARN_ON(!pmd_none(*pmd)); | |
199 | ||
200 | pte = pte_alloc_kernel(pmd, base); | |
201 | if (!pte) { | |
202 | printk(KERN_ERR "%s: no pte tables\n", __func__); | |
203 | ret = -ENOMEM; | |
204 | break; | |
205 | } | |
206 | ||
207 | consistent_pte[i++] = pte; | |
e73fc88e | 208 | base += PMD_SIZE; |
88c58f3b RK |
209 | } while (base < CONSISTENT_END); |
210 | ||
211 | return ret; | |
212 | } | |
213 | ||
214 | core_initcall(consistent_init); | |
215 | ||
1da177e4 | 216 | static void * |
31ebf944 | 217 | __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot) |
1da177e4 | 218 | { |
13ccf3ad | 219 | struct arm_vmregion *c; |
5bc23d32 RK |
220 | size_t align; |
221 | int bit; | |
1da177e4 | 222 | |
99d1717d | 223 | if (!consistent_pte) { |
ebd7a845 RK |
224 | printk(KERN_ERR "%s: not initialised\n", __func__); |
225 | dump_stack(); | |
ebd7a845 RK |
226 | return NULL; |
227 | } | |
228 | ||
5bc23d32 RK |
229 | /* |
230 | * Align the virtual region allocation - maximum alignment is | |
231 | * a section size, minimum is a page size. This helps reduce | |
232 | * fragmentation of the DMA space, and also prevents allocations | |
233 | * smaller than a section from crossing a section boundary. | |
234 | */ | |
c947f69f | 235 | bit = fls(size - 1); |
5bc23d32 RK |
236 | if (bit > SECTION_SHIFT) |
237 | bit = SECTION_SHIFT; | |
238 | align = 1 << bit; | |
239 | ||
1da177e4 LT |
240 | /* |
241 | * Allocate a virtual address in the consistent mapping region. | |
242 | */ | |
5bc23d32 | 243 | c = arm_vmregion_alloc(&consistent_head, align, size, |
1da177e4 LT |
244 | gfp & ~(__GFP_DMA | __GFP_HIGHMEM)); |
245 | if (c) { | |
37134cd5 | 246 | pte_t *pte; |
37134cd5 KH |
247 | int idx = CONSISTENT_PTE_INDEX(c->vm_start); |
248 | u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); | |
1da177e4 | 249 | |
37134cd5 | 250 | pte = consistent_pte[idx] + off; |
1da177e4 LT |
251 | c->vm_pages = page; |
252 | ||
1da177e4 LT |
253 | do { |
254 | BUG_ON(!pte_none(*pte)); | |
255 | ||
ad1ae2fe | 256 | set_pte_ext(pte, mk_pte(page, prot), 0); |
1da177e4 LT |
257 | page++; |
258 | pte++; | |
37134cd5 KH |
259 | off++; |
260 | if (off >= PTRS_PER_PTE) { | |
261 | off = 0; | |
262 | pte = consistent_pte[++idx]; | |
263 | } | |
1da177e4 LT |
264 | } while (size -= PAGE_SIZE); |
265 | ||
2be23c47 RK |
266 | dsb(); |
267 | ||
1da177e4 LT |
268 | return (void *)c->vm_start; |
269 | } | |
1da177e4 LT |
270 | return NULL; |
271 | } | |
695ae0af RK |
272 | |
273 | static void __dma_free_remap(void *cpu_addr, size_t size) | |
274 | { | |
275 | struct arm_vmregion *c; | |
276 | unsigned long addr; | |
277 | pte_t *ptep; | |
278 | int idx; | |
279 | u32 off; | |
280 | ||
281 | c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr); | |
282 | if (!c) { | |
283 | printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n", | |
284 | __func__, cpu_addr); | |
285 | dump_stack(); | |
286 | return; | |
287 | } | |
288 | ||
289 | if ((c->vm_end - c->vm_start) != size) { | |
290 | printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n", | |
291 | __func__, c->vm_end - c->vm_start, size); | |
292 | dump_stack(); | |
293 | size = c->vm_end - c->vm_start; | |
294 | } | |
295 | ||
296 | idx = CONSISTENT_PTE_INDEX(c->vm_start); | |
297 | off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1); | |
298 | ptep = consistent_pte[idx] + off; | |
299 | addr = c->vm_start; | |
300 | do { | |
301 | pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep); | |
695ae0af RK |
302 | |
303 | ptep++; | |
304 | addr += PAGE_SIZE; | |
305 | off++; | |
306 | if (off >= PTRS_PER_PTE) { | |
307 | off = 0; | |
308 | ptep = consistent_pte[++idx]; | |
309 | } | |
310 | ||
acaac256 RK |
311 | if (pte_none(pte) || !pte_present(pte)) |
312 | printk(KERN_CRIT "%s: bad page in kernel page table\n", | |
313 | __func__); | |
695ae0af RK |
314 | } while (size -= PAGE_SIZE); |
315 | ||
316 | flush_tlb_kernel_range(c->vm_start, c->vm_end); | |
317 | ||
318 | arm_vmregion_free(&consistent_head, c); | |
319 | } | |
320 | ||
ab6494f0 | 321 | #else /* !CONFIG_MMU */ |
695ae0af | 322 | |
31ebf944 RK |
323 | #define __dma_alloc_remap(page, size, gfp, prot) page_address(page) |
324 | #define __dma_free_remap(addr, size) do { } while (0) | |
325 | ||
326 | #endif /* CONFIG_MMU */ | |
327 | ||
ab6494f0 CM |
328 | static void * |
329 | __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp, | |
330 | pgprot_t prot) | |
331 | { | |
04da5694 | 332 | struct page *page; |
31ebf944 | 333 | void *addr; |
ab6494f0 | 334 | |
ea2e7057 SB |
335 | /* |
336 | * Following is a work-around (a.k.a. hack) to prevent pages | |
337 | * with __GFP_COMP being passed to split_page() which cannot | |
338 | * handle them. The real problem is that this flag probably | |
339 | * should be 0 on ARM as it is not supported on this | |
340 | * platform; see CONFIG_HUGETLBFS. | |
341 | */ | |
342 | gfp &= ~(__GFP_COMP); | |
343 | ||
04da5694 RK |
344 | *handle = ~0; |
345 | size = PAGE_ALIGN(size); | |
ab6494f0 | 346 | |
04da5694 RK |
347 | page = __dma_alloc_buffer(dev, size, gfp); |
348 | if (!page) | |
349 | return NULL; | |
ab6494f0 | 350 | |
31ebf944 RK |
351 | if (!arch_is_coherent()) |
352 | addr = __dma_alloc_remap(page, size, gfp, prot); | |
353 | else | |
354 | addr = page_address(page); | |
695ae0af | 355 | |
31ebf944 | 356 | if (addr) |
9eedd963 | 357 | *handle = pfn_to_dma(dev, page_to_pfn(page)); |
d8e89b47 RK |
358 | else |
359 | __dma_free_buffer(page, size); | |
695ae0af | 360 | |
31ebf944 RK |
361 | return addr; |
362 | } | |
1da177e4 LT |
363 | |
364 | /* | |
365 | * Allocate DMA-coherent memory space and return both the kernel remapped | |
366 | * virtual and bus address for that space. | |
367 | */ | |
368 | void * | |
f9e3214a | 369 | dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp) |
1da177e4 | 370 | { |
1fe53268 DB |
371 | void *memory; |
372 | ||
373 | if (dma_alloc_from_coherent(dev, size, handle, &memory)) | |
374 | return memory; | |
375 | ||
1da177e4 | 376 | return __dma_alloc(dev, size, handle, gfp, |
26a26d32 | 377 | pgprot_dmacoherent(pgprot_kernel)); |
1da177e4 LT |
378 | } |
379 | EXPORT_SYMBOL(dma_alloc_coherent); | |
380 | ||
381 | /* | |
382 | * Allocate a writecombining region, in much the same way as | |
383 | * dma_alloc_coherent above. | |
384 | */ | |
385 | void * | |
f9e3214a | 386 | dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp) |
1da177e4 LT |
387 | { |
388 | return __dma_alloc(dev, size, handle, gfp, | |
389 | pgprot_writecombine(pgprot_kernel)); | |
390 | } | |
391 | EXPORT_SYMBOL(dma_alloc_writecombine); | |
392 | ||
393 | static int dma_mmap(struct device *dev, struct vm_area_struct *vma, | |
394 | void *cpu_addr, dma_addr_t dma_addr, size_t size) | |
395 | { | |
ab6494f0 CM |
396 | int ret = -ENXIO; |
397 | #ifdef CONFIG_MMU | |
13ccf3ad RK |
398 | unsigned long user_size, kern_size; |
399 | struct arm_vmregion *c; | |
1da177e4 LT |
400 | |
401 | user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; | |
402 | ||
13ccf3ad | 403 | c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr); |
1da177e4 LT |
404 | if (c) { |
405 | unsigned long off = vma->vm_pgoff; | |
406 | ||
407 | kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT; | |
408 | ||
409 | if (off < kern_size && | |
410 | user_size <= (kern_size - off)) { | |
1da177e4 LT |
411 | ret = remap_pfn_range(vma, vma->vm_start, |
412 | page_to_pfn(c->vm_pages) + off, | |
413 | user_size << PAGE_SHIFT, | |
414 | vma->vm_page_prot); | |
415 | } | |
416 | } | |
ab6494f0 | 417 | #endif /* CONFIG_MMU */ |
1da177e4 LT |
418 | |
419 | return ret; | |
420 | } | |
421 | ||
422 | int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, | |
423 | void *cpu_addr, dma_addr_t dma_addr, size_t size) | |
424 | { | |
26a26d32 | 425 | vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot); |
1da177e4 LT |
426 | return dma_mmap(dev, vma, cpu_addr, dma_addr, size); |
427 | } | |
428 | EXPORT_SYMBOL(dma_mmap_coherent); | |
429 | ||
430 | int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma, | |
431 | void *cpu_addr, dma_addr_t dma_addr, size_t size) | |
432 | { | |
433 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); | |
434 | return dma_mmap(dev, vma, cpu_addr, dma_addr, size); | |
435 | } | |
436 | EXPORT_SYMBOL(dma_mmap_writecombine); | |
437 | ||
438 | /* | |
439 | * free a page as defined by the above mapping. | |
5edf71ae | 440 | * Must not be called with IRQs disabled. |
1da177e4 LT |
441 | */ |
442 | void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle) | |
443 | { | |
5edf71ae RK |
444 | WARN_ON(irqs_disabled()); |
445 | ||
1fe53268 DB |
446 | if (dma_release_from_coherent(dev, get_order(size), cpu_addr)) |
447 | return; | |
448 | ||
3e82d012 RK |
449 | size = PAGE_ALIGN(size); |
450 | ||
695ae0af RK |
451 | if (!arch_is_coherent()) |
452 | __dma_free_remap(cpu_addr, size); | |
7a9a32a9 | 453 | |
9eedd963 | 454 | __dma_free_buffer(pfn_to_page(dma_to_pfn(dev, handle)), size); |
1da177e4 LT |
455 | } |
456 | EXPORT_SYMBOL(dma_free_coherent); | |
457 | ||
1da177e4 LT |
458 | /* |
459 | * Make an area consistent for devices. | |
105ef9a0 DW |
460 | * Note: Drivers should NOT use this function directly, as it will break |
461 | * platforms with CONFIG_DMABOUNCE. | |
462 | * Use the driver DMA support - see dma-mapping.h (dma_sync_*) | |
1da177e4 | 463 | */ |
4ea0d737 RK |
464 | void ___dma_single_cpu_to_dev(const void *kaddr, size_t size, |
465 | enum dma_data_direction dir) | |
466 | { | |
2ffe2da3 RK |
467 | unsigned long paddr; |
468 | ||
a9c9147e RK |
469 | BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1)); |
470 | ||
471 | dmac_map_area(kaddr, size, dir); | |
2ffe2da3 RK |
472 | |
473 | paddr = __pa(kaddr); | |
474 | if (dir == DMA_FROM_DEVICE) { | |
475 | outer_inv_range(paddr, paddr + size); | |
476 | } else { | |
477 | outer_clean_range(paddr, paddr + size); | |
478 | } | |
479 | /* FIXME: non-speculating: flush on bidirectional mappings? */ | |
4ea0d737 RK |
480 | } |
481 | EXPORT_SYMBOL(___dma_single_cpu_to_dev); | |
482 | ||
483 | void ___dma_single_dev_to_cpu(const void *kaddr, size_t size, | |
484 | enum dma_data_direction dir) | |
485 | { | |
a9c9147e RK |
486 | BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1)); |
487 | ||
2ffe2da3 RK |
488 | /* FIXME: non-speculating: not required */ |
489 | /* don't bother invalidating if DMA to device */ | |
490 | if (dir != DMA_TO_DEVICE) { | |
491 | unsigned long paddr = __pa(kaddr); | |
492 | outer_inv_range(paddr, paddr + size); | |
493 | } | |
494 | ||
a9c9147e | 495 | dmac_unmap_area(kaddr, size, dir); |
4ea0d737 RK |
496 | } |
497 | EXPORT_SYMBOL(___dma_single_dev_to_cpu); | |
afd1a321 | 498 | |
4ea0d737 | 499 | static void dma_cache_maint_page(struct page *page, unsigned long offset, |
a9c9147e RK |
500 | size_t size, enum dma_data_direction dir, |
501 | void (*op)(const void *, size_t, int)) | |
43377453 NP |
502 | { |
503 | /* | |
504 | * A single sg entry may refer to multiple physically contiguous | |
505 | * pages. But we still need to process highmem pages individually. | |
506 | * If highmem is not configured then the bulk of this loop gets | |
507 | * optimized out. | |
508 | */ | |
509 | size_t left = size; | |
510 | do { | |
511 | size_t len = left; | |
93f1d629 RK |
512 | void *vaddr; |
513 | ||
514 | if (PageHighMem(page)) { | |
515 | if (len + offset > PAGE_SIZE) { | |
516 | if (offset >= PAGE_SIZE) { | |
517 | page += offset / PAGE_SIZE; | |
518 | offset %= PAGE_SIZE; | |
519 | } | |
520 | len = PAGE_SIZE - offset; | |
521 | } | |
522 | vaddr = kmap_high_get(page); | |
523 | if (vaddr) { | |
524 | vaddr += offset; | |
a9c9147e | 525 | op(vaddr, len, dir); |
93f1d629 | 526 | kunmap_high(page); |
7e5a69e8 | 527 | } else if (cache_is_vipt()) { |
39af22a7 NP |
528 | /* unmapped pages might still be cached */ |
529 | vaddr = kmap_atomic(page); | |
7e5a69e8 | 530 | op(vaddr + offset, len, dir); |
39af22a7 | 531 | kunmap_atomic(vaddr); |
43377453 | 532 | } |
93f1d629 RK |
533 | } else { |
534 | vaddr = page_address(page) + offset; | |
a9c9147e | 535 | op(vaddr, len, dir); |
43377453 | 536 | } |
43377453 NP |
537 | offset = 0; |
538 | page++; | |
539 | left -= len; | |
540 | } while (left); | |
541 | } | |
4ea0d737 RK |
542 | |
543 | void ___dma_page_cpu_to_dev(struct page *page, unsigned long off, | |
544 | size_t size, enum dma_data_direction dir) | |
545 | { | |
65af191a | 546 | unsigned long paddr; |
65af191a | 547 | |
a9c9147e | 548 | dma_cache_maint_page(page, off, size, dir, dmac_map_area); |
65af191a RK |
549 | |
550 | paddr = page_to_phys(page) + off; | |
2ffe2da3 RK |
551 | if (dir == DMA_FROM_DEVICE) { |
552 | outer_inv_range(paddr, paddr + size); | |
553 | } else { | |
554 | outer_clean_range(paddr, paddr + size); | |
555 | } | |
556 | /* FIXME: non-speculating: flush on bidirectional mappings? */ | |
4ea0d737 RK |
557 | } |
558 | EXPORT_SYMBOL(___dma_page_cpu_to_dev); | |
559 | ||
560 | void ___dma_page_dev_to_cpu(struct page *page, unsigned long off, | |
561 | size_t size, enum dma_data_direction dir) | |
562 | { | |
2ffe2da3 RK |
563 | unsigned long paddr = page_to_phys(page) + off; |
564 | ||
565 | /* FIXME: non-speculating: not required */ | |
566 | /* don't bother invalidating if DMA to device */ | |
567 | if (dir != DMA_TO_DEVICE) | |
568 | outer_inv_range(paddr, paddr + size); | |
569 | ||
a9c9147e | 570 | dma_cache_maint_page(page, off, size, dir, dmac_unmap_area); |
c0177800 CM |
571 | |
572 | /* | |
573 | * Mark the D-cache clean for this page to avoid extra flushing. | |
574 | */ | |
575 | if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE) | |
576 | set_bit(PG_dcache_clean, &page->flags); | |
4ea0d737 RK |
577 | } |
578 | EXPORT_SYMBOL(___dma_page_dev_to_cpu); | |
43377453 | 579 | |
afd1a321 RK |
580 | /** |
581 | * dma_map_sg - map a set of SG buffers for streaming mode DMA | |
582 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
583 | * @sg: list of buffers | |
584 | * @nents: number of buffers to map | |
585 | * @dir: DMA transfer direction | |
586 | * | |
587 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | |
588 | * This is the scatter-gather version of the dma_map_single interface. | |
589 | * Here the scatter gather list elements are each tagged with the | |
590 | * appropriate dma address and length. They are obtained via | |
591 | * sg_dma_{address,length}. | |
592 | * | |
593 | * Device ownership issues as mentioned for dma_map_single are the same | |
594 | * here. | |
595 | */ | |
596 | int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | |
597 | enum dma_data_direction dir) | |
598 | { | |
599 | struct scatterlist *s; | |
01135d92 | 600 | int i, j; |
afd1a321 | 601 | |
24056f52 RK |
602 | BUG_ON(!valid_dma_direction(dir)); |
603 | ||
afd1a321 | 604 | for_each_sg(sg, s, nents, i) { |
24056f52 | 605 | s->dma_address = __dma_map_page(dev, sg_page(s), s->offset, |
01135d92 RK |
606 | s->length, dir); |
607 | if (dma_mapping_error(dev, s->dma_address)) | |
608 | goto bad_mapping; | |
afd1a321 | 609 | } |
24056f52 | 610 | debug_dma_map_sg(dev, sg, nents, nents, dir); |
afd1a321 | 611 | return nents; |
01135d92 RK |
612 | |
613 | bad_mapping: | |
614 | for_each_sg(sg, s, i, j) | |
24056f52 | 615 | __dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir); |
01135d92 | 616 | return 0; |
afd1a321 RK |
617 | } |
618 | EXPORT_SYMBOL(dma_map_sg); | |
619 | ||
620 | /** | |
621 | * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg | |
622 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
623 | * @sg: list of buffers | |
0adfca6f | 624 | * @nents: number of buffers to unmap (same as was passed to dma_map_sg) |
afd1a321 RK |
625 | * @dir: DMA transfer direction (same as was passed to dma_map_sg) |
626 | * | |
627 | * Unmap a set of streaming mode DMA translations. Again, CPU access | |
628 | * rules concerning calls here are the same as for dma_unmap_single(). | |
629 | */ | |
630 | void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, | |
631 | enum dma_data_direction dir) | |
632 | { | |
01135d92 RK |
633 | struct scatterlist *s; |
634 | int i; | |
635 | ||
24056f52 RK |
636 | debug_dma_unmap_sg(dev, sg, nents, dir); |
637 | ||
01135d92 | 638 | for_each_sg(sg, s, nents, i) |
24056f52 | 639 | __dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir); |
afd1a321 RK |
640 | } |
641 | EXPORT_SYMBOL(dma_unmap_sg); | |
642 | ||
643 | /** | |
644 | * dma_sync_sg_for_cpu | |
645 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
646 | * @sg: list of buffers | |
647 | * @nents: number of buffers to map (returned from dma_map_sg) | |
648 | * @dir: DMA transfer direction (same as was passed to dma_map_sg) | |
649 | */ | |
650 | void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, | |
651 | int nents, enum dma_data_direction dir) | |
652 | { | |
653 | struct scatterlist *s; | |
654 | int i; | |
655 | ||
656 | for_each_sg(sg, s, nents, i) { | |
18eabe23 RK |
657 | if (!dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0, |
658 | sg_dma_len(s), dir)) | |
659 | continue; | |
660 | ||
661 | __dma_page_dev_to_cpu(sg_page(s), s->offset, | |
662 | s->length, dir); | |
afd1a321 | 663 | } |
24056f52 RK |
664 | |
665 | debug_dma_sync_sg_for_cpu(dev, sg, nents, dir); | |
afd1a321 RK |
666 | } |
667 | EXPORT_SYMBOL(dma_sync_sg_for_cpu); | |
668 | ||
669 | /** | |
670 | * dma_sync_sg_for_device | |
671 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices | |
672 | * @sg: list of buffers | |
673 | * @nents: number of buffers to map (returned from dma_map_sg) | |
674 | * @dir: DMA transfer direction (same as was passed to dma_map_sg) | |
675 | */ | |
676 | void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, | |
677 | int nents, enum dma_data_direction dir) | |
678 | { | |
679 | struct scatterlist *s; | |
680 | int i; | |
681 | ||
682 | for_each_sg(sg, s, nents, i) { | |
2638b4db RK |
683 | if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0, |
684 | sg_dma_len(s), dir)) | |
685 | continue; | |
686 | ||
18eabe23 RK |
687 | __dma_page_cpu_to_dev(sg_page(s), s->offset, |
688 | s->length, dir); | |
afd1a321 | 689 | } |
24056f52 RK |
690 | |
691 | debug_dma_sync_sg_for_device(dev, sg, nents, dir); | |
afd1a321 RK |
692 | } |
693 | EXPORT_SYMBOL(dma_sync_sg_for_device); | |
24056f52 | 694 | |
022ae537 RK |
695 | /* |
696 | * Return whether the given device DMA address mask can be supported | |
697 | * properly. For example, if your device can only drive the low 24-bits | |
698 | * during bus mastering, then you would pass 0x00ffffff as the mask | |
699 | * to this function. | |
700 | */ | |
701 | int dma_supported(struct device *dev, u64 mask) | |
702 | { | |
703 | if (mask < (u64)arm_dma_limit) | |
704 | return 0; | |
705 | return 1; | |
706 | } | |
707 | EXPORT_SYMBOL(dma_supported); | |
708 | ||
709 | int dma_set_mask(struct device *dev, u64 dma_mask) | |
710 | { | |
711 | if (!dev->dma_mask || !dma_supported(dev, dma_mask)) | |
712 | return -EIO; | |
713 | ||
714 | #ifndef CONFIG_DMABOUNCE | |
715 | *dev->dma_mask = dma_mask; | |
716 | #endif | |
717 | ||
718 | return 0; | |
719 | } | |
720 | EXPORT_SYMBOL(dma_set_mask); | |
721 | ||
24056f52 RK |
722 | #define PREALLOC_DMA_DEBUG_ENTRIES 4096 |
723 | ||
724 | static int __init dma_debug_do_init(void) | |
725 | { | |
726 | dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); | |
727 | return 0; | |
728 | } | |
729 | fs_initcall(dma_debug_do_init); |