sparse pointer use of zero as null
[deliverable/linux.git] / arch / arm / nwfpe / fpopcode.h
CommitLineData
1da177e4
LT
1/*
2 NetWinder Floating Point Emulator
3 (c) Rebel.COM, 1998,1999
4 (c) Philip Blundell, 2001
5
6 Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21*/
22
23#ifndef __FPOPCODE_H__
24#define __FPOPCODE_H__
25
1da177e4
LT
26
27/*
28ARM Floating Point Instruction Classes
29| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
30|c o n d|1 1 0 P|U|u|W|L| Rn |v| Fd |0|0|0|1| o f f s e t | CPDT
31|c o n d|1 1 0 P|U|w|W|L| Rn |x| Fd |0|0|1|0| o f f s e t | CPDT (copro 2)
32| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
33|c o n d|1 1 1 0|a|b|c|d|e| Fn |j| Fd |0|0|0|1|f|g|h|0|i| Fm | CPDO
34|c o n d|1 1 1 0|a|b|c|L|e| Fn | Rd |0|0|0|1|f|g|h|1|i| Fm | CPRT
35|c o n d|1 1 1 0|a|b|c|1|e| Fn |1|1|1|1|0|0|0|1|f|g|h|1|i| Fm | comparisons
36| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
37
38CPDT data transfer instructions
39 LDF, STF, LFM (copro 2), SFM (copro 2)
40
41CPDO dyadic arithmetic instructions
42 ADF, MUF, SUF, RSF, DVF, RDF,
43 POW, RPW, RMF, FML, FDV, FRD, POL
44
45CPDO monadic arithmetic instructions
46 MVF, MNF, ABS, RND, SQT, LOG, LGN, EXP,
47 SIN, COS, TAN, ASN, ACS, ATN, URD, NRM
48
49CPRT joint arithmetic/data transfer instructions
50 FIX (arithmetic followed by load/store)
51 FLT (load/store followed by arithmetic)
52 CMF, CNF CMFE, CNFE (comparisons)
53 WFS, RFS (write/read floating point status register)
54 WFC, RFC (write/read floating point control register)
55
56cond condition codes
57P pre/post index bit: 0 = postindex, 1 = preindex
58U up/down bit: 0 = stack grows down, 1 = stack grows up
59W write back bit: 1 = update base register (Rn)
60L load/store bit: 0 = store, 1 = load
61Rn base register
62Rd destination/source register
63Fd floating point destination register
64Fn floating point source register
65Fm floating point source register or floating point constant
66
67uv transfer length (TABLE 1)
68wx register count (TABLE 2)
69abcd arithmetic opcode (TABLES 3 & 4)
70ef destination size (rounding precision) (TABLE 5)
71gh rounding mode (TABLE 6)
72j dyadic/monadic bit: 0 = dyadic, 1 = monadic
73i constant bit: 1 = constant (TABLE 6)
74*/
75
76/*
77TABLE 1
78+-------------------------+---+---+---------+---------+
79| Precision | u | v | FPSR.EP | length |
80+-------------------------+---+---+---------+---------+