arm: mxc: Use generic_handle_irq()
[deliverable/linux.git] / arch / arm / plat-mxc / 3ds_debugboard.c
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1/*
2 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2010 Jason Wang <jason77.wang@gmail.com>
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <linux/platform_device.h>
17#include <linux/gpio.h>
18#include <linux/smsc911x.h>
19
20#include <mach/hardware.h>
21
22/* LAN9217 ethernet base address */
23#define LAN9217_BASE_ADDR(n) (n + 0x0)
24/* External UART */
25#define UARTA_BASE_ADDR(n) (n + 0x8000)
26#define UARTB_BASE_ADDR(n) (n + 0x10000)
27
28#define BOARD_IO_ADDR(n) (n + 0x20000)
29/* LED switchs */
30#define LED_SWITCH_REG 0x00
31/* buttons */
32#define SWITCH_BUTTONS_REG 0x08
33/* status, interrupt */
34#define INTR_STATUS_REG 0x10
35#define INTR_MASK_REG 0x38
36#define INTR_RESET_REG 0x20
37/* magic word for debug CPLD */
38#define MAGIC_NUMBER1_REG 0x40
39#define MAGIC_NUMBER2_REG 0x48
40/* CPLD code version */
41#define CPLD_CODE_VER_REG 0x50
42/* magic word for debug CPLD */
43#define MAGIC_NUMBER3_REG 0x58
44/* module reset register*/
45#define MODULE_RESET_REG 0x60
46/* CPU ID and Personality ID */
47#define MCU_BOARD_ID_REG 0x68
48
49#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_BOARD_IRQ_START)
50#define MXC_IRQ_TO_GPIO(irq) ((irq) - MXC_INTERNAL_IRQS)
51
52#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START)
53#define MXC_MAX_EXP_IO_LINES 16
54
55/* interrupts like external uart , external ethernet etc*/
56#define EXPIO_INT_ENET (MXC_BOARD_IRQ_START + 0)
57#define EXPIO_INT_XUART_A (MXC_BOARD_IRQ_START + 1)
58#define EXPIO_INT_XUART_B (MXC_BOARD_IRQ_START + 2)
59#define EXPIO_INT_BUTTON_A (MXC_BOARD_IRQ_START + 3)
60#define EXPIO_INT_BUTTON_B (MXC_BOARD_IRQ_START + 4)
61
62static void __iomem *brd_io;
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63
64static struct resource smsc911x_resources[] = {
65 {
66 .flags = IORESOURCE_MEM,
67 } , {
68 .start = EXPIO_INT_ENET,
69 .end = EXPIO_INT_ENET,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static struct smsc911x_platform_config smsc911x_config = {
75 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
76 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
77};
78
79static struct platform_device smsc_lan9217_device = {
80 .name = "smsc911x",
81 .id = 0,
82 .dev = {
83 .platform_data = &smsc911x_config,
84 },
85 .num_resources = ARRAY_SIZE(smsc911x_resources),
86 .resource = smsc911x_resources,
87};
88
89static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc)
90{
91 u32 imr_val;
92 u32 int_valid;
93 u32 expio_irq;
94
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95 /* irq = gpio irq number */
96 desc->irq_data.chip->irq_mask(&desc->irq_data);
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97
98 imr_val = __raw_readw(brd_io + INTR_MASK_REG);
99 int_valid = __raw_readw(brd_io + INTR_STATUS_REG) & ~imr_val;
100
101 expio_irq = MXC_BOARD_IRQ_START;
102 for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
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103 if ((int_valid & 1) == 0)
104 continue;
eb2d7188 105 generic_handle_irq(expio_irq);
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106 }
107
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108 desc->irq_data.chip->irq_ack(&desc->irq_data);
109 desc->irq_data.chip->irq_unmask(&desc->irq_data);
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110}
111
112/*
113 * Disable an expio pin's interrupt by setting the bit in the imr.
114 * Irq is an expio virtual irq number
115 */
4d93579f 116static void expio_mask_irq(struct irq_data *d)
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117{
118 u16 reg;
4d93579f 119 u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
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120
121 reg = __raw_readw(brd_io + INTR_MASK_REG);
122 reg |= (1 << expio);
123 __raw_writew(reg, brd_io + INTR_MASK_REG);
124}
125
4d93579f 126static void expio_ack_irq(struct irq_data *d)
fa94f8dc 127{
4d93579f 128 u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
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129
130 __raw_writew(1 << expio, brd_io + INTR_RESET_REG);
131 __raw_writew(0, brd_io + INTR_RESET_REG);
4d93579f 132 expio_mask_irq(d);
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133}
134
4d93579f 135static void expio_unmask_irq(struct irq_data *d)
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136{
137 u16 reg;
4d93579f 138 u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
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139
140 reg = __raw_readw(brd_io + INTR_MASK_REG);
141 reg &= ~(1 << expio);
142 __raw_writew(reg, brd_io + INTR_MASK_REG);
143}
144
145static struct irq_chip expio_irq_chip = {
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146 .irq_ack = expio_ack_irq,
147 .irq_mask = expio_mask_irq,
148 .irq_unmask = expio_unmask_irq,
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149};
150
151int __init mxc_expio_init(u32 base, u32 p_irq)
152{
153 int i;
154
155 brd_io = ioremap(BOARD_IO_ADDR(base), SZ_4K);
156 if (brd_io == NULL)
157 return -ENOMEM;
158
159 if ((__raw_readw(brd_io + MAGIC_NUMBER1_REG) != 0xAAAA) ||
160 (__raw_readw(brd_io + MAGIC_NUMBER2_REG) != 0x5555) ||
161 (__raw_readw(brd_io + MAGIC_NUMBER3_REG) != 0xCAFE)) {
162 pr_info("3-Stack Debug board not detected\n");
163 iounmap(brd_io);
164 brd_io = NULL;
165 return -ENODEV;
166 }
167
168 pr_info("3-Stack Debug board detected, rev = 0x%04X\n",
169 readw(brd_io + CPLD_CODE_VER_REG));
170
171 /*
172 * Configure INT line as GPIO input
173 */
174 gpio_request(MXC_IRQ_TO_GPIO(p_irq), "expio_pirq");
175 gpio_direction_input(MXC_IRQ_TO_GPIO(p_irq));
176
177 /* disable the interrupt and clear the status */
178 __raw_writew(0, brd_io + INTR_MASK_REG);
179 __raw_writew(0xFFFF, brd_io + INTR_RESET_REG);
180 __raw_writew(0, brd_io + INTR_RESET_REG);
181 __raw_writew(0x1F, brd_io + INTR_MASK_REG);
182 for (i = MXC_EXP_IO_BASE;
183 i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) {
184 set_irq_chip(i, &expio_irq_chip);
185 set_irq_handler(i, handle_level_irq);
186 set_irq_flags(i, IRQF_VALID);
187 }
188 set_irq_type(p_irq, IRQF_TRIGGER_LOW);
189 set_irq_chained_handler(p_irq, mxc_expio_irq_handler);
190
191 /* Register Lan device on the debugboard */
192 smsc911x_resources[0].start = LAN9217_BASE_ADDR(base);
193 smsc911x_resources[0].end = LAN9217_BASE_ADDR(base) + 0x100 - 1;
194 platform_device_register(&smsc_lan9217_device);
195
196 return 0;
197}
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