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c0db2ea4 JB |
1 | /* |
2 | * Based on arch/arm/plat-omap/clock.c | |
3 | * | |
4 | * Copyright (C) 2004 - 2005 Nokia corporation | |
5 | * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> | |
6 | * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> | |
7 | * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. | |
8 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License | |
12 | * as published by the Free Software Foundation; either version 2 | |
13 | * of the License, or (at your option) any later version. | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | |
22 | * MA 02110-1301, USA. | |
23 | */ | |
24 | ||
25 | /* #define DEBUG */ | |
26 | ||
27 | #include <linux/clk.h> | |
28 | #include <linux/err.h> | |
29 | #include <linux/errno.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/io.h> | |
32 | #include <linux/kernel.h> | |
33 | #include <linux/list.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/mutex.h> | |
36 | #include <linux/platform_device.h> | |
37 | #include <linux/proc_fs.h> | |
38 | #include <linux/semaphore.h> | |
39 | #include <linux/string.h> | |
c0db2ea4 | 40 | |
a09e64fb | 41 | #include <mach/clock.h> |
6d73665f | 42 | #include <mach/hardware.h> |
c0db2ea4 JB |
43 | |
44 | static LIST_HEAD(clocks); | |
45 | static DEFINE_MUTEX(clocks_mutex); | |
46 | ||
47 | /*------------------------------------------------------------------------- | |
48 | * Standard clock functions defined in include/linux/clk.h | |
49 | *-------------------------------------------------------------------------*/ | |
50 | ||
d1755e35 SH |
51 | /* |
52 | * All the code inside #ifndef CONFIG_COMMON_CLKDEV can be removed once all | |
53 | * MXC architectures have switched to using clkdev. | |
54 | */ | |
55 | #ifndef CONFIG_COMMON_CLKDEV | |
c0db2ea4 JB |
56 | /* |
57 | * Retrieve a clock by name. | |
58 | * | |
59 | * Note that we first try to use device id on the bus | |
60 | * and clock name. If this fails, we try to use "<name>.<id>". If this fails, | |
61 | * we try to use clock name only. | |
62 | * The reference count to the clock's module owner ref count is incremented. | |
63 | */ | |
64 | struct clk *clk_get(struct device *dev, const char *id) | |
65 | { | |
66 | struct clk *p, *clk = ERR_PTR(-ENOENT); | |
67 | int idno; | |
68 | const char *str; | |
69 | ||
70 | if (id == NULL) | |
71 | return clk; | |
72 | ||
73 | if (dev == NULL || dev->bus != &platform_bus_type) | |
74 | idno = -1; | |
75 | else | |
76 | idno = to_platform_device(dev)->id; | |
77 | ||
78 | mutex_lock(&clocks_mutex); | |
79 | ||
80 | list_for_each_entry(p, &clocks, node) { | |
81 | if (p->id == idno && | |
82 | strcmp(id, p->name) == 0 && try_module_get(p->owner)) { | |
83 | clk = p; | |
84 | goto found; | |
85 | } | |
86 | } | |
87 | ||
88 | str = strrchr(id, '.'); | |
89 | if (str) { | |
90 | int cnt = str - id; | |
91 | str++; | |
92 | idno = simple_strtol(str, NULL, 10); | |
93 | list_for_each_entry(p, &clocks, node) { | |
94 | if (p->id == idno && | |
95 | strlen(p->name) == cnt && | |
96 | strncmp(id, p->name, cnt) == 0 && | |
97 | try_module_get(p->owner)) { | |
98 | clk = p; | |
99 | goto found; | |
100 | } | |
101 | } | |
102 | } | |
103 | ||
104 | list_for_each_entry(p, &clocks, node) { | |
105 | if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { | |
106 | clk = p; | |
107 | goto found; | |
108 | } | |
109 | } | |
110 | ||
111 | printk(KERN_WARNING "clk: Unable to get requested clock: %s\n", id); | |
112 | ||
113 | found: | |
114 | mutex_unlock(&clocks_mutex); | |
115 | ||
116 | return clk; | |
117 | } | |
118 | EXPORT_SYMBOL(clk_get); | |
d1755e35 | 119 | #endif |
c0db2ea4 JB |
120 | |
121 | static void __clk_disable(struct clk *clk) | |
122 | { | |
123 | if (clk == NULL || IS_ERR(clk)) | |
124 | return; | |
125 | ||
126 | __clk_disable(clk->parent); | |
127 | __clk_disable(clk->secondary); | |
128 | ||
129 | if (!(--clk->usecount) && clk->disable) | |
130 | clk->disable(clk); | |
131 | } | |
132 | ||
133 | static int __clk_enable(struct clk *clk) | |
134 | { | |
135 | if (clk == NULL || IS_ERR(clk)) | |
136 | return -EINVAL; | |
137 | ||
138 | __clk_enable(clk->parent); | |
139 | __clk_enable(clk->secondary); | |
140 | ||
141 | if (clk->usecount++ == 0 && clk->enable) | |
142 | clk->enable(clk); | |
143 | ||
144 | return 0; | |
145 | } | |
146 | ||
147 | /* This function increments the reference count on the clock and enables the | |
148 | * clock if not already enabled. The parent clock tree is recursively enabled | |
149 | */ | |
150 | int clk_enable(struct clk *clk) | |
151 | { | |
152 | int ret = 0; | |
153 | ||
154 | if (clk == NULL || IS_ERR(clk)) | |
155 | return -EINVAL; | |
156 | ||
157 | mutex_lock(&clocks_mutex); | |
158 | ret = __clk_enable(clk); | |
159 | mutex_unlock(&clocks_mutex); | |
160 | ||
161 | return ret; | |
162 | } | |
163 | EXPORT_SYMBOL(clk_enable); | |
164 | ||
165 | /* This function decrements the reference count on the clock and disables | |
166 | * the clock when reference count is 0. The parent clock tree is | |
167 | * recursively disabled | |
168 | */ | |
169 | void clk_disable(struct clk *clk) | |
170 | { | |
171 | if (clk == NULL || IS_ERR(clk)) | |
172 | return; | |
173 | ||
174 | mutex_lock(&clocks_mutex); | |
175 | __clk_disable(clk); | |
176 | mutex_unlock(&clocks_mutex); | |
177 | } | |
178 | EXPORT_SYMBOL(clk_disable); | |
179 | ||
180 | /* Retrieve the *current* clock rate. If the clock itself | |
181 | * does not provide a special calculation routine, ask | |
182 | * its parent and so on, until one is able to return | |
183 | * a valid clock rate | |
184 | */ | |
185 | unsigned long clk_get_rate(struct clk *clk) | |
186 | { | |
187 | if (clk == NULL || IS_ERR(clk)) | |
188 | return 0UL; | |
189 | ||
190 | if (clk->get_rate) | |
191 | return clk->get_rate(clk); | |
192 | ||
193 | return clk_get_rate(clk->parent); | |
194 | } | |
195 | EXPORT_SYMBOL(clk_get_rate); | |
196 | ||
d1755e35 | 197 | #ifndef CONFIG_COMMON_CLKDEV |
c0db2ea4 JB |
198 | /* Decrement the clock's module reference count */ |
199 | void clk_put(struct clk *clk) | |
200 | { | |
201 | if (clk && !IS_ERR(clk)) | |
202 | module_put(clk->owner); | |
203 | } | |
204 | EXPORT_SYMBOL(clk_put); | |
d1755e35 | 205 | #endif |
c0db2ea4 JB |
206 | |
207 | /* Round the requested clock rate to the nearest supported | |
208 | * rate that is less than or equal to the requested rate. | |
209 | * This is dependent on the clock's current parent. | |
210 | */ | |
211 | long clk_round_rate(struct clk *clk, unsigned long rate) | |
212 | { | |
213 | if (clk == NULL || IS_ERR(clk) || !clk->round_rate) | |
214 | return 0; | |
215 | ||
216 | return clk->round_rate(clk, rate); | |
217 | } | |
218 | EXPORT_SYMBOL(clk_round_rate); | |
219 | ||
220 | /* Set the clock to the requested clock rate. The rate must | |
221 | * match a supported rate exactly based on what clk_round_rate returns | |
222 | */ | |
223 | int clk_set_rate(struct clk *clk, unsigned long rate) | |
224 | { | |
225 | int ret = -EINVAL; | |
226 | ||
227 | if (clk == NULL || IS_ERR(clk) || clk->set_rate == NULL || rate == 0) | |
228 | return ret; | |
229 | ||
230 | mutex_lock(&clocks_mutex); | |
231 | ret = clk->set_rate(clk, rate); | |
232 | mutex_unlock(&clocks_mutex); | |
233 | ||
234 | return ret; | |
235 | } | |
236 | EXPORT_SYMBOL(clk_set_rate); | |
237 | ||
238 | /* Set the clock's parent to another clock source */ | |
239 | int clk_set_parent(struct clk *clk, struct clk *parent) | |
240 | { | |
241 | int ret = -EINVAL; | |
242 | ||
243 | if (clk == NULL || IS_ERR(clk) || parent == NULL || | |
244 | IS_ERR(parent) || clk->set_parent == NULL) | |
245 | return ret; | |
246 | ||
247 | mutex_lock(&clocks_mutex); | |
248 | ret = clk->set_parent(clk, parent); | |
249 | if (ret == 0) | |
250 | clk->parent = parent; | |
251 | mutex_unlock(&clocks_mutex); | |
252 | ||
253 | return ret; | |
254 | } | |
255 | EXPORT_SYMBOL(clk_set_parent); | |
256 | ||
257 | /* Retrieve the clock's parent clock source */ | |
258 | struct clk *clk_get_parent(struct clk *clk) | |
259 | { | |
260 | struct clk *ret = NULL; | |
261 | ||
262 | if (clk == NULL || IS_ERR(clk)) | |
263 | return ret; | |
264 | ||
265 | return clk->parent; | |
266 | } | |
267 | EXPORT_SYMBOL(clk_get_parent); | |
268 | ||
d1755e35 | 269 | #ifndef CONFIG_COMMON_CLKDEV |
c0db2ea4 JB |
270 | /* |
271 | * Add a new clock to the clock tree. | |
272 | */ | |
273 | int clk_register(struct clk *clk) | |
274 | { | |
275 | if (clk == NULL || IS_ERR(clk)) | |
276 | return -EINVAL; | |
277 | ||
278 | mutex_lock(&clocks_mutex); | |
279 | list_add(&clk->node, &clocks); | |
280 | mutex_unlock(&clocks_mutex); | |
281 | ||
282 | return 0; | |
283 | } | |
284 | EXPORT_SYMBOL(clk_register); | |
285 | ||
286 | /* Remove a clock from the clock tree */ | |
287 | void clk_unregister(struct clk *clk) | |
288 | { | |
289 | if (clk == NULL || IS_ERR(clk)) | |
290 | return; | |
291 | ||
292 | mutex_lock(&clocks_mutex); | |
293 | list_del(&clk->node); | |
294 | mutex_unlock(&clocks_mutex); | |
295 | } | |
296 | EXPORT_SYMBOL(clk_unregister); | |
297 | ||
298 | #ifdef CONFIG_PROC_FS | |
299 | static int mxc_clock_read_proc(char *page, char **start, off_t off, | |
300 | int count, int *eof, void *data) | |
301 | { | |
302 | struct clk *clkp; | |
303 | char *p = page; | |
304 | int len; | |
305 | ||
306 | list_for_each_entry(clkp, &clocks, node) { | |
307 | p += sprintf(p, "%s-%d:\t\t%lu, %d", clkp->name, clkp->id, | |
308 | clk_get_rate(clkp), clkp->usecount); | |
309 | if (clkp->parent) | |
310 | p += sprintf(p, ", %s-%d\n", clkp->parent->name, | |
311 | clkp->parent->id); | |
312 | else | |
313 | p += sprintf(p, "\n"); | |
314 | } | |
315 | ||
316 | len = (p - page) - off; | |
317 | if (len < 0) | |
318 | len = 0; | |
319 | ||
320 | *eof = (len <= count) ? 1 : 0; | |
321 | *start = page + off; | |
322 | ||
323 | return len; | |
324 | } | |
325 | ||
326 | static int __init mxc_setup_proc_entry(void) | |
327 | { | |
328 | struct proc_dir_entry *res; | |
329 | ||
330 | res = create_proc_read_entry("cpu/clocks", 0, NULL, | |
331 | mxc_clock_read_proc, NULL); | |
332 | if (!res) { | |
333 | printk(KERN_ERR "Failed to create proc/cpu/clocks\n"); | |
334 | return -ENOMEM; | |
335 | } | |
336 | return 0; | |
337 | } | |
338 | ||
339 | late_initcall(mxc_setup_proc_entry); | |
d1755e35 | 340 | #endif /* CONFIG_PROC_FS */ |
c0db2ea4 | 341 | #endif |
a2865197 SH |
342 | |
343 | /* | |
344 | * Get the resulting clock rate from a PLL register value and the input | |
345 | * frequency. PLLs with this register layout can at least be found on | |
346 | * MX1, MX21, MX27 and MX31 | |
347 | * | |
348 | * mfi + mfn / (mfd + 1) | |
349 | * f = 2 * f_ref * -------------------- | |
350 | * pd + 1 | |
351 | */ | |
352 | unsigned long mxc_decode_pll(unsigned int reg_val, u32 freq) | |
353 | { | |
354 | long long ll; | |
355 | int mfn_abs; | |
356 | unsigned int mfi, mfn, mfd, pd; | |
357 | ||
358 | mfi = (reg_val >> 10) & 0xf; | |
359 | mfn = reg_val & 0x3ff; | |
360 | mfd = (reg_val >> 16) & 0x3ff; | |
361 | pd = (reg_val >> 26) & 0xf; | |
362 | ||
363 | mfi = mfi <= 5 ? 5 : mfi; | |
364 | ||
365 | mfn_abs = mfn; | |
366 | ||
6d73665f SH |
367 | /* On all i.MXs except i.MX1 and i.MX21 mfn is a 10bit |
368 | * 2's complements number | |
369 | */ | |
370 | if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) | |
371 | mfn_abs = 0x400 - mfn; | |
a2865197 SH |
372 | |
373 | freq *= 2; | |
374 | freq /= pd + 1; | |
375 | ||
376 | ll = (unsigned long long)freq * mfn_abs; | |
377 | ||
378 | do_div(ll, mfd + 1); | |
6d73665f SH |
379 | |
380 | if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) | |
a2865197 | 381 | ll = -ll; |
6d73665f | 382 | |
a2865197 SH |
383 | ll = (freq * mfi) + ll; |
384 | ||
385 | return ll; | |
386 | } |